JPH01192795A - Silicon single crystal and its production - Google Patents

Abstract

PURPOSE:To reduce the stacking fault density of a silicon single crystal by specifying the ratio of the average speed of pulling up the crystal to the fluctuating range of the pulling up speed. CONSTITUTION:Melted polysilicon is pulled up so that the ratio of the average speed of pulling up the crystal to the fluctuation range d of the pulling up speed satisfies the relation: v/d>=1.8 to obtain a silicon single crystal for production of silicon wafers satisfying the equation, when the maximum width of growth stripe in the growing direction is represented by Wmax, the minimum width, by Wmin, and the average width of the growth stripe, by Wave.

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a silicon single crystal for producing silicon wafers and a method for manufacturing the same.

11 A silicon wafer is created from a silicon single crystal, and this silicon wafer is mirror-polished. Then, when this mirror-polished silicon wafer is heat-treated with steam, for example,
Stacking faults (O8F) on the silicon wafer surface due to thermal oxidation
is induced. Conventionally, stacking faults have occurred on the surface of silicon wafers on the order of several dozen defects/c+e2.

These stacking faults that occur are a major cause of deterioration of device characteristics, such as partial voltage breakdown and leakage current. However, the causal relationship between the growth conditions of silicon single crystals and the occurrence of stacking faults is not clear. Therefore, it is very difficult to reduce the stacking fault density. in spite of,
Users reported that the silicon wafer stacking fault density was 10/8.
'ca+2 or less is required.

To 11 This invention aims to provide a silicon single crystal for producing a silicon wafer and a method for manufacturing the same, which can significantly reduce the stacking fault density.

The invention is summarized in the claims.

In the silicon single crystal for producing the silicon wafer of this invention, the maximum width of the growth stripe in the crystal growth direction is WIaX, the minimum width of the growth stripe is Wm1n, and the average value of the width of the growth stripe is Wav.
e, the variation in the growth stripes in the crystal growth direction satisfies Wmax - W++in x100≦56 ave.

Further, in the method of manufacturing a silicon single crystal of the present invention for manufacturing a silicon wafer, the crystal pulling speed average wiv and the crystal pulling speed variation width d are such that v/d≧1.8. I will raise it so that it becomes true.

This will be explained in more detail.

When pulling a silicon single crystal, the diameter of the silicon single crystal is generally set as follows.

As shown in Figure 1, P
Generally, a method is adopted in which the diameter of the silicon single crystal is set by calculating the ID, feeding back the output to the crystal pulling speed, and controlling the crystal pulling speed. In other words, the regular shaped part is grown while the pulling speed is constantly changing.

In the present invention, at an arbitrary time shown in FIG. When the ratio of the speed fluctuation width d satisfies the following relationship, the stacking fault density can be reduced.

v/d≧1.8 At this time, when observing the growth stripes in the crystal growth direction near the outer periphery of the wafer single crystal, the maximum value of the interval W between the growth stripes w wax
and the minimum value Wmin and the average width of the growth stripes W ave
has the following relationship.

Wmax -Wmin x100≦56 Wave The value obtained from this relationship is called growth stripe variation.

For example, FIG. 4 shows a growth stripe R cut into a silicon wafer as an example. In FIG. 4, an example of the width of the growth stripes R is indicated by W.

The relationship between the value of V/d and the variation in growth stripes is shown in FIG. When the value of v/d is 1.8, the growth stripe variation is 56
becomes. When the value of V/d becomes larger than 1.8, the growth stripe variation decreases.

As an example, 45 [k(1
Polysilicon No. 1 was melted to grow an N-type single crystal with a (100) orientation and a diameter of 5 inches.

At this time, the parameters were adjusted so that the v/cl value was 0.5.1.2.3°4, and one crystal was grown for each condition.

The silicon wafer was sampled from three locations representing the growth direction of the grown crystal, and after mirror polishing,
Heat treatment was performed in steam at 00°C for 90 minutes.

The oxide film formed during the heat treatment was removed with hydrofluoric acid. After that, selective etching was performed, and the stacking fault density on the mirror surface was measured using an optical microscope. As a result, the stacking fault density was significantly reduced to an average of about 80/c+a2 to an average of about 3/cm2.

In addition, a sample of the same silicon wafer was cleaved (11
0) After etching the surface, crystal growth stripes were observed using an optical microscope. At this time, the growth stripe variation in the crystal growth direction is
For example, it was about 30 to 50.

As explained above, in the silicon single crystal of the first aspect, the stacking fault density is reduced.

Therefore, the quality of silicon wafers can be improved, and these silicon wafers are most suitable for devices with ultra-high integration, for example.

Moreover, in the manufacturing method of claim 2, a silicon single crystal for creating a silicon wafer with a low stacking fault density can be easily and reliably obtained.

[Brief explanation of the drawing]

Figure 1 is a diagram showing a commonly used crystal diameter ill m method, Figure 2 is a diagram showing changes in crystal pulling speed V, and Figure 3 is a diagram showing changes in crystal pulling speed V.
The figure shows the relationship between v/d and stacking fault density, Figure 4 is a cross-sectional view showing a part of the silicon wafer, and Figure 5 is v/d.
FIG. 3 is a diagram showing the relationship between growth stripe variation and growth stripe variation. Figure 1 Figure 2 Figure 4 Figure 3 Section 5m v/d

Claims (1)

[Claims] 1. In silicon single crystal for silicon wafer production, the maximum width of growth stripes in the crystal growth direction is W_m.
_a_x, the minimum width of the growth stripe is W_m_i_n, and the average value of the width of the growth stripe is W_a_v_e, then the variation of the growth stripe in the crystal growth direction is (W_m_a_x - W_m_i_n)/W_a_v_e
A silicon single crystal that satisfies ×100≦56. 2. A method for producing a silicon single crystal for producing a silicon wafer, in which the average crystal pulling speed and the fluctuation width d of the crystal pulling speed are pulled so that v/d≧1.8. .