JPH01185777A - Image interpolation method - Google Patents

Abstract

PURPOSE:To obtain a smoothly enlarged picture where a sharpness is preserved by detecting the density difference of at least two picture elements among plural groups and obtaining interpolation data based on picture element data showing one density difference selected from plural density differences. CONSTITUTION:Output signals from a memory part 100 are inputted to a density detection part 101 and an auxiliary scan direction interpolation processing part 102. The output image signals of the auxiliary scan direction interpolation processing part 102 and next inputted to a density detection part 103 and a main scan direction interpolation processing part 104. The density difference of at least two picture elements among plural groups is detected and interpolation data is obtained based on picture element data showing one density difference selected from plural density differences. Thus, the smoothly enlarged picture where sharpness is preserved can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image interpolation method, and particularly to an image interpolation method in an image processing apparatus that processes images using digital signals.

[Prior Art] Conventionally, when obtaining an enlarged image in a digital copying machine using, for example, a CCD line sensor as a reading element,
The mechanical movement direction of the reading unit (sub-operation direction) is expanded by slowing down the movement speed, and the direction in which the reading elements are lined up (main scanning direction) is expanded using the generally known O-order. Interpolation is used, and the enlargement process is realized by continuing the same pixel data multiple times as shown in FIG. This method is widely used because the circuit scale is very small.

However, when considering 10 times enlargement in main scanning and sub-scanning, the original image shown in Figure 16(a) is enlarged as shown in Figure 16(b), resulting in a mosaic-like image. , the disadvantage is that the image quality deteriorates.

In addition, there is a linear interpolation method that is generally known as a method that has a small circuit scale and can process in real time.

In this method, as shown in Fig. 15, when the pixel obtained by interpolation is D, and its neighboring pixels are A and B, the distance between A and B is normalized, and the distance between A and D is ΔX the distance
Then, the distance between D and B is 1-ΔX, and the interpolation data d for each pixel is such that the image data of pixels A and B are
Then, it is determined by the following formula.

d=aX (1-ΔX)+bxΔx With this method, the current image shown in FIG.
When the sub-scanning is magnified ten times, a smooth image as shown in FIG. 16(c) is obtained.

However, there is a problem in that as the magnification increases, the edges become dull and the sharpness of the original image is lost.

[Problems to be Solved by the Invention] The present invention has been made in view of the problems in the above-mentioned interpolation method, and an object of the present invention is to provide an image interpolation method that can obtain an enlarged image that is smooth and maintains sharpness. purpose.

[Means and operations for solving the problem] In order to solve this problem, the image interpolation method of the present invention obtains interpolated data by changing the addition ratio of image data of at least two pixels or more. Density differences between a plurality of sets of at least two pixels are detected, and interpolation data is obtained based on pixel data indicating one density difference selected from the plurality of density differences.

The maximum density difference or the minimum density difference is used as the selected density difference.

[Example] Hereinafter, embodiments will be described in detail with reference to the accompanying drawings.

First Embodiment FIG. 1 is a functional block diagram showing the interpolation method of the first embodiment. First, the outline of this embodiment will be explained in accordance with the flow of signals using FIG.

The input image data is input to the memory unit 100.
A line and two line delays are performed. Writing control of this memory unit lOO is performed by a write control signal from the sub-scanning direction interpolation processing section 102, and reading control is performed by a readout control signal from the main scanning direction interpolation processing section 104.

The output signal from the memory section 100 is input to the density detection section 101 and the sub-scanning direction interpolation processing section 102. The density difference detection unit 101 detects the density difference between each corresponding pixel of two lines of input data. For example, it is the density difference between the i-th data of the first line of data and the i-th data of the second line. The detected density difference data and two lines of image data from the memory unit 100 are input to the sub-scanning direction interpolation processing unit 102, and are enlarged in the sub-scanning direction according to the magnification set by the control unit 105 and output. . Conceptually, the image in Figure 2(a) is input, and the second
The image shown in FIG. 3(b) is output from the sub-scanning direction interpolation processing unit 102.

The output image signal of the sub-scanning direction interpolation processing section 102 is then input to the density detection section 103 and the main scanning direction interpolation processing section 104. The density detection unit 103 detects the density difference between the input image data and the pixel data of the previous pixel on the same line. The detected density difference signal and the output signal from the sub-scanning direction interpolation processing section 102 are sent to the main scanning direction interpolation processing section 10.
4, and is enlarged in the main scanning direction according to the magnification set by the control unit 105 and output. Here, the image shown in FIG. 2(b), which has been enlarged in the sub-scanning direction, is enlarged in the main scanning direction and output as the image shown in FIG. 2(c).

Next, the operation of this embodiment will be explained in more detail using FIG. Note that the description will be made assuming that the main scanning direction is the X direction and the sub scanning direction is the X direction. The input image signal is first
The data is input to the O memory 200.

As shown in FIG. 4(a), this FIFO memory has independently built-in write and read counters, so that writing and reading can be controlled independently. The operation of the FIFO memory is such that, as shown in FIG. 4(b), after the reset signal R3TW, which is generated at the timing before one line of data is input, is input, the signal WE indicating the input image signal period is turned ON. When it happens, turn on
During this time, writing is performed sequentially starting from address O of the FIFO memory. Similarly, for reading, a reset signal R5T is generated at the timing before outputting one line of data.
After R is input, the read request signal RE from the output side
When turned on, reading is performed sequentially from address 0 of the FIFO memory while it is on. Furthermore, when the RE becomes disabled, the read counter is held at that address, and no data is read until the RE becomes ON again.

In this embodiment, when writing, as shown in FIG. 4(b),
1 clock pulse at the beginning of each line (afterwards) 1 syn
c) is input as the reset signal RSTW, and WE is turned on.
Write the state section data sequentially starting from address O. This WE
The control signal will be explained later.

Next, after being delayed by one line, the image data read from the FIFO memory 200 in accordance with the read clock signal is input to the FIFO memory 201 and the multiplier 205. The FIFO memory 201 includes a FIFO memory 200
After writing and reading are performed in the same manner as above, the read image data is input to the multiplier 206.

Next, the coefficients input to the multipliers 205 and 206 and multiplied by each image data will be explained.

This coefficient is a coefficient corresponding to ΔX in the above-mentioned d=aX (1−ΔX)+bxΔX. Registers 207 and 219 are stored in ROM 225. It is connected to a CPU 223 operated by a RAM 224, and the CPU 223 sets a value corresponding to a magnification set from an external operation unit (not shown) in the register 207 for the sub-scanning direction and in the register 219 for the main scanning direction.

The value set in the register 207 is configured to be set by lsync (so that it is set in the flip-flop 203 at the beginning of each line via the adder 208). The value set in the register 207 is added to the addition results up to the previous line in an adder 208 for each line. Also, the most significant bit (MSB) of the adder 208
is used as the WE flaw signal for the FIFO memories 200 and 201 mentioned above. - That is, the configuration is such that the value set in the register 207 is added every time a line is processed, and when the addition result exceeds a predetermined value, one line of data is shifted.

Next, the output of the adder 208 is such that each bit except the MSB is Δ
The signal y is delayed by one line in a flip-flop 209 and then input to an adder 210 . This flip flop 2
09 is for time adjustment because it takes one line of time to shift data from the FIFO memory 200 to 201 mentioned above. Next, the offset parameters α and δ to be added to the interpolation parameter Δy of this embodiment and the adder 21
It is added as 0. The offset parameters a and δ will be explained later. The output from this adder is input to the multiplier 205, and its complement by the complement calculator 210a is input to the multiplier 206, and the FIFO memory 200 described above is input to the multiplier 205.
, 201, and then added by an adder 211. The arithmetic processing here is performed according to the following formula.

d=ax(1-(△y+α・δ)) +b×(△y+α・δ) ...(1) d: Interpolated pixel data a, b: Input pixel data △y/distance parameter α for sub-scanning direction interpolation - δ: Offset parameter of this actual example At this stage, the enlargement process in the sub-scanning direction is completed, that is, the image of FIG. 2(b) is obtained for the image of FIG. 2(a).

Next, the interpolation process in the main scanning direction will be explained.

The output pixel data from the adder 211 is input to a flip-flop 212, and is converted to 1 by a clock signal described later.
After being delayed by a clock, the flip-flop 2131
The signal is input to the multiplier 217 and the difference detection section 214. The pixel data input to the flip-flop 213 is delayed by one clock by a clock signal similar to that of the flip-flop 212, and is input to the multiplier 218 and the difference detection section 214.

Next, the coefficients by which the pixel data input to the multipliers 217 and 218 are multiplied will be explained. As in the enlarged explanation in the sub-scanning direction, the value set in the register 219 from the CPU 223 is sent to the flip-flop 215 via the adder 220.
is set by the video clock VCLK. The value set in the register 219 is added to the addition result up to the previous pixel for each pixel. Further, the most significant bit (MSB) of the adder 220 is ANDed with the video clock VCLK, and then outputted to the aforementioned flip-flops 212 and 2.
13 shift clocks and FIFO memory 200, 20
It is used as a read clock of 1. That is, the configuration is such that the value set in the register 219 is added at every pixel clock, and when the addition result exceeds a predetermined value, the data is shifted by one pixel.

Next, the addition output of the adder 220 is sent to the adder 221, where the offset parameters α and δ are added to the interpolation parameters.
and is added in an adder 221, and then its complement by the multiplier 217 and the complement calculator 221a described above is multiplied by the pixel data in an adder 218, added in an adder 222, and then output. The calculation process here is d = a
10・δ) is being calculated. Conceptually, the enlarged sub-scanning image shown in FIG. 2(b) is enlarged in the main scanning direction to obtain the enlarged image shown in FIG. 2(c).

Next, the interpolation position parameters of this embodiment will be explained.

Pixel data read out from the FIFO memories 200 and 201 using a read clock is used to detect a difference between two pixels by a difference detection section consisting of an adder and an inverter. This difference data (hereinafter referred to as δ) is input to LUTs 204 and 216. The LUT contains distances △X, △y, which are interpolation parameters.
The result of multiplying the difference δ by a coefficient α according to Table 1 below is stored in advance.

Table 1 The outputs from the adders 208 and 220 representing the difference data δ from the difference detection unit 202 and the positional parameter ΔX(Δy) are entered into this LUT, and the result (aXδ) is the positional parameter ΔX(Δy). y) and is added by adders 210 and 221.

Interpolation according to this embodiment for the original picture in FIG. 5(a), and 0
Figures 5(b) to (d) show the difference in results due to next-order and first-order interpolation.
).

As described above, according to this embodiment, it is possible to almost eliminate the mosaic pattern in the enlargement processing and the distortion of the edge part in the linear interpolation, which are disadvantages of conventional O-order interpolation, and to produce a good enlarged image inexpensively and easily. Can be provided in circuit configuration.

Second Embodiment] FIG. 6 is a functional block diagram showing an interpolation method according to a second embodiment. First, using FIG. 6, the outline of this embodiment will be explained according to the flow of signals.

The input video signal is input to a memory section 600 consisting of five line memories. A delay of 1 line to 5 lines is performed in the memory section 600. The image data delayed by 1 line to 5 lines is input to an edge detection unit 601, and the data delayed by 2 lines and 3 lines is input to multipliers 604 and 605.

The edge detection unit 601 detects edges in the input image data, and outputs the detected edge data to the adder 603 as an offset parameter of the interpolation parameter from the interpolation parameter generation unit 602. The output offset parameter is set in the interpolation parameter generation section 602 by a control section 615 connected to an operation section (not shown) to a value corresponding to the set magnification from the operation section. Based on this set value, an interpolation parameter (ΔX) necessary for interpolation is output to the adder 603.

The adder 603 uses the offset parameter from the edge detection section 601 and the interpolation parameter generation section 602 described above.
and the interpolation parameters output from the multiplier 60.
4 and is output to the multiplier 605 through the complement calculator 607. The multiplier 604 uses the pixel data delayed by 2 lines in the memory section 600 and the output value from the adder 603, and the multiplier 605 uses the pixel data delayed by 3 lines in the memory section 600 and the output value from the adder 606. The sum is added and output to delay section 608. With the affirmative results up to this point, interpolation processing in the sub-scanning direction is performed.

Conceptually, an enlarged image in the sub-scanning direction shown in FIG. 2(b) is obtained from the original image in FIG. 2(a).

Next, interpolation processing in the main scanning direction will be explained.

The output from adder 606 is input to delay section 608.

The delay unit 608 is composed of one flip-flop, and delays the image data sent pixel by pixel by one pixel, and outputs the through pixel data and the pixel data delayed by one pixel to the multipliers 611 and 612. . Next, interpolation parameter generation section 609 outputs an interpolation parameter according to the value set by control section 615 to adder 610, similar to interpolation parameter generation section 602 described above.

Adder 610 adds the output value from edge detection section 601 and the interpolation parameter from interpolation parameter generation section 609, and outputs the result to multiplier 612 through multiplier 611 and complement calculator 614. The multiplier 611 combines the through pixel data output from the delay unit 608 with the adder 61
The output value from 0, and the pixel data delayed by one pixel output from the delay unit 608 in the multiplier 612 and the adder 61
Multiplication with the output value from 0 is performed, and the multiplier 611.6
The outputs of 12 are added by an adder 613 and output.

That is, the image shown in FIG. 2 (B
) is enlarged in the main scanning direction to obtain the image shown in FIG. 2(C).

Next, the edge detection section 601 of this embodiment will be explained using FIG. 7. The input 5 lines of image data are processed by commonly known edge detection filters 720 and 72.
7 is input. First, offset parameter detection used for interpolation parameters in the sub-scanning direction will be described.

The filter 720 is a filter that detects edge components in the sub-scanning direction, and uses 5 pixels of data for each line, 5 lines x 5 pixels, a total of 25 pixels, to detect edge components of the previous two lines.
Edges are detected by finding the difference between the total of 0 pixels and the total of 10 pixels of the next two lines. The detected edge data is converted into an absolute value parameter by a LUT 721 (lookup table). Although this embodiment uses an LUT, it is also possible to perform conversion using hardware.

Next, the edge data converted into absolute values is stored in the memory section 723.
is input. The memory section 723 consists of three line memories, for example, a FIFO memory in which writing and reading can be performed independently. Edge data 723 a delayed by one line and read out, edge data 723 b delayed by two lines, and edge data 723 c of three lines are output from the memory section 723 and input to the maximum value detection section 724 .

Here, edge data 72 of these three edge data
The configuration is such that "l" is output only when 3b is the maximum, and "Ooo" is output to the AND gate 726 otherwise.

That is, since the edge detection filter 720 exhibits the largest parameter at a location where the density change is most severe, it is determined here whether the pixel of interest is a change point. Also, the memory section 723
The edge data 723b output from the LUT 125 is output from the edge data 723b.

The LUT stores in advance the result of multiplying the edge data δ by a coefficient α according to Table 1 according to the distance ΔX which is an interpolation parameter. The output from LUT725 is AN
After being gated by the output from the maximum value detection section 724 at a D gate 726, it is output to the adder 603.

Offset parameter detection in the main scanning direction has almost the same configuration, so only an outline will be explained.

Five lines of input pixel data are input to an edge detection filter 727 that detects edges in the main scanning direction, and then converted to absolute value parameters by an LUT 728. After being input to 1 pixel delay 729, 730, 731, if the maximum value is 730b, "1" is input, otherwise "○" is input to AND gate 73
Output to 4. Also, edge data 73 delayed by 2 pixels
0b outputs the calculation result according to Table 1 to the AND gate 726, as described in the sub-scanning direction.

Interpolation according to this embodiment for the original picture in FIG. 8(a), and 0
Figures 8(b) to (d) show the differences in results due to next and first order interpolation.
).

As described above, according to this embodiment, it is possible to focus on pixel data located at a density change point and apply density changes to only the interpolated pixel data around that point in accordance with edge parameters. For small images of 1
Because a smooth interpolated image of the O-order interpolation can be obtained, the mosaic pattern and 1
It is possible to substantially eliminate the dullness of edge portions in the next interpolation and provide a good enlarged image at low cost and with a simple circuit configuration.

[Third Embodiment] FIG. 9 is a functional block diagram showing an interpolation method according to a third embodiment. First, using FIG. 9, the outline of this embodiment will be explained according to the flow of signals.

The input video signal is input to a memory section 900 consisting of two line memories. A one-line and two-line delay is performed in the memory section 900, and the delayed image data is input to a minimum density difference detection section 901 and a 6-pixel latch section 902, respectively. The 6-pixel latch unit 902 includes three flip-flops in each line, and holds data for a total of six pixels, three pixels in the l line and two lines. This 6 pixel data is stored in the maximum density difference detection unit 901
The selector unit 903 selects 2 according to the determination result output from the
Pixel data is selected and input to multipliers 906 and 908.

The multiplier 906 multiplies the selected pixel data on the l-line delayed line by the ratio signal from the interpolation parameter generator 904. In multiplier 908, 2
The pixel data selected on the line-delayed line and the ratio signal from the interpolation parameter generating section 909 are multiplied by the complement data calculated by the complement calculator 905. The output data from multipliers 906 and 908 is sent to adder 9
It is added at 07. Enlargement processing in the sub-scanning direction is performed through the steps described above. Conceptually, an enlarged image in the sub-scanning direction shown in FIG. 2(b) is obtained with respect to the original image shown in FIG. 2(a).

Next, the enlargement process in the main scanning direction will be explained. The output of the adder 907 is input to a memory section 909 consisting of three line memories. After being delayed by 1 line, 2 lines, and 3 lines, the data of 3 pixels from the memory unit 909 is input to a 6-pixel latch unit 911 and a minimum density difference detection unit 910. The 6-pixel latch section 911 includes two flip-flops for each line, and holds image data for a total of 6 pixels for 3 lines. From this 6-pixel data, 2-pixel data is selected by a selector unit 912 according to the determination result output from a minimum density difference detection unit 910, and a multiplier 9
15°917 is input.

The multiplier 915 multiplies the pixel data selected by the selector section 912 among the three pixels delayed by one clock out of the three lines by the ratio signal from the interpolation parameter generating section 913.

Furthermore, the multiplier 917 calculates the complement of the pixel data selected by the selector 912 from among the three pixels delayed by two clocks in the three lines and the ratio signal from the interpolation parameter generator 913 by the complement calculator 914. Multiplication is performed. Then, the calculation results of multipliers 915 and 917 are added by adder 916 and output. Conceptually, this scaling process in the main scanning direction creates an image scaled in the main scanning direction in FIG. 2(c) with respect to a scaling image in the sub-scanning direction in FIG. can get.

Next, each block diagram will be explained. Memory section 900
is composed of two FIFD memories. FIFO
The memory is shown in FIGS. 4(a) and 4(a), which were explained in detail in the first embodiment.
b). FIFO memory is shown in Figure 4 (a)
As shown in the figure, write and read counters are built in independently, so that writing and reading can be controlled independently. The input image data is written into the FIFO memory by the write ON controlled by the sub-scanning direction interpolation parameter generation section 904, and the data is read from the FIFO memory from the main scanning direction interpolation parameter generation section 913. Reading from the FIFO memory is performed using the control signal of FIFO as a read clock.

Next, the 6-pixel latch section 902 and the selector section 903 will be explained using FIG. 10. The image data read out from the memory unit 900 and delayed by one line is input to the flip-flop 820 . This data is generated by the control signal (
Hereinafter, the flip-flop 821-
It is shifted to 823. Similarly, the image data delayed by two lines is shifted by flip-flops 824-825→826 and 5IICLK. Of these six pixels, a total of two pixels, one pixel for each delay line, are selected by the selector 827.
are selected and output by selection signals S,,S,.

Next, the minimum density difference detection section 9 generates selection signals So and S+.
01 will be explained. In the minimum density difference detection unit 901,
As shown in FIG. 11(a), peripheral input pixels az, a121a13, a3++ a of the pixel of interest to be found
3□, a3. Difference l az-a3311a+□
−a3□lla+*a3.1 is obtained and its minimum value is obtained. Then, the selector unit 90 selects the two pixels with the minimum difference.
A selection signal is output to the selector section 903 so that the selection signal 3 is selected. In the main scanning direction, as shown in FIG. 11(b), peripheral input pixels b++, bz+,
b3t, bt3゜b 23. Difference 1 for b 33 b++ bs31 l b2 -b231 l
b+3 bs+l is calculated and its minimum value is calculated. Then, a selection signal is output to the selector section 912 so that the selector section 912 selects the two pixels with the smallest difference.

Next, the interpolation parameter generating section 904 will be explained using FIG. 12. The register 431 is connected to a control section 918, and the control section 918 sets a value in the register 431 according to a magnification set from an external operation section (not shown).

The value set in the register 431 is configured to be set in the flip-flop 430 via the adder 432 by Hsync so that it is set at the beginning of each line.

The value set in the register 431 is added to the addition results up to the previous line by the adder 132 for each line. Also, the most significant bit (MSB) output from the adder 432 is
It is used as the WE defect signal of the FIFO memory mentioned above.

That is, the value set in the register 431 is added for each line, and when the addition result exceeds a predetermined value, the data is shifted by one line. The calculation result of the adder 432 is input to a multiplier that performs a ratio calculation.

Each processing block in the interpolation process in the main scanning direction has almost the same configuration as the configuration of each block in the interpolation process in the sub-scanning direction, so a description of each block will be omitted.

The original image shown in FIG. 13(b) is interpolated according to this embodiment, and 0
Figure 13(b)~
Shown in (d).

As described above, according to this embodiment, a good enlarged image with almost no mosaic pattern in enlargement processing and almost no dulling of edges in first-order interpolation, which are disadvantages of conventional zero-order interpolation, can be obtained using an inexpensive and simple circuit. Can be provided in configuration.

[Effects of the Invention] According to the present invention, it is possible to provide an image interpolation method that can obtain an enlarged image that is smooth and maintains sharpness.

More specifically, it is possible to provide a good enlarged image at low cost and with a simple circuit configuration, without the mosaic pattern in enlargement processing and the dullness of edges in linear interpolation, which are disadvantages of conventional O-order interpolation.

[Brief explanation of the drawing]

Fig. 1 is a functional block diagram in the first embodiment, Fig. 2 (a) to (C) are conceptual diagrams of processing results in interpolation processing, and Fig. 3 is a diagram for explaining the operation of the first embodiment. A circuit block diagram, FIG. 4(a) is a schematic diagram of the FIFO memory used in the first embodiment, FIG. 4(b) is a timing chart for explaining the operation of the FIFO memory, and FIG. 5 is a schematic diagram of the FIFO memory used in the first embodiment. Figure 6 is a functional block diagram of the second embodiment; Figure 7 is a circuit block diagram of the edge detection section of the second embodiment; Figure 8 is a diagram conceptually showing the density gradient in the interpolation method; A diagram conceptually showing the density gradient in the interpolation method. Figure 9 is a functional block diagram in the third embodiment. Figure 10 is a 6-pixel latch unit 1o used in the third embodiment.
2. Internal configuration diagram of the selector unit 103. FIGS. 11(a) and 11(b) are diagrams showing peripheral pixels used for interpolation in the third embodiment. FIG. 11(a) is during sub-scanning direction interpolation, FIG. This is during interpolation in the main scanning direction. FIG. 12 is a circuit diagram showing the interpolation parameter generation section (main scanning direction) in the third embodiment, FIG. 13 is a diagram conceptually showing the density gradient in each interpolation method, and FIG. 14 is a diagram showing the input Figure 15 is a principle diagram used to explain the linear interpolation method, and Figure 16 is a diagram showing the Q-order interpolation and linear interpolation when the original image is enlarged 10 times. FIG. 3 is a conceptual diagram of an output image of interpolation. In the figure, lOO...memory section, 101...density difference detection section, 102...sub-scanning direction interpolation processing section, 103...
Density difference detection unit, 104...Main scanning direction interpolation processing unit, 1
05...Control unit, 600...Memory unit, 601...
- Edge detection section, 602... interpolation parameter generation section,
603... Adder, 604, 605... Multiplier, 6
06... Adder, 607... Complement calculator, 608.
... Delay section, 609... Interpolation parameter generation section, 61
0... Adder, 611.612... Multiplier, 613
...Adder, 614...Complement calculator, 615...
Control unit, 900... Memory unit, 901... Minimum density difference detection unit, 902... 6 pixel latch unit, 903...
Selector section, 904... Interpolation parameter generation section, 90
5... Complement calculator, 906, 908... Multiplier, 9
07... Adder, 909... Interpolation parameter generation section, 910... Minimum density difference detection section, 911... 6 pixel latch section, 912... Selector section, 913... Interpolation parameter generation section , 914... complement calculator, 915.
917... Multiplier, 916... Adder, 918...
・It is a control unit.

Claims (3)

[Claims] (1) In an image interpolation method in which interpolated data is obtained by changing the addition ratio of image data of at least two or more pixels, density differences between multiple sets of at least two pixels are detected, and one density difference selected from these multiple density differences is detected. An image interpolation method characterized by obtaining interpolation data based on pixel data indicating a density difference. (2) The image interpolation method according to claim 1, wherein the selected density difference is the maximum density difference. (3) The image interpolation method according to claim 1, wherein the selected density difference is a minimum density difference.