JPH08111774A - Image reading device - Google Patents

Abstract

PURPOSE: To attain the conversion of image resolution with high resolution/ gradation performance by maintaining the image resolution performance to the thick lines as well as the characters and line drawings and also maintaining the image gradation performance to the photo images. CONSTITUTION: The pixel data nk, nk+1, nk+2 and nk+3 are successively stored in the delay circuits 17 to 14, and a pattern detection means 18 detects a density change pattern based on the output of each delay circuit and outputs a selection signal ss. At the same time, a linear interpolation means 20 performs the linear interpolation of (nk+1+nk+2)/2 based on the outputs of delay circuits 15 and 16. Then a switch circuit 19 selects the linear interpolation data received from the means 20, the output of the circuit 16 or the output of the circuit 16 to output them as the interpolation data based on the signal ss received from the means 18.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to an image reading apparatus for rasterizing a line image sensor to read an image and inserting interpolation pixels to convert the resolution.

[0002]

2. Description of the Related Art For example, a facsimile apparatus or the like employs a line image reading system for reading an image of an original one line at a time. This type of device is provided with a line image sensor such as a CCD (charge coupled device) or a PDA (photo diode array) in which a large number of photoelectric conversion elements are arranged on a line. A line image is read at a dot density corresponding to the array density.

In such a structure, the dot density of the line image depends on the arrangement density of the photoelectric conversion elements in the line image sensor. Therefore, in order to increase the read dot density, it is necessary to increase the array density of photoelectric conversion elements of the line image sensor.

However, there are various manufacturing problems in increasing the density of the line image sensor, which is very expensive and poses a practical problem.

Therefore, conventionally, as shown in FIG. 10, an original image is read by the CCD line image sensor 1.
The image signal is obtained by raster scanning and this image signal is A / D
A / D conversion is performed by the converter 2 to form digital image data corresponding to each n-bit pixel, the n-bit image data is temporarily stored in the memory 3 for speed conversion, and then the interpolation processing circuit 4 The image data stored in the memory 3 is read out under the control of 1), and an interpolation insertion process is performed to add a predetermined image to the read out image data, thereby obtaining an image signal enlarged in the main scanning direction, that is, a high-resolution image signal. Was doing.

For example, from the A / D converter 2 shown in FIG.
As shown in (a), when image data corresponding to consecutive pixels such as ~ is output, in order to double the resolution of these pixels, each pixel can be increased as shown in (b) of FIG.
It is realized by inserting the same pixel to ... between.

However, this apparatus has a problem that the line memory is at least required for the insertion interpolation processing of the image data accompanying the enlargement processing, and the control becomes complicated.

Therefore, in Japanese Unexamined Patent Publication (Kokai) No. 5-14691, as shown in FIG. 12, an original image is raster-scanned by a CCD line image sensor 5 to obtain an image signal, and this image signal is converted into an A / D converter 6 A / D conversion by
Digital image data corresponding to each n-bit pixel is formed, the n-bit image data is sampled by the sampling circuit 7 at a constant speed higher than the reading speed of the CCD line image sensor 5, and further the output of the sampling circuit 7 The thinning circuit 8 thins out the signals at a predetermined timing to solve the above-mentioned problem.

For example, from the A / D converter 6 to FIG.
When the image data corresponding to the pixels continuous with ... as shown in (a) is output, in order to increase the resolution of these pixels by 1.5 times, the sampling circuit 7
Sampling at a speed twice the D conversion speed
As shown in (b), image data enlarged to 2 times of .about. is obtained, and the thinning circuit 8 thins out the image data so that the magnification becomes 3/4. That is, as shown in FIG. 13C, for example, pixels, ... Are thinned one by one. In this way, image data having a magnification of 1.5 times in the raster direction, that is, a resolution of 1.5 times is obtained.

[0010]

However, in the case of obtaining high-resolution image data by simply enlarging A / D-converted image data and then thinning it out as in this publication, characters and line drawings, etc. Although the thin line information can be stored, there is a problem that a thick line or the like causes jaggies and the resolution is inferior, and the gradation of a photographic image is lost.

Therefore, the invention according to claim 1 can maintain the resolution not only for characters and line drawings but also for thick lines and the like, and can also maintain the gradation for photographic images. Provided is an image reading device capable of resolution conversion excellent in image quality and gradation.

In the invention according to claim 2, the resolution can be maintained not only for characters and line drawings, but also for thick lines and the like, and gradation can be maintained for photographic images. Provided is an image reading apparatus capable of performing resolution conversion excellent in image quality and gradation, and further capable of arbitrarily selecting resolution conversion processing and resolution conversion-free processing, thereby improving versatility.

[0013]

The invention according to claim 1 is
In an image reading apparatus for performing resolution conversion by inserting interpolation pixels while reading an image by raster scanning the line image sensor, k (where k is an integer) pixels in the raster direction are centered around the pixel to be interpolated. Based on the pattern detection means for detecting the change pattern of the image density, the linear interpolation means for linearly interpolating with the neighboring pixels including the pixel to be interpolated, and the detection result of the change pattern of the image density from the pattern detection means. The linear interpolation means is provided with a result of the linear interpolation and a selection means for selecting one of the adjacent pixels before and after the pixel, and the resolution-converted pixel is obtained from the selection result of the selection means.

According to a second aspect of the present invention, in an image reading apparatus for performing resolution conversion by inserting interpolation pixels while reading an image by raster scanning a line image sensor, the pixels to be interpolated are centered in the front-back direction in the raster direction. A pattern detecting means for detecting a change pattern of image density of k (where k is an integer) pixels, a linear interpolating means for linearly interpolating adjacent pixels before and after including a pixel to be interpolated, and a pattern detecting means. The linear interpolation means has a function of selecting linearly interpolated results based on the detection result of the change pattern of the image density, and a function of selecting any of the adjacent pixels before and after, and a function of outputting the read pixel as it is without subjecting it to interpolation. The selection means and the switching control means for switching and controlling each function of the selection means are provided, and when the selection function of the selection means is operated, it is inserted from the selection result. It is intended to obtain the interpolated pixels.

[0015]

According to the first aspect of the invention, the image density change pattern of k pixels is detected forward and backward in the raster direction around the pixel to be interpolated, and linear interpolation is performed based on the image density change pattern detection result. The means selects whether to output the result of the linear interpolation, or to directly output either the adjacent pixels before and after the pixel including the pixel to be interpolated.

In the invention corresponding to claim 2, further,
It was read as a process of selecting whether to output the result of the linear interpolation performed by the linear interpolation means based on the detection result of the change pattern of the image density, or to directly output either the adjacent pixels before and after the pixel including the pixel to be interpolated. It is possible to arbitrarily switch between the process of directly outputting the pixel without subjecting it to the interpolation.

[0017]

Embodiments of the present invention will be described below with reference to the drawings.

(First Embodiment) This embodiment is an embodiment corresponding to claim 1. In this example, 200 dp
A case where image data having a resolution of 400 dpi is obtained by using the line image sensor i will be described.

As shown in FIG. 1, the one-dimensional sensor C
The CD line image sensor 11 raster-scans and reads the original image. The image signal from the line image sensor 11 is converted from an analog signal to a digital signal by the A / D converter 12, and n-bit digital image data is output.

Digital image data from the A / D converter 12 is input to a correction circuit 13, and the correction circuit 13 performs corrections such as shading correction and γ correction.

The digital image data corrected by the correction circuit 13 is sequentially shifted and input to four delay circuits 14, 15, 16, 17 constituted by D-type flip-flops, for example.

The outputs of the delay circuits 14 to 17 are supplied to the pattern detection means 18, and the outputs of the delay circuits 15 and 16 are supplied to the switching circuit 19 as they are and to the linear interpolation means 20.

Reference numeral 21 denotes a timing circuit, which generates signals for controlling the operation timing of the image line sensor 11, the A / D converter 12, the delay circuits 14 to 17 and the switching circuit 19. .

The switching circuit 19 is the timing circuit 2
1 in response to the control clock signal s from the pattern detection means 18 and outputs the signal from the linear interpolation means 20 based on the selection signal ss from the pattern detection means 18 or the delay circuit 15,
Which of the 16 signals is to be output is selected.

The line image sensor 11 shown in FIG.
With the start signal shown in FIG. 2A, raster scanning is performed in synchronization with the drive clock shown in FIG. 2B, and an image signal as shown in FIG. 2C is output. The period of the xk pixel in FIG. 2C is the clamp period, and the xd pixel is a dummy bit. Therefore, the actual image signal is output to the dummy bit later.

2D shows a sample hold signal, which holds an image signal at the rising edge of this signal and converts the held signal into an n-bit digital signal by the A / D converter 12 in the next stage. . In this way, the pixel signals of the first pixel are sequentially input to the correction circuit 13.

The correction circuit 13 corrects the image data consisting of an n-bit digital signal and outputs the image data shown in (e) of FIG. This image data is sent to each delay circuit 14-17.
The delay circuits 14 to 17 perform the shift operation in synchronization with the control clock signal from the timing circuit 21 shown in (l) of FIG. 2 to input (f) to (i of FIG. )
The image data delayed by one pixel is output as shown in FIG.

FIG. 2 (j) is a signal showing a read valid period. When this signal is at a high level, the reading becomes valid,
At the low level, the delay circuits 14 to 17 are initialized. 2 (k) shows the interpolated image data.

In this apparatus, interpolation processing is performed as shown in FIG. 3A shows the pixel data of the original image before resolution conversion, and each pixel data nk, nk + 1, nk + 2, nk + 3 is input to the delay circuits 14 to nk + 3, nk + 2, nk + 1,
It is assumed that the data are input in the order of nk. At this time, if the pixel to be interpolated is the pixel nk + 1 of the delay circuit 16 which is the k + 1th pixel, this pixel nk + 1 is interpolated to nk + 1.
, N0k + 1 pixel data.

That is, the pixel data of each of the delay circuits 14 to 17 is supplied to the pattern detecting means 18, and the pixel data of the delay circuits 15 and 16 is further linearly interpolating means 20.
And to the switching circuit 19.

When the control clock signal s from the timing circuit 21 is at high level, the switching circuit 19 outputs the pixel data nk + 1 of the delay circuit 16 as it is, and when the control clock signal s is at low level, the switching circuit 19 is patterned. Based on the pattern detection result of the detection means 18, any one of the pixel data nk + 1 of the delay circuit 16, the pixel data nk + 2 of the delay circuit 15 and the output of the linear interpolation means 20 is selected and output.

By interpolating the pixel data of the delay circuit 16 by shifting the pixel data of each of the delay circuits 14 to 1 pixel by pixel, the pixel data are nk, n0k, as shown in FIG. 3 (b). nk + 1, n0k + 1, nk + 2, n0k + 2,
nk + 3 and n0k + 3. By repeating this one scan, it is possible to obtain image data having a resolution doubled.
That is, 200 dpi can be converted to 400 dpi.

The pattern detecting means 18 is adapted to detect the pattern based on Table 1.

[Table 1] That is, the density values of pixel nk and pixel nk + 1 are compared and n
If k ≦ nk + 1, ↑ is determined, and if nk> nk + 1, ↓ is determined. Further, the density values of the pixel nk + 1 and the pixel nk + 2 are compared, and if nk + 1 ≦ nk + 2, ↑ is determined, and if nk + 1> nk + 2, ↓ is determined.

Further, the density values of the pixel nk + 2 and the pixel nk + 3 are compared with each other, and if nk + 2 ≦ nk + 3, ↑ is determined, and if nk + 2> nk + 3, ↓ is determined. By making such a determination, as shown in Table 1 (a) to (h), eight types of change patterns are classified.

Assuming that the magnitude of the density value represents the black density, if the determination result is “↓↓↓” in (a), the density changes smoothly from black to white in the main scanning direction. That the pixel n0k + 1 is linearly interpolated between nk + 1 and nk + 2, that is, linearly interpolated by the linear interpolating means 20 (nk + 1 + nk + 2).
) / 2 is interpolated. At this time, the selection signal ss supplied from the pattern detecting means 18 to the switching circuit 19 is set to "000".

If the determination result is "↓↓ ↑" in (b), it is estimated that the white peak value changing from black, that is, nk + 2 is the minimum density value. In this case, Sets the pixel n0k + 1 to the minimum value nk + 2. At this time, the selection signal ss supplied from the pattern detecting means 18 to the switching circuit 19 is set to "001".

If the determination result is "↓ ↑ ↓" in (c), it is assumed that there is a jagged change starting from black. In this case, the pixel n0k + 1 is changed to nk + 1 and nk + 2. Linear interpolation, that is, linear interpolation is performed by the linear interpolation means 20 (nk + 1 + n
Interpolate with k + 2) / 2. At this time, the pattern detection means 18
The selection signal ss supplied from the switch circuit 19 to the switching circuit 19 is "010".
And

If the determination result is "↓ ↑↑" in (d), it is presumed that the white peak value changes to black, that is, nk + 1 becomes the maximum density value. In this case, the pixel n0k + 1 is set to the maximum value nk + 1. At this time, the selection signal ss supplied from the pattern detecting means 18 to the switching circuit 19 is set to "011".

If the judgment result is (↑ ↓↓) in (e), it is presumed that the black peak value changes to white, that is, nk + 1 becomes the minimum density value. In this case, the pixel n0k + 1 is set to the minimum value nk + 1. At this time, the selection signal ss supplied from the pattern detecting means 18 to the switching circuit 19 is set to "100".

If the judgment result is "↑ ↓ ↑" in (f), it is assumed that there is a jagged change starting from white. In this case, the pixel n0k + 1 is changed to nk + 1 and nk + 2. Linear interpolation, that is, linear interpolation is performed by the linear interpolation means 20 (nk + 1 + n
Interpolate with k + 2) / 2. At this time, the pattern detection means 18
The selection signal ss supplied from the switch circuit 19 to the switching circuit 19 is "101".
And

If the determination result is “↑↑ ↓” of (g), it is estimated that the black peak value changing from white, that is, nk + 2 is the maximum density value. In this case, Pixel n
Let 0k + 1 be the maximum value nk + 2. At this time, the selection signal ss supplied from the pattern detecting means 18 to the switching circuit 19 is set to "1.
10 ".

If the determination result is "↑↑↑" in (h), it is assumed that the density changes smoothly from white to black in the main scanning direction, and in this case as well, the pixel n0k + 1 is changed to nk +. Linear interpolation is performed between 1 and nk + 2, that is, (nk + 1 + nk + 2) / 2 which is linearly interpolated by the linear interpolating means 20. At this time, the selection signal ss supplied from the pattern detecting means 18 to the switching circuit 19
Is set to "111".

As described above, eight kinds of change patterns are classified from the pixel data nk, nk + 1, nk + 2, nk + 3 from the delay circuits 14 to 17, and the interpolation method is performed from the estimated pattern in each case. Is selected to obtain the interpolated pixel n0k + 1.

As shown in FIG. 5, the switching circuit 19 inputs the 3-bit selection signal ss from the pattern detecting means 18 to the decoder circuit 22 and outputs it from the output terminals Q0 to Q7 to 8.
Outputs a bit signal. That is, “000” is converted to “00000001” and “001” is converted to “00
Converted to "000010", and "010" becomes "00000"
Is converted to 100 "and" 011 "is converted to" 0000100 ".
"0", "100" is converted to "00010000", "101" is converted to "00100000", "110" is converted to "01000000",
“111” is converted to “10000000”.

The signals from the output terminals Q0, Q2, Q5, and Q7 of the decoder circuit 22 are supplied to the 4-input NAND gate circuit 23, and the signals from the output terminals Q1 and Q6 of the decoder circuit 22 are input to the 2-input NAND gate circuit. 24, and the signals from the output terminals Q3 and Q4 of the decoder circuit 22 are supplied to the 2-input NAND gate circuit 25.

Each of the NAND gate circuits 23, 24, 25
2 inputs AND gate circuits 26, 27,
28 is supplied to one of the input terminals. Then, the output from the linear interpolation means 20 is supplied to the other input terminal of the AND gate circuit 26, and the AND gate circuit 27 is supplied.
The output from the delay circuit 16 is supplied to the other input terminal of, and the output from the delay circuit 15 is supplied to the other input terminal of the AND gate circuit 28.

The outputs of the AND gate circuits 26 to 27 are supplied to one input terminal of a 2-input AND gate circuit 30 via a 3-input OR gate circuit 29. In addition, the output from the delay circuit 15 is fed to a 2-input AND gate circuit 3
1 is supplied to one input terminal.

Then, the control clock signal s from the timing circuit 30 is supplied to the other input terminal of the AND gate circuit 30 through the inverter circuit 32 and directly to the other input terminal of the AND gate circuit 31. ing. The outputs of the AND gate circuits 30 and 31 are output to the outside of the switching circuit 19 via a 2-input OR gate circuit 33.

This switching circuit 19 outputs the output of the delay circuit 15, that is, nk + 1 pixel data, via the AND gate circuit 31 and the OR gate circuit 33 when the control clock signal s from the timing circuit 30 is at a high level. When the control clock signal s from the timing circuit 30 is at a low level, the output of the decoder circuit 22, that is, the output of the delay circuit 15 based on the selection signal ss from the pattern detecting means 18, that is, The pixel data of nk + 1, the output of the delay circuit 16, that is, the pixel data of nk + 2 or the output of the linear interpolation means 20 is selected and output via the AND gate circuit 30 and the OR gate circuit 33. It will be.

In this embodiment, for example, as shown in FIG.
If the density change of the original image changes smoothly as shown in (a), the image data after interpolation and resolution conversion is (A)
As shown in (b) of, the state that changes smoothly can be maintained. On the other hand, in the conventional case, as shown in (c) of (A), jaggies occur and the resolution deteriorates.

When the density change of the original image has the maximum value as shown in (a) of (B) of FIG. 4, the image data after interpolation and resolution conversion is (b) of (B). As shown in.
This is converted to the same as the conventional one shown in (c) of (B).

When the density change of the original image changes rapidly as shown in (a) of (C) of FIG. 4, the image data after interpolation and resolution conversion is (b) of (C). As shown in, it is converted into the same as the original image. On the other hand, conventionally (C)
As shown in (c), the resolution is poor.

Further, in this embodiment, not only the resolution but also the gradation of the photographic image can be maintained and the resolution can be converted.

(Second Embodiment) This embodiment is an embodiment corresponding to claim 2. It should be noted that this embodiment also has 200 dp
A case where image data having a resolution of 400 dpi is obtained by using the i line image sensor will be described. The same parts as those in the above-described embodiment are designated by the same reference numerals and detailed description thereof will be omitted. .

As shown in FIG. 6, as a timing circuit, the switching circuit 191 also outputs a control signal m for selecting whether to output resolution-converted image data or output resolution-unconverted image data. The timing circuit 211 is used.

As shown in FIG. 7, the switching circuit 191 receives the control clock signal s and the control signal m from the timing circuit 211 via the two-input OR gate circuit 34, and the other one of the inverter circuit 32 and the AND gate circuit 31. Supplying to the input terminal.

In this embodiment, when the control signal m is at the high level, the output of the delay circuit 15, that is, the pixel data of nk + 1 is always output regardless of the change of the control clock signal s between the high level and the low level. Will be done.
This will result in no data interpolation and therefore no resolution conversion. This process is performed, for example, when 200-dpi image data is transmitted as it is.

When the control signal m is at low level, the output nk + 1 of the delay circuit 15 is output as it is depending on whether the control clock signal s changes to high level or low level, and the delay circuit 15 Output nk + 1,
Either the output nk + 2 of the delay circuit 16 or the output (nk + 1 + nk + 2) / 2 of the linear interpolation means 20 can be selected and output, and the image data obtained by doubling the image is switched. It can be output from 191.

In this way, the control of directly processing the image read by the control signal m without converting the resolution is performed,
Since it is possible to select a control for converting the resolution to a high resolution, for example, when this apparatus is applied to a facsimile having a transmission function and a copy function, the original is read at 200 dpi at the time of transmission and the original is directly transmitted without resolution conversion, and at the time of copying,
A document read at 0 dpi can be resolution-converted to 400 dpi and output, which improves versatility.

In this embodiment, it is of course possible to obtain the same effects as the above embodiment.

In each of the above embodiments, the case where the image data having the resolution of 400 dpi is obtained by using the line image sensor of 200 dpi has been described. However, the present invention is not limited to this, and the line image sensor of 200 dpi is used. It is also possible to obtain image data having a resolution of 300 dpi.

For example, the pixel data read by the line image sensor 11 is nk, nk + as shown in FIG.
If it is 1, nk + 2, nk + 3, this pixel data is sequentially stored in the delay circuits 17, 16, 15, and 14, and the pattern detection means 18 detects the pattern. Further, the linear interpolation means inputs pixel data nk + 1, nk + 2, and (2.
nk + 1 + nk + 2) / 3 linear interpolation data is created and output.

At this time, the pattern detection by the pattern detection means 18 and the selection signal ss from the pattern detection means 18 are performed.
Therefore, the relationship with the interpolation data selectively output by the switching circuit is as shown in Table 2.

[0064]

[Table 2] That is, when the detected change pattern is "↓↓↓" in (a), the interpolated pixel n0k + 1 is obtained from (2nk + 1 + nk + 2) / 2 which is the output of the linear interpolation means. In the case of “↓↓ ↑” in (b), the interpolation pixel n0k + 1 is obtained from the output nk + 2 of the delay circuit 15. Further, in the case of "↓ ↑ ↓" in (c), the interpolation pixel n0k + 1 is obtained from the output of the linear interpolation means (2 · nk + 1 + nk + 2) / 2. Further, in the case of “↓ ↑↑” in (d), the interpolation pixel n0k + 1 is obtained from the output nk + 1 of the delay circuit 16. Further, in the case of “↑ ↓↓” in (e), the interpolation pixel n0k + 1 is the output n of the delay circuit 16.
Get from k + 1. Further, in the case of “↑ ↓ ↑” of (f), the interpolation pixel n0k + 1 is the output of the linear interpolation means (2 · nk + 1 +
nk + 2) / 2. When (↑) in (g), the interpolation pixel n0k + 1 is output from the delay circuit 15 as nk + 2.
Get from Further, in the case of "↑↑↑" in (h), the interpolation pixel n0k + 1 is the output of the linear interpolation means (2nk + 1 + n
Obtained from k + 2) / 2.

Pixel data nk is obtained by such an interpolation method.
, Nk + 1, nk + 2, nk + 3, the pixel data after resolution conversion are nk, n0k, nk + 1, n0k + 1, n0k + 2, n.
k + 3 and pixel data nk, nk + 1, nk + 2, nk + 3
The positional relationship with and is as shown in FIG. 8 (b).

Further, the pixel data nk, nk + 1, nk + 2,
The positional relationship between nk + 3 and the pixel data after resolution conversion is shown in FIG.
When there is a 1-dot deviation as shown in (a) and (b), the linear interpolation means creates and outputs (nk + 1 + 2 · nk + 2) / 3 linear interpolation data. Then, the selection of the interpolation data of the switching circuit based on the pattern detection by the pattern detection means 18 is as shown in Table 3.

[0067]

[Table 3] By performing such pixel interpolation, the resolution of the image data of 200 dpi can be converted into the image data of 300 dpi.

In each of the above embodiments, four pixels nk, nk + 1, nk + 2, n including the pixel nk + 1 to be interpolated are included.
Although the pattern of the density change is detected from k + 3, it is not limited to this, as a matter of course.

[0069]

As described above, according to the invention according to claim 1, the resolution can be maintained not only for characters and line drawings but also for thick lines, and gradation can be maintained for photographic images. Therefore, resolution conversion excellent in resolution and gradation can be performed.

According to the second aspect of the invention, the resolution can be maintained not only for characters and line drawings but also for thick lines.
In addition, gradation can be maintained for photographic images, and therefore resolution conversion with excellent resolution and gradation can be performed, and processing for resolution conversion and processing without resolution conversion can be arbitrarily selected, and versatility is improved. Can be improved.

[Brief description of drawings]

FIG. 1 is a block diagram showing a first embodiment of the present invention.

FIG. 2 is a timing chart showing the operation timing of each unit of the embodiment.

FIG. 3 is a diagram showing a positional relationship between an original pixel and a pixel after resolution conversion in the embodiment.

FIG. 4 is a diagram showing an example of interpolation for various original images of the embodiment and a conventional interpolation corresponding thereto.

FIG. 5 is a diagram showing a specific circuit configuration of a switching circuit of the embodiment.

FIG. 6 is a block diagram showing a second embodiment of the present invention.

FIG. 7 is a diagram showing a specific circuit configuration of a switching circuit of the embodiment.

FIG. 8 is a diagram showing a positional relationship between pixels of an original image after resolution conversion of a 200 dpi original image into a 300 dpi image and pixels after resolution conversion thereof.

FIG. 9 is a diagram showing another example of the positional relationship between the pixels of the original image after the resolution conversion of the 200 dpi original image into the 300 dpi image and the pixels after the resolution conversion.

FIG. 10 is a block diagram showing a conventional example.

FIG. 11 is a diagram for explaining resolution conversion by interpolation enlargement in the conventional example.

FIG. 12 is a block diagram showing another conventional example.

FIG. 13 is a diagram for explaining resolution conversion by interpolation enlargement in the conventional example.

[Explanation of symbols]

 11 ... CCD line image sensor 14-17 ... Delay circuit 18 ... Pattern detecting means 19 ... Switching circuit 20 ... Linear interpolation means

Claims (2)

[Claims] 1. An image reading apparatus for performing resolution conversion by inserting interpolation pixels while reading an image by raster scanning a line image sensor and performing k conversion in the raster direction forward and backward in the raster direction around a pixel to be interpolated. Is a integer), a pattern detecting means for detecting a change pattern of image density of pixels, a linear interpolating means for linearly interpolating adjacent pixels before and after including a pixel to be interpolated, and a change in image density from the pattern detecting means. A linearly interpolating means based on a pattern detection result, and a selecting means for selecting one of the adjacent pixels before and after, and obtaining a pixel whose resolution is converted from the selection result of the selecting means. Characteristic image reading device. 2. An image reading apparatus for performing resolution conversion by inserting interpolation pixels while reading an image by raster-scanning a line image sensor, and k (backward and backward) in the raster direction centering on a pixel to be interpolated. Is a integer), a pattern detecting means for detecting a change pattern of image density of pixels, a linear interpolating means for linearly interpolating adjacent pixels before and after including a pixel to be interpolated, and a change in image density from the pattern detecting means. A selection unit having a function of selecting the result of the linear interpolation by the linear interpolation unit based on the pattern detection result and any one of the adjacent pixels before and after, and a function of outputting the read pixel as it is without subjecting it to interpolation. And switching control means for switching and controlling each function of the selecting means, and when the selecting function of the selecting means is operated, it is inserted from the selection result. An image reading apparatus characterized by obtaining an interpolated pixel.