JPH02135880A - Image pickup device - Google Patents

Abstract

PURPOSE:To attain the enlargement processing of a picture with less memories by weighting the output signal of a selected line memory, adding it and interpolating a new scanning signal. CONSTITUTION:A control signal C1 given from a control signal generation circuit 13 controls the vertical scanning of a solid-state image pickup element 1 and expands the picture in a vertical direction. M-number of multipliers 9 and 10 weight the output signals of m-number of line memories 5-7 (2<=m<n and (m) is an integer) which a selector 8 select among line memories M1-Mn (n>=3 and (n) is the integer), and an adder 11 performs addition so as to interpolate the new scanning signal. Thus, the picture can be enlarged and interpolated only by less line memories.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an imaging device such as a video camera, and more particularly to an electronic zoom function for enlarging a photographed image.

Conventional technology In order to electronically enlarge an image taken with a conventional image sensor, the output signal of the image sensor is once stored in a field memory, only the necessary portions are read out, processed through interpolation, etc., and then output. Was. The configuration of a conventional imaging device of this type is shown in FIG.

In FIG. 8, 101 is an image sensor, and 102 is an image sensor 1.
01 is a drive circuit; 103 is a process circuit that generates a luminance signal and a color signal from the output of the image sensor 101; 104 is a switch that selects either field memory 105 or 106 according to the field and writes the signal; 107 is a A memory control circuit that outputs the write address, read address, etc. of the field memory 105.10E3,
108 is a field memory 105 .
A selector 106 selects the one that is not being written and reads out a signal. 109 is an interpolation circuit that performs interpolation, and outputs a signal to an output terminal 110.

FIG. 9 shows a conceptual diagram of image enlargement processing. It is now assumed that the image sensor 101 outputs an image of 240 lines in one field. A case will be described in which a portion corresponding to 180 lines is enlarged and output as a one-screen image as shown in FIG. 9(a). The magnification in this case is 240÷180=4/3 times.

In order to increase the number of scanning lines from 180 to 240, the interpolation circuit 109 in FIG. 8 performs interpolation processing as shown in FIG. 9(b). That is, in order to generate line B, lines ① and ② are read from the field memory 105 or 10B, multiplied by a weight according to the distance and added, and line B is interpolated and output. The other lines CG are similarly interpolated from the upper and lower two lines and output.

Problems to be Solved by the Invention However, as described above, the conventional imaging device that stores the entire screen of signals in a field memory and then reads out the necessary portions has the problem of requiring a huge amount of memory. Was.

SUMMARY OF THE INVENTION In view of the above, an object of the present invention is to provide an imaging device that can perform image enlargement processing with a small amount of memory without using field memory.

Means for Solving the Problems In order to achieve the above object, the imaging device of the present invention has an X-Y
An addressing type solid-state image sensor, an image sensor drive circuit that supplies a scanning pulse to the solid-state image sensor, and an output signal SO of the solid-state image sensor that is connected to a first line memory M1 to an n-th line memory Mn using a control signal C2. (n≧3, n is an integer) and the line memories M1 to M
m lines out of n (2≦m<nz m is an integer)
a selector that selects the output signal of by control signal C3;
m multipliers that multiply the output signals 81 to Sm of the selectors by weighting signals W1 to Wm, respectively, an adder to add the m output signals of the multipliers, and control signals C1,
C2, C3, Wl to Wm, the image sensor driving circuit controls the vertical scanning of the solid-state image sensor by the control signal C1, and outputs the remaining line memories Mx selected by the selector. (1≦X
≦n1 (X is an integer) when the signal stored in the line memories M1 to Mn is the oldest signal,
The next scanning line is read from the solid-state image sensor, a new line of signal S0new is output, and the switch is configured to control writing the signal 5onev into the line memory MX.

Operation With the above configuration, the vertical scanning of the solid-state image sensor is controlled by the control signal C1 given from the control signal generation circuit, and the image is expanded in the vertical direction, and the line memories M1 to M1 are expanded.
By interpolating and interpolating new scanning line signals by weighting them with m multipliers and adding them with adders from the output signals of m line memories selected by selectors among Mn,
Image enlargement and interpolation are possible with only a small amount of line memory.

EXAMPLES Hereinafter, examples of the present invention will be described with reference to the drawings.

FIG. 1 shows a block diagram of an imaging device in a first embodiment of the present invention.

In FIG. 1, reference numeral 1 denotes a solid-state image sensing device, which is scanned by an X-Y addressing method, such as a MOS type. Reference numeral 2 denotes a drive circuit for the solid-state image sensor 1, which supplies vertical and horizontal scanning pulses. Then, the vertical scanning of the solid-state image sensor 1 is controlled by the control signal C1, and the control signal C4
Determine the number of leading lines in vertical scanning. 3 is a process circuit that generates a luminance signal, color signal, color difference signal, etc. from the output signal of the solid-state image sensor 1. 4 is process circuit 3
The output signal of the line memory 5 to
6 is a selector that selects and outputs two line memories according to the control signal C3. 9
．． 10 is a weighting signal Wl for the output signal of the selector 8, respectively.
, W2, the signal of the upper scanning line of the screen is applied to the multiplier 9, and the signal of the lower scanning line is applied to the multiplier 10. Reference numeral 11 denotes an adder that adds the output signals of multipliers 9 and 10 and outputs the result to an output terminal 12. Reference numeral 13 denotes a control signal generation circuit that supplies control signals and weight signals to each section, and address signals to the line memory.

FIG. 2 shows a block diagram of the control signal generation circuit 13.

Reference numeral 21 is a start address register indicating the position of the first scanning line of the portion of the screen to be enlarged. Here, the scanning line interval of each field is set to 1. The integer part is output as the vertical scanning head line number 04, and the decimal part is output to the selector 23. A pitch register 22 indicates a value obtained by converting the scanning line interval of the screen after enlargement to the scanning line interval of the original image, and in the case of enlargement, this value becomes 1 or less. A selector 23 outputs an upper initial value during the vertical blanking period, and outputs a lower signal at other times so that the circuit forms a loop. 24 is a latch circuit that latches the input once per line. 25 is the output of the latch 24 and the pitch register 22
The carry signal is output as C1, and the lower signal is output to the selector 23. 26 is a ternary counter which counts C1 as a clock input and outputs the count values as C2 and C3.

The output of the latch 24 becomes the weight signal W2 (0≦W2<1), and the result of subtraction (1-W2) by the subtracter 27 is output as the weight signal W1 (0<W1≦1).

The operation of the imaging apparatus in this embodiment configured as described above will be explained with reference to FIG. 9.

Now, as shown in FIG. 9, enlargement by 4/3 in the vertical direction will be explained. In the pitch register 22 in FIG. 2, a pitch of 0.67 corresponding to the magnification is written. It is assumed that the line memories 5 to 7 respectively store scanning lines (1) to (2) output from the solid-state image sensor 1. First, interpolation of scanning lines will be explained. The latch 24 holds the fractional part of the vertical position of the scan line. In order to interpolate a scanning line, two scanning lines above and below, that is, ■
and ■ use the signals. Therefore, the selector 8 functions to output the signal from the line memory 8 to the multiplier 9 and the signal from the line memory 7 to the multiplier 10, respectively. latch 24
Assuming that the value of the decimal part of the vertical address of the scanning line held by the control signal generating circuit 13 is 0.33, the control signal generating circuit 13
, 0.67 is output to Wl, and 0.33 is output to W2. Multipliers 9 and 10 multiply the scanning lines ■ and ■ by their respective weights, and the adder 11 adds the signals. is interpolated and output. At this time, the adder 25 adds the next address, and the latch 24 outputs 0.
The value 0.67 of the pitch register 22 is added to 33. Here, since the sum is 1.00, the carry signal, ie, C1, becomes 1 and is applied to the drive circuit 2, and the decimal part 0.00 is written into the latch 24 with the next horizontal pulse HD. When C1 becomes 1, the drive circuit 2 operates to vertically scan the solid-state image sensor 1, and the solid-state image sensor 1 outputs a signal for a new scanning line (2). On the other hand, the signal of the scanning line (2) stored in the line memory 5 is the oldest among the signals (2) to (3), and is no longer used for interpolation of the subsequent scanning lines D to.

Therefore, the switch 4 operates to select this line memory 5 and write the signal of the scanning line ① output from the solid-state image sensor 1. Reading and writing to these line memories can be performed simultaneously. In other words, the scanning line ■
, and writes the scanning line ■ while reading out the ■.

Next, interpolation of scanning line E will be explained. Now latch 24
Since the content held in is 0.00, the scanning line E
The signal of the scanning line (■) may be used as is. Here, the weighting signal W1 given to the multiplier 9 is 19, and the weighting signal W2 given to the multiplier 10 is O, and the scanning line
The multiplier 10 is operated so that the signal of the scanning line (2) is supplied to the multiplier 10. That is, the selector 8 outputs the signal from the line memory 7 to the multiplier 9 and the signal from the line memory 5 to the multiplier 10. Therefore, the adder 11 outputs the signal of the scanning line (2), that is, the signal of the scanning line E. Also, at this time, the adder 25
Then, the next address is added, and the value 0.67 of the pitch register 22 is added to the output 0.00 of the latch 24. Here, the sum is 0°67, so the carry signal, that is, C
1 becomes 0 and is given to the drive circuit 2, and the decimal part is 0.67
is written into the latch 24 with the next horizontal pulse HD.

When C1 becomes O, the drive circuit 2 does not perform vertical scanning of the solid-state image sensor 1, but reads out the same scanning line as before.
No useful signals are output. Therefore, both line memories hold their current contents.

Among the above-mentioned operations, the selection of reading and writing of the line memory and the control of vertical scanning of the solid-state image sensor are summarized as shown in FIG.

Thereafter, by repeating similar operations, vertical expansion can be achieved using only the line memory.

An example of horizontal expansion will be explained. Using the output of the control signal generation circuit shown in FIG. 3 as the read address of the line memories 5 to 7, the output signal of the adder 11 is applied to the horizontal interpolation circuit shown in FIG. 4, and the control signal of FIG. Horizontal weighting signal W3. generated by the generation circuit. Interpolation between two horizontal pixels may be performed using W4.

As described above, in the imaging device of this embodiment, it is possible to realize an imaging device having an image enlargement function, that is, an electronic zoom function, with only a few line memories without using a frame memory.

Next, an imaging device according to another embodiment of the present invention will be described.

FIG. 5 is a block diagram of the imaging device of this embodiment.

The only difference in FIG. 5 from FIG. 1 is the process processing section, and the other parts are exactly the same. 51・52
is an IH delay line (IHDL) that delays the signal for one horizontal scanning period; 53 and 54 are selectors that switch the inputs of the IHDLs 51 and 52 in accordance with the control signal C1 output from the control signal generation circuit 13; This is a signal generation circuit that generates a luminance signal and a color signal using the output signal of the solid-state image sensor 1. This 51-55
This constitutes a process processing section 56.

The operation of the imaging apparatus of this embodiment configured as described above will be described.

This embodiment operates in the same way as the first embodiment.

Then, when the control signal C1 controls the solid-state image sensor to perform vertical scanning, the selectors 53 and 54 output the A side, that is, the next scanning line signal to be written to the IHDLs 51 and 52. Conversely, when the control signal C1 controls the solid-state image sensor 1 to stop vertical scanning, the selectors 53 and 54 output the B side, that is, the same IHDL signal to be written again. If the process processing section 56 that operates in this manner is replaced with the process circuit 3 in FIG. The same effects as in the first embodiment can also be achieved with a signal processing method, such as a plate camera, which is equipped with a delay line and uses vertical correlation to generate luminance signals and color signals.

In addition, in these embodiments, the case where the number of line memories is 3 lines and interpolation is performed using 2 lines in the vertical direction has been described, but if these numbers are increased,
It is also possible to perform higher order interpolation. At this time, the number of line memories may be at least one more than the number of scanning lines used for interpolation.

Also, instead of controlling the read/write selection of the line memory and the vertical scanning of the solid-state image sensor at the timing shown in FIG. 6, the control signal C1 is delayed by one line and shifted by one line as shown in FIG. 7, which has no effect. does not change.

Further, in the second embodiment, the output of the delay line is written to the same delay line to hold its contents, but the driving of the delay line may be stopped to hold its contents.

Effects of the Invention According to the present invention, even when performing enlargement processing of moving images such as electronic zoom, it can be realized with only a few line memories without using a frame memory, and the memory capacity is significantly reduced. It also reduces power consumption, etc.
Moreover, the configuration is easy.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of an imaging device according to a first embodiment of the present invention, FIG. 2 is a configuration diagram of a control signal generation circuit in the same embodiment, and FIG. 3 is a horizontal enlargement control signal generation circuit in the same embodiment. 4 is a block diagram of the horizontal expansion interpolation circuit in the same embodiment, FIG. 5 is a block diagram of the imaging device in the second embodiment of the present invention, and FIG. 6 is a block diagram of the control operation in the same embodiment. FIG. 7 is a flow chart showing an outline of other control operations in the same embodiment, FIG. 8 is a block diagram of a conventional imaging device, and FIG. 9 is a conceptual diagram showing the concept of image enlargement processing. be. 1... Solid-state image sensor, 4... Switching device, 5-
7...Line memory, 8...Selector, 9
．． 10... Multiplier, 11... Adder, 13
...Control signal generation circuit. Name of agent: Patent attorney Shigetaka Awano (1 person)
≧ Figure 43.44 --- Izumi 1L Todoroki

Claims (4)

[Claims] (1) an X-Y address type solid-state image sensor; an image sensor drive circuit that supplies a scanning pulse to the solid-state image sensor;
The output signal S0 of the solid-state image sensor is transferred from the first line memory M1 to the n-th line memory Mn(n
≧3, n is an integer), a selector that selects the output signal of m lines (2≦m<n, m is an integer) of the line memories M1 to Mn by a control signal C3, and the selector a control signal C;
1, C2, C3, and a control signal generation circuit that outputs W1 to Wm. Memory Mx (1≦x
≦n, x is an integer) is the oldest signal among the line memories M1 to Mn, the next scanning line is read out from the solid-state image sensor and a new line is read out. The switch outputs the signal S0_n_e_w to the line memory Mx.
An imaging device configured to control writing w. (2) A process circuit that generates a luminance signal or a color signal/color difference signal from the output signal S0 of the solid-state image sensor, and the luminance signal or the color signal/color difference signal is input to a switching device. 1. The imaging device according to 1. (3) When the process circuit is equipped with a delay line and the vertical scanning of the solid-state image sensor is stopped and the signal S0 is not output,
3. The imaging apparatus according to claim 2, wherein the output of the delay line is configured to be inputted to the delay line again. (4) When the process circuit is equipped with a delay line and the vertical scanning of the solid-state image sensor is stopped and the signal S0 is not output,
3. The imaging device according to claim 2, wherein the imaging device is configured to stop driving the delay line and hold the signal.