JPH01183207A - Differential amplifier circuit - Google Patents

Abstract

PURPOSE:To reduce a offset voltage by connecting the base of a fourth transistor having reverse polarity a third transistor with the collector of a first transistor and connecting a constant current source with the emitter of the fourth transistor. CONSTITUTION:The base of the fourth PNP transistor Q6 having the reverse porality is connected with the base of the third NPN transistor Q5, and the constant current source I3 is connected with the emitter, whereby the base is connected with the collector of the first transistor Q2. Since the base current of the transistor Q6 is decided by the current of the constant current source 13 and the current amplification factor of the transistor Q6, the current supplied to the transistor Q5 is compensated by the transistor Q6 when the base current is set to the same value as the base current of the transistor Q5. Thus, the collector current of the transistor Q2 is compensated and a difference between the operation currents of the transistors Q1 and Q2 consisting a differential circuit can be reduced, whereby the offset voltage can be reduced.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a differential amplifier circuit used in a semiconductor integrated circuit, and particularly to a differential amplifier circuit with reduced offset voltage.

[Conventional technology]

As a differential amplifier circuit, there is a circuit shown in FIG.

This circuit has the basic configuration of NPN transistors Q1 and Q2 that form a differential circuit, and PNP transistors Q3 and Q4 that form a current mirror circuit as the active load of the differential circuit.
A PN emitter follower transistor Q5 is connected. In this circuit, resistors R3 and R4 determine the closed loop voltage gain of the amplifier circuit. Resistors R1 and R2 are resistors for compensating for offset voltage generated by the base current of transistor Q1. I1 is a constant current source that determines the operating current of the differential circuit, and I2 is a constant current source that determines the output limiter capability.

[Problem to be solved by the invention]

However, in this circuit, the base current of NPN transistor Q5 flows out from the collector point of transistor Q2. Therefore, the transistor Q1 that constitutes the differential circuit,
Regarding the operating current of transistor Q2, the operating current of transistor Q2 is higher than the operating current of transistor Q1.
The base current of transistor Q decreases by the base current of transistor Q.
There is a problem in that different operating currents flow into Q1 and Q2, resulting in an offset voltage.

The present invention has been made in view of these points, and its purpose is to reduce offset voltage.

[Means to solve the problem]

To this end, the present invention provides first and second transistors constituting a differential circuit having an active load, and a third transistor whose emitter is connected to the output terminal and whose base is connected to the collector of the first transistor. In a differential amplifier circuit consisting of a fourth transistor of opposite polarity to the third transistor,
The base of the transistor was connected to the collector of the first transistor, and the emitter of the fourth transistor was connected to a constant current source.

〔Example〕

Examples of the present invention will be explained below. FIG. 1 is a diagram showing a differential amplifier circuit according to one embodiment.

In this embodiment, the base of the transistor Q5 explained in FIG. 2 has the opposite polarity, that is, PNP.
A constant current source is connected to the emitter of the transistor Q6.

In this circuit, the base current of transistor Q6 is determined by the current of constant current source I3 and the current amplification factor of transistor Q6.

Therefore, if this base current is set to the same value as the base current of transistor Q5, the current supplied to transistor Q5 will be compensated by this transistor Q6, the collector current of transistor Q2 will be compensated, and the current supplied to transistor Q1 will be compensated. , Q2 can be reduced, and the offset voltage can be reduced.

〔Effect of the invention〕

As described above, according to the present invention, it is possible to provide a differential amplifier circuit in which the operating currents of two transistors constituting the differential circuit are made equal, and offset voltage is reduced.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram of a differential amplifier circuit according to an embodiment of the present invention, and FIG. 2 is a circuit diagram of a conventional differential amplifier circuit. Agent Patent Attorney Tsuneaki Nagao Figure 1 Figure 2

Claims (1)

[Claims] (1) Consists of first and second transistors constituting a differential circuit having an active load, and a third transistor whose emitter is connected to the output terminal and whose base is connected to the collector of the first transistor. In the differential amplifier circuit, the base of a fourth transistor having a polarity opposite to that of the third transistor is connected to the collector of the first transistor, and the emitter of the fourth transistor is connected to a constant current source. A differential amplifier circuit.