JPH01177615U - - Google Patents

Info

Publication number
JPH01177615U
JPH01177615U JP7308488U JP7308488U JPH01177615U JP H01177615 U JPH01177615 U JP H01177615U JP 7308488 U JP7308488 U JP 7308488U JP 7308488 U JP7308488 U JP 7308488U JP H01177615 U JPH01177615 U JP H01177615U
Authority
JP
Japan
Prior art keywords
circuit
output circuit
integrated circuit
preventing
formation
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP7308488U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP7308488U priority Critical patent/JPH01177615U/ja
Publication of JPH01177615U publication Critical patent/JPH01177615U/ja
Pending legal-status Critical Current

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  • Electronic Switches (AREA)
  • Logic Circuits (AREA)

Description

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本考案の一実施例の構成を示す回路図
、第2図は第1図の各部の信号波形図、第3図は
一般的な出力回路の回路図である。 符号の説明、3:出力回路、31:Pチヤンネ
ルMOSトランジスタ、32:NチヤネルMOS
トランジスタ、4:ゲート回路、41,42:イ
ンバータ、43:オアゲート、44:アンドゲー
ト。
FIG. 1 is a circuit diagram showing the configuration of an embodiment of the present invention, FIG. 2 is a signal waveform diagram of each part of FIG. 1, and FIG. 3 is a circuit diagram of a general output circuit. Explanation of symbols, 3: Output circuit, 31: P channel MOS transistor, 32: N channel MOS
Transistor, 4: Gate circuit, 41, 42: Inverter, 43: OR gate, 44: AND gate.

Claims (1)

【実用新案登録請求の範囲】 CMOSインバータから成る出力回路を有する
集積回路に於いて、 上記出力回路への入力信号の変化時に於ける直
流パス形成を防止するための回路を、上記出力回
路の前段に設けたことを特徴とする集積回路。
[Claims for Utility Model Registration] In an integrated circuit having an output circuit consisting of a CMOS inverter, a circuit for preventing the formation of a DC path when an input signal to the output circuit changes is provided in a stage preceding the output circuit. An integrated circuit characterized by being provided with.
JP7308488U 1988-05-31 1988-05-31 Pending JPH01177615U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP7308488U JPH01177615U (en) 1988-05-31 1988-05-31

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP7308488U JPH01177615U (en) 1988-05-31 1988-05-31

Publications (1)

Publication Number Publication Date
JPH01177615U true JPH01177615U (en) 1989-12-19

Family

ID=31298232

Family Applications (1)

Application Number Title Priority Date Filing Date
JP7308488U Pending JPH01177615U (en) 1988-05-31 1988-05-31

Country Status (1)

Country Link
JP (1) JPH01177615U (en)

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