JPH01171252A - Resin mold type light-receiving semiconductor device - Google Patents

Resin mold type light-receiving semiconductor device

Info

Publication number
JPH01171252A
JPH01171252A JP62329134A JP32913487A JPH01171252A JP H01171252 A JPH01171252 A JP H01171252A JP 62329134 A JP62329134 A JP 62329134A JP 32913487 A JP32913487 A JP 32913487A JP H01171252 A JPH01171252 A JP H01171252A
Authority
JP
Japan
Prior art keywords
light
package
receiving
receiving window
chip
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62329134A
Other languages
Japanese (ja)
Other versions
JPH0750754B2 (en
Inventor
Hisashi Shirahata
白畑 久
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fuji Electric Co Ltd
Original Assignee
Fuji Electric Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fuji Electric Co Ltd filed Critical Fuji Electric Co Ltd
Priority to JP62329134A priority Critical patent/JPH0750754B2/en
Priority to DE3841047A priority patent/DE3841047A1/en
Publication of JPH01171252A publication Critical patent/JPH01171252A/en
Publication of JPH0750754B2 publication Critical patent/JPH0750754B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L31/00Semiconductor devices sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
    • H01L31/02Details
    • H01L31/0203Containers; Encapsulations, e.g. encapsulation of photodiodes
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having at least one potential-jump barrier or surface barrier, e.g. PN junction, depletion layer or carrier concentration layer
    • H01L21/50Assembly of semiconductor devices using processes or apparatus not provided for in a single one of the subgroups H01L21/06 - H01L21/326, e.g. sealing of a cap to a base of a container
    • H01L21/56Encapsulations, e.g. encapsulation layers, coatings
    • H01L21/565Moulds
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/26Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
    • H01L2224/31Structure, shape, material or disposition of the layer connectors after the connecting process
    • H01L2224/32Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
    • H01L2224/321Disposition
    • H01L2224/32151Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/32221Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/32245Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/4805Shape
    • H01L2224/4809Loop shape
    • H01L2224/48091Arched
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/48Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
    • H01L2224/481Disposition
    • H01L2224/48151Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/48221Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/48245Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
    • H01L2224/48247Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/42Wire connectors; Manufacturing methods related thereto
    • H01L2224/47Structure, shape, material or disposition of the wire connectors after the connecting process
    • H01L2224/49Structure, shape, material or disposition of the wire connectors after the connecting process of a plurality of wire connectors
    • H01L2224/491Disposition
    • H01L2224/4912Layout
    • H01L2224/49171Fan-out arrangements
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/73Means for bonding being of different types provided for in two or more of groups H01L2224/10, H01L2224/18, H01L2224/26, H01L2224/34, H01L2224/42, H01L2224/50, H01L2224/63, H01L2224/71
    • H01L2224/732Location after the connecting process
    • H01L2224/73251Location after the connecting process on different surfaces
    • H01L2224/73265Layer and wire connectors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L24/00Arrangements for connecting or disconnecting semiconductor or solid-state bodies; Methods or apparatus related thereto
    • H01L24/73Means for bonding being of different types provided for in two or more of groups H01L24/10, H01L24/18, H01L24/26, H01L24/34, H01L24/42, H01L24/50, H01L24/63, H01L24/71
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181Encapsulation
    • H01L2924/1815Shape

Abstract

PURPOSE:To prevent incidence to a semiconductor chip for light reception of stray light from the periphery by forming a light-receiving window shaping a mirror surface to a recessed shape facing the optical plane of incidence of the semiconductor chip for light reception to one part of the surface of a package while forming a package surface except the light-receiving window in a satin surface. CONSTITUTION:A light-receiving window 4a shaping a mirror surface to a recessed form drawn back from the peripheral region surface of the central or]e part of the surface of the light-receiving side in a resin mold package 4 by one stage is shaped at a position facing the plane of incidence of a chip 1 to the central one part of the surface of the light-receiving side in the package 4. Other surfaces except the light- receiving window 4a are formed in satin surfaces 4b. The surface roughness of the mirror surface of the light-receiving window 4a is brought to 0.1mum or less and the surface roughness of the satin surfaces 4b to approximately 5-20mum, and stepped difference between a recessed section shaping the light-receiving window 4a and the surface of the peripheral surface of the window 4a is set to approximately 0.05-0.20mm. Accordingly, the chip 1 and a lead frame 2 are set into a cavity, and a transparent resin is injected into the cavity under the state, thus molding the resin mold package 4 into which the chip 1 and the lead frame 2 are sealed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 この発明はホトダイオード、ホトトランジスタ等の樹脂
モールド形受光用半導体装置の構成に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to the structure of a resin-molded light-receiving semiconductor device such as a photodiode or a phototransistor.

〔従来の技術〕[Conventional technology]

受光用半導体装置として、受光用半導体チップ。 A light-receiving semiconductor chip as a light-receiving semiconductor device.

リードフレームを組み込んだ中空パッケージの受光窓に
透明ガラスをはめ込んだものが従来より知られている。
It is conventionally known to have a hollow package incorporating a lead frame with transparent glass fitted into the light receiving window.

しかしてかかる構造ではパッケージの構造が複雑で製作
コストが高くなることから、昨今ではコストダウンを狙
いにトランスファモールド、ないしキヤステングモール
ド法等により受光用半導体チップ、およびリードフレー
ムを透明樹脂で封止した樹脂モールド形受光用半導体装
置が多用されるようになっている。
However, with such a structure, the package structure is complicated and the manufacturing cost is high, so in recent years, with the aim of reducing costs, the light receiving semiconductor chip and lead frame are sealed with transparent resin using transfer molding or cast molding methods. Resin-molded light-receiving semiconductor devices have come into widespread use.

次に従来における樹脂モールド形受光用半導体装置の構
造を第4図に示すと、図において1は受光用半導体チッ
プ、2はチップ1を搭載するダイパラ) 2a+  サ
ポートピン2b、  リードフィンガー2C等をパンチ
ング形成したリードフレーム、3ばチップ1とリードフ
ィンガー20との間を接続したボンディングワイヤ、4
が透明樹脂の樹脂モールドパッケージであり、該樹脂モ
ールドパッケージ4はモールド金型のキャビティ内にチ
ップ1.リードフレーム2をセットした状態で透明樹脂
を注型して成形される。
Next, the structure of a conventional resin mold type light-receiving semiconductor device is shown in FIG. 4. In the figure, 1 is a light-receiving semiconductor chip, 2 is a die plater on which the chip 1 is mounted, 2a+ support pins 2b, lead fingers 2C, etc. are punched. The formed lead frame, 3B, the bonding wire connecting between the chip 1 and the lead finger 20, 4
is a resin mold package made of transparent resin, and the resin mold package 4 has chips 1. With the lead frame 2 set, transparent resin is cast and molded.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところで上記した従来構造の樹脂モールドパッケージで
は次記のような問題点がある。すなわち第4図のように
従来の樹脂モールドパッケージ4はその表面が面一で、
かつ平滑な鏡面となるようにモールド成形されており、
このために製品の取り扱いの際にパッケージに物が当た
ったり、擦られたりすると、受光用半導体チップ1の光
入射面に対面するパッケージの受光部表面に傷付きが発
生し易い、しかもパッケージの受光部表面に傷付きが生
じると受光装置としての5ttaが損なわれることにな
る。しかも受光部以外の表面も同様に鏡面を成している
ので周囲から照射される迷光がそのままチップ1に入射
されて誤動作するおそれもある。
However, the resin mold package of the conventional structure described above has the following problems. In other words, as shown in FIG. 4, the conventional resin mold package 4 has a flat surface.
It is molded to have a smooth mirror surface.
For this reason, if an object hits or scratches the package when handling the product, the surface of the light-receiving part of the package that faces the light-incidence surface of the light-receiving semiconductor chip 1 is likely to be damaged. If the surface of the part is scratched, the performance of the light receiving device will be impaired. Furthermore, since the surfaces other than the light-receiving portion are similarly mirror-finished, there is a risk that stray light emitted from the surroundings may directly enter the chip 1 and cause malfunction.

この発明は上記の点にかんがみ成されたものであり、そ
の目的は受光部表面に傷付きが生じ鷺く、しかも周囲か
らの迷光が受光用半導体チップに入射されるのを良好に
防止できるようにした信頼性の高い樹脂モールド形受光
用半導体装置を提供することにある。
This invention has been made in consideration of the above points, and its purpose is to effectively prevent the surface of the light receiving part from being scratched and stray light from the surroundings from entering the light receiving semiconductor chip. An object of the present invention is to provide a highly reliable resin molded light-receiving semiconductor device.

〔問題点を解決するための手段〕[Means for solving problems]

上記問題点を解決するために、この発明によれば、受光
用半導体チップ、リードフレームを透明樹脂の樹脂モー
ルドパッケージ内に封止−して構成した受光用半導体装
置において、前記パッケージの表面一部に受光用半導体
チップの光入射面と対面し合う凹形で、かつ鏡面を成す
受光窓を形成するとともに、該受光窓を除くパッケージ
表面を梨地面と成して構成するものとする。
In order to solve the above-mentioned problems, according to the present invention, in a light-receiving semiconductor device configured by sealing a light-receiving semiconductor chip and a lead frame in a transparent resin molded package, a part of the surface of the package is provided. A concave and mirror-like light-receiving window that faces the light-incidence surface of the light-receiving semiconductor chip is formed on the package, and the package surface other than the light-receiving window has a matte surface.

〔作用〕[Effect]

上記の構成によれば、まず樹脂モールドパッケージにお
ける受光窓の受光面が他の表面部分よりも一段引っ込ん
だ凹部に形成されおり、したがってパッケージに物が当
たったり、擦られたりした場合でも受光面を安全に保護
して傷付きが発生するのを良好に回避することができる
。しかも受光窓を除く他のパフケージ表面が梨地面とな
っているので受光窓以外の表面に入射した周囲からの迷
光は梨地面で殆どが乱反射して外方に散乱し、パッケー
ジの樹脂媒質を透過して受光用半導体チップに到達する
ことがなくなるので迷光による誤動作を防ぐことができ
る。
According to the above configuration, first, the light receiving surface of the light receiving window in the resin molded package is formed in a recessed part that is one step recessed from the other surface parts, so even if the package is hit by an object or rubbed, the light receiving surface will remain unchanged. It is possible to protect it safely and avoid scratches in a good manner. Moreover, since the other surfaces of the puff cage except for the light-receiving window are pear-finished, most of the stray light from the surroundings that enters the surface other than the light-receiving window is diffusely reflected on the pear-shaped surface and scattered outward, and is transmitted through the resin medium of the package. Since the light does not reach the light-receiving semiconductor chip, malfunctions due to stray light can be prevented.

〔実施例〕〔Example〕

第1図、第2図は本発明実施例による樹脂モールド形受
光用半導体装置の平面図、断面図を、また第3図は樹脂
パッケージのモールド金型の構造を示すものであり、第
4図に対応する同一部材には同じ符号が付しである。
1 and 2 show a plan view and a sectional view of a resin molded light-receiving semiconductor device according to an embodiment of the present invention, and FIG. 3 shows the structure of a mold for a resin package, and FIG. Identical members corresponding to are given the same reference numerals.

まず第1図、第2図において、受光用半導体装置の基本
構造は第4図のものと同一であるが、樹脂モールドパッ
ケージ4における受光側の表面の中央一部にはチップ1
の入射面と対面し合う置所にその周域面より一段引っ込
んだ凹形で、かつ鏡面を成す受光窓4aが形成されてお
り、かつ該受光窓4aを除く他の表面が梨地面4bを成
している。なお前記受光窓4aの鏡面は表面粗さは0.
1μm以下、梨地面4bの表面粗さは5〜20IIm程
度とし、かつ受光窓4aを形成する凹所とその周域の表
面との間の段差を0,05〜0.20m程度に設定して
製作される。
First, in FIGS. 1 and 2, the basic structure of the light-receiving semiconductor device is the same as that in FIG.
A light-receiving window 4a having a mirror surface and a concave shape recessed from the peripheral surface is formed at a location facing the incident surface of the window, and the other surface other than the light-receiving window 4a has a matte surface 4b. has been completed. Note that the mirror surface of the light receiving window 4a has a surface roughness of 0.
1 μm or less, the surface roughness of the satin surface 4b is set to about 5 to 20 II m, and the step between the recess forming the light receiving window 4a and the surface of its surrounding area is set to about 0.05 to 0.20 m. Manufactured.

なお受光窓5aはパッケージ内に封止されたチップ1の
寸法、形状に合わせて形成されている。
Note that the light receiving window 5a is formed to match the size and shape of the chip 1 sealed within the package.

また上記した樹脂モールドパッケージ4をモールド成形
するモールド金型の構造は第3図に示すごとくであり、
金型5のキャビテイ面には前記の凹形受光窓4aに対応
してその表面を鏡面に平滑加工した突起部5aを有し、
かつ該突起部5aを除くキャビティの面域5bが梨地状
に粗面加工されている。
The structure of the mold for molding the resin mold package 4 described above is as shown in FIG.
The cavity surface of the mold 5 has a protrusion 5a whose surface is smoothed to a mirror surface in correspondence with the concave light-receiving window 4a,
In addition, the surface area 5b of the cavity excluding the protrusion 5a is roughened to have a satin finish.

かかる金型5に対して図示のようにチップ1.リードフ
レーム2をキャビティ内にセットし、この状態で透明樹
脂をキャビティに注入することにより第1図、第2図の
ようにチップ1.リードフレーム2を封止した樹脂モー
ルドパッケージ4がモールド成形されることになる。
For such a mold 5, a chip 1. By setting the lead frame 2 in the cavity and injecting transparent resin into the cavity in this state, the chip 1. A resin mold package 4 in which the lead frame 2 is sealed is molded.

このようにして製作された受光用半導体装置は、前述の
ようにパッケージ4の受光窓4aが他の表面よりも一段
引っ込んだ凹所として形成されているので、パッケージ
4に物が当たったり、擦られた場合でも、受光窓4aの
鏡面を安全に保護して傷付きの発生を良好に回避できる
。しかも受光窓4aを鏡面に、かつ受光窓を除(他の表
面を梨地面4bと成したことにより、第2図において鏡
面の受光窓4aに入射する光線Aははパッケージ4の透
明媒質を透過してそのままチップ1の入射面に到達して
受光されるのに対して、パッケージ周囲から受光窓48
以外の梨地面4bの面域に入射する迷光Bはパッケージ
の表面で乱反射して殆どがパッケージ周囲に散乱してし
まい、チップ1に入射されることがないので迷光Bによ
る誤動作を確実に防止できる。
In the light-receiving semiconductor device manufactured in this manner, as described above, the light-receiving window 4a of the package 4 is formed as a recess that is recessed one step further than the other surfaces, so that the package 4 is not exposed to objects hitting it or being scratched. Even if the mirror surface of the light receiving window 4a is damaged, the mirror surface of the light receiving window 4a can be safely protected and scratches can be effectively avoided. Furthermore, by making the light receiving window 4a a mirror surface and by making the other surface a satin surface 4b, the light ray A incident on the mirror surface light receiving window 4a in FIG. 2 is transmitted through the transparent medium of the package 4. The light reaches the incident surface of the chip 1 as it is and is received, whereas the light is received from the periphery of the package through the light receiving window 48.
Stray light B that enters the surface area of the matte surface 4b other than the above is diffusely reflected on the surface of the package, and most of it is scattered around the package, and does not enter the chip 1, so malfunctions caused by stray light B can be reliably prevented. .

〔発明の効果〕〔Effect of the invention〕

以上述べたようにこの発明によれば、受光用半導体チッ
プ、リードフレームを透明樹脂の樹脂モールドパッケー
ジ内に封止して構成した受光用半導体装置において、前
記パッケージの表面一部に受光用半導体チップの光入射
面と対面し合う凹状で、かつ鏡面を成す受光窓を形成す
るとともに、該受光窓を除くパッケージ表面を梨地面と
成して構成したことにより、受光部となる受光窓の傷付
き防止、並びにパッケージ周囲からの迷光による誤動作
を良好に防止できて受光用半導体装置の信幀性の向上が
図れる。
As described above, according to the present invention, in a light-receiving semiconductor device configured by sealing a light-receiving semiconductor chip and a lead frame in a resin molded package made of transparent resin, a part of the surface of the package is provided with a light-receiving semiconductor chip and a lead frame. By forming a concave and mirror-like light-receiving window that faces the light-incidence surface of the light receiving window, and by forming the package surface other than the light-receiving window with a matte finish, the light-receiving window that serves as the light-receiving part is free from scratches. It is possible to effectively prevent malfunctions caused by stray light from the periphery of the package, thereby improving the reliability of the light-receiving semiconductor device.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明実施例による受光用半導体装置の平面図
、第2図は第1図の断面図、第一3図はそのモールド金
型、第4図は従来における受光用半導体装置の構成断面
図である。各図において、1:受光用半導体チップ、2
:リードフレーム、4:樹脂モールドパッケージ、4a
:受光窓、4b:梨地面。 第1図 第2図 第4図
FIG. 1 is a plan view of a light-receiving semiconductor device according to an embodiment of the present invention, FIG. 2 is a cross-sectional view of FIG. 1, FIG. 13 is a mold thereof, and FIG. 4 is a configuration of a conventional light-receiving semiconductor device. FIG. In each figure, 1: semiconductor chip for light reception, 2
:Lead frame, 4:Resin mold package, 4a
: Light receiving window, 4b: Pear surface. Figure 1 Figure 2 Figure 4

Claims (1)

【特許請求の範囲】[Claims]  受光用半導体チップ、リードフレームを透明樹脂の樹
脂モールドパッケージ内に封止して構成した受光用半導
体装置において、前記パッケージの表面一部に受光用半
導体チップの光入射面と対面し合う凹状で、かつ鏡面を
成す受光窓を形成するとともに、該受光窓を除くパッケ
ージ表面を梨地面と成して構成したことを特徴とする樹
脂モールドパッケージ形受光用半導体装置。
In a light-receiving semiconductor device configured by sealing a light-receiving semiconductor chip and a lead frame in a resin molded package made of transparent resin, a part of the surface of the package has a concave shape facing the light incident surface of the light-receiving semiconductor chip, A resin-molded package type light-receiving semiconductor device, characterized in that a light-receiving window is formed as a mirror surface, and the package surface other than the light-receiving window has a satin surface.
JP62329134A 1987-12-25 1987-12-25 Resin-molded light-receiving semiconductor device Expired - Lifetime JPH0750754B2 (en)

Priority Applications (2)

Application Number Priority Date Filing Date Title
JP62329134A JPH0750754B2 (en) 1987-12-25 1987-12-25 Resin-molded light-receiving semiconductor device
DE3841047A DE3841047A1 (en) 1987-12-25 1988-12-06 Plastic-cased, light-sensitive semiconductor assembly

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62329134A JPH0750754B2 (en) 1987-12-25 1987-12-25 Resin-molded light-receiving semiconductor device

Publications (2)

Publication Number Publication Date
JPH01171252A true JPH01171252A (en) 1989-07-06
JPH0750754B2 JPH0750754B2 (en) 1995-05-31

Family

ID=18218007

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62329134A Expired - Lifetime JPH0750754B2 (en) 1987-12-25 1987-12-25 Resin-molded light-receiving semiconductor device

Country Status (2)

Country Link
JP (1) JPH0750754B2 (en)
DE (1) DE3841047A1 (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11340257A (en) * 1998-05-21 1999-12-10 Hamamatsu Photonics Kk Transparent resin-encapsulated optical semiconductor device
JP2003017715A (en) * 2001-06-28 2003-01-17 Sony Corp Photodetector semiconductor device

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61276271A (en) * 1985-05-30 1986-12-06 Nec Kyushu Ltd Optical reaction element
JPS62104057A (en) * 1985-10-30 1987-05-14 Toshiba Corp Transparent resin-sealed semiconductor device
JPS63102272A (en) * 1986-10-17 1988-05-07 Mitsubishi Electric Corp Optical semiconductor device
JPS63195726U (en) * 1987-06-03 1988-12-16

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61276271A (en) * 1985-05-30 1986-12-06 Nec Kyushu Ltd Optical reaction element
JPS62104057A (en) * 1985-10-30 1987-05-14 Toshiba Corp Transparent resin-sealed semiconductor device
JPS63102272A (en) * 1986-10-17 1988-05-07 Mitsubishi Electric Corp Optical semiconductor device
JPS63195726U (en) * 1987-06-03 1988-12-16

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH11340257A (en) * 1998-05-21 1999-12-10 Hamamatsu Photonics Kk Transparent resin-encapsulated optical semiconductor device
JP2003017715A (en) * 2001-06-28 2003-01-17 Sony Corp Photodetector semiconductor device

Also Published As

Publication number Publication date
JPH0750754B2 (en) 1995-05-31
DE3841047C2 (en) 1991-01-03
DE3841047A1 (en) 1989-07-20

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