JPH01170116A - Bi−MOS論理回路 - Google Patents
Bi−MOS論理回路Info
- Publication number
- JPH01170116A JPH01170116A JP62328107A JP32810787A JPH01170116A JP H01170116 A JPH01170116 A JP H01170116A JP 62328107 A JP62328107 A JP 62328107A JP 32810787 A JP32810787 A JP 32810787A JP H01170116 A JPH01170116 A JP H01170116A
- Authority
- JP
- Japan
- Prior art keywords
- bipolar transistor
- logic circuit
- clock signal
- circuit
- gate
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 238000007599 discharging Methods 0.000 abstract description 9
- 238000010586 diagram Methods 0.000 description 4
- 230000001360 synchronised effect Effects 0.000 description 3
- 230000003321 amplification Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000003199 nucleic acid amplification method Methods 0.000 description 2
- 239000002131 composite material Substances 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
Landscapes
- Logic Circuits (AREA)
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62328107A JPH01170116A (ja) | 1987-12-24 | 1987-12-24 | Bi−MOS論理回路 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62328107A JPH01170116A (ja) | 1987-12-24 | 1987-12-24 | Bi−MOS論理回路 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01170116A true JPH01170116A (ja) | 1989-07-05 |
JPH0574247B2 JPH0574247B2 (enrdf_load_stackoverflow) | 1993-10-18 |
Family
ID=18206577
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62328107A Granted JPH01170116A (ja) | 1987-12-24 | 1987-12-24 | Bi−MOS論理回路 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01170116A (enrdf_load_stackoverflow) |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01232826A (ja) * | 1988-03-14 | 1989-09-18 | Matsushita Electric Ind Co Ltd | ダイナミック型論理回路 |
JPH03241921A (ja) * | 1989-09-28 | 1991-10-29 | Bull Sa | 集積化されたプログラマブルロジックアレー |
Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6342216A (ja) * | 1986-08-08 | 1988-02-23 | Hitachi Ltd | バイポ−ラトランジスタと電界効果トランジスタとを含む複合回路 |
-
1987
- 1987-12-24 JP JP62328107A patent/JPH01170116A/ja active Granted
Patent Citations (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6342216A (ja) * | 1986-08-08 | 1988-02-23 | Hitachi Ltd | バイポ−ラトランジスタと電界効果トランジスタとを含む複合回路 |
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH01232826A (ja) * | 1988-03-14 | 1989-09-18 | Matsushita Electric Ind Co Ltd | ダイナミック型論理回路 |
JPH03241921A (ja) * | 1989-09-28 | 1991-10-29 | Bull Sa | 集積化されたプログラマブルロジックアレー |
Also Published As
Publication number | Publication date |
---|---|
JPH0574247B2 (enrdf_load_stackoverflow) | 1993-10-18 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
LAPS | Cancellation because of no payment of annual fees |