JPH01166544A - Cooling structure for multi-chip module - Google Patents

Cooling structure for multi-chip module

Info

Publication number
JPH01166544A
JPH01166544A JP62323937A JP32393787A JPH01166544A JP H01166544 A JPH01166544 A JP H01166544A JP 62323937 A JP62323937 A JP 62323937A JP 32393787 A JP32393787 A JP 32393787A JP H01166544 A JPH01166544 A JP H01166544A
Authority
JP
Japan
Prior art keywords
housing
fins
conductor
heat
thermal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62323937A
Other languages
Japanese (ja)
Inventor
Hiroshi Go
郷 博
Shizuo Zushi
頭士 鎮夫
Mitsuo Miyamoto
宮本 光男
Takahiro Oguro
崇弘 大黒
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Hitachi Ltd
Original Assignee
Hitachi Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Hitachi Ltd filed Critical Hitachi Ltd
Priority to JP62323937A priority Critical patent/JPH01166544A/en
Publication of JPH01166544A publication Critical patent/JPH01166544A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2224/00Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
    • H01L2224/01Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
    • H01L2224/10Bump connectors; Manufacturing methods related thereto
    • H01L2224/15Structure, shape, material or disposition of the bump connectors after the connecting process
    • H01L2224/16Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
    • H01L2224/161Disposition
    • H01L2224/16151Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
    • H01L2224/16221Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
    • H01L2224/16225Disposition the bump connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being non-metallic, e.g. insulating substrate with or without metallisation
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151Die mounting substrate
    • H01L2924/153Connection portion
    • H01L2924/1531Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15312Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a pin array, e.g. PGA

Abstract

PURPOSE:To effectively bring a thermal conductor into contact with the fins of a housing, and to improve its thermal conductivity by inserting a spring between thermal conductors corresponding to adjacent semiconductor chips. CONSTITUTION:Thermal conductors 3 are respectively pressed by the elastic force of a spring 5 between the conductor 3 and a housing 4 to semiconductor chips 2. The conductor 3 has heat transfer fins 7, which are engaged through small gaps 9 with housing fins 8 formed on the housing 4. Springs 6 are inserted between the adjacent conductors 3, thereby effectively bringing the fins 7 into pressure contact with the fins 8. Thus, a structure in which no gap exists in the heat passage from the chip 2 to the upper face of the housing 4 is prepared, thereby improving its heat transfer performance.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、基板上に複数の半導体チップを搭載したマル
チチップモジュールにおいて、半導体チップから発生す
る熱を除去するための冷却構造に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a cooling structure for removing heat generated from semiconductor chips in a multi-chip module in which a plurality of semiconductor chips are mounted on a substrate.

〔従来の技術〕[Conventional technology]

従来の冷却構造は特開昭60−126851号公報に記
載のように、一つの半導体チップの領域内だけでばねを
使用していた。このため、半導体チップに熱伝導体を押
し付けると、熱伝導体とハウジングを押し付ける力の二
カを同時に得るように、熱伝導体とハウジング間を斜め
にばねで接続していた。
A conventional cooling structure uses a spring only within the area of one semiconductor chip, as described in Japanese Patent Laid-Open No. 60-126851. For this reason, the thermal conductor and the housing have been connected diagonally by a spring so that when the thermal conductor is pressed against the semiconductor chip, the two forces of pressing the thermal conductor and the housing are obtained at the same time.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記従来技術は、一つの半導体チップ領域でのみ冷却構
造を完結させようとしたために、半導体チップからハウ
ジングに至る熱の径路中に2つ以上の部品を有していた
。このため、各部品間に存在する間隙に伴う接触部の熱
抵抗について配慮されておらず、伝熱性能低下の問題が
あった。
In the above-mentioned conventional technology, since the cooling structure was attempted to be completed in only one semiconductor chip area, two or more parts were included in the heat path from the semiconductor chip to the housing. For this reason, no consideration was given to the thermal resistance of the contact portion due to the gaps that exist between each component, resulting in a problem of deterioration in heat transfer performance.

本発明の目的は、半導体チップを複数個搭載したマルチ
チップモジュールの場合で、熱伝導体とハウジングのフ
ィン同士を接触させるばね挿入スペースを確保して、伝
熱性能の向上を図ることにある。
An object of the present invention is to improve heat transfer performance in the case of a multi-chip module in which a plurality of semiconductor chips are mounted, by securing a space for inserting a spring that brings the heat conductor and the fins of the housing into contact with each other.

〔問題点を解決するための手段〕[Means for solving problems]

上記目的は、複数の半導体チップを有するマルチチップ
モジュールにおいて、それぞれの半導体チップに対応す
る熱伝導体の中で、隣接する半導体チップ領域の熱伝導
体の間にばねを挿入する方法でスペースを確保して、熱
伝導体とハウジングのフィンの接触を確実なものとする
ことにより、達成される。
The above purpose is to secure space in a multi-chip module having multiple semiconductor chips by inserting a spring between the heat conductors in adjacent semiconductor chip areas among the heat conductors corresponding to each semiconductor chip. This is achieved by ensuring the contact between the heat conductor and the fins of the housing.

〔作用〕[Effect]

個々の半導体領域には熱伝導体と半導体チップが接触す
るためのばねを入れる。また、隣接する半導体チップ領
域の熱伝導体同士にばねを入れることで、この互いに及
ぼし合う反発力を利用し、ハウジングと熱伝導体の接触
が確実なものとなる。
A spring is placed in each semiconductor region so that the thermal conductor and the semiconductor chip come into contact with each other. Furthermore, by inserting springs between the thermal conductors in adjacent semiconductor chip regions, the repulsive forces exerted on each other are utilized to ensure reliable contact between the housing and the thermal conductors.

〔実施例〕〔Example〕

以下1本発明の一実施例を図により説明する。 An embodiment of the present invention will be described below with reference to the drawings.

基板1には、半導体チップ2が複数個搭載される。A plurality of semiconductor chips 2 are mounted on the substrate 1.

各半導体チップ2のそれぞれに熱伝導体3をばね5の弾
性力によって押しつけている。熱伝導体31よ複数枚の
熱伝導体フィン7を持ち、ハウジング4に設けたハウジ
ングフィン8と微小すきま9を介してかみあっている。
A thermal conductor 3 is pressed against each semiconductor chip 2 by the elastic force of a spring 5. The heat conductor 31 has a plurality of heat conductor fins 7, which are engaged with housing fins 8 provided on the housing 4 through a minute gap 9.

ここで、横方向の力が存在しなければ、熱伝導体フィン
7とハウジングフィン8が接触せず、結果として伝熱性
能の低下を招き得る。そこで、隣接する熱伝導体3の間
にばね6を挿入することで横方向の力を作り、熱伝導体
フィン7とハウジングフィン8の圧接が確実なものとな
る。
Here, if there is no lateral force, the heat conductor fins 7 and the housing fins 8 will not come into contact with each other, which may result in a reduction in heat transfer performance. Therefore, by inserting the spring 6 between the adjacent heat conductors 3, a lateral force is created, and the press contact between the heat conductor fins 7 and the housing fins 8 is ensured.

本実施例によれば、半導体チップからハウジング上面に
至る熱の流路の過程にすきまを持たない構造となり、伝
熱性能の向上の効果がある。
According to this embodiment, the structure is such that there is no gap in the heat flow path from the semiconductor chip to the upper surface of the housing, which has the effect of improving heat transfer performance.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、伝熱性能を改善できるので、半導体チ
ップのジャンクション温度を低くでき、半導体の温度に
対する動作マージンの確保、信頼性の向上等が得られ、
ひいては装置全体の信頼性の向上等の効果がある。
According to the present invention, the heat transfer performance can be improved, so the junction temperature of the semiconductor chip can be lowered, an operating margin with respect to the semiconductor temperature can be secured, reliability can be improved, etc.
This also has the effect of improving the reliability of the entire device.

【図面の簡単な説明】[Brief explanation of the drawing]

図は本発明の一実施例の正面図である。 1・・・基板、2・・・半導体チップ、3・・・熱伝導
体。 4・・・ハウジング、5・・・ばねa、6・・・ばねす
、7・・・熱伝導体フィン、8・・・ハウジングフィン
、9・・・微小すきま。 、5−1jね工
The figure is a front view of one embodiment of the present invention. DESCRIPTION OF SYMBOLS 1...Substrate, 2...Semiconductor chip, 3...Heat conductor. 4...Housing, 5...Spring a, 6...Spring, 7...Heat conductor fin, 8...Housing fin, 9...Minute gap. , 5-1j construction

Claims (1)

【特許請求の範囲】[Claims] 1、複数個の半導体チップで発生した熱を、個々の半導
体に接触する熱伝導体を介してハウジングへ伝え外部に
逃がす冷却構造において、隣接する半導体チップ各々に
対応する熱伝導体の間に、互いに反発力を及ぼし合うよ
うばねを挿入し、この力で各熱伝導体をハウジングに接
触させることを特徴とするマルチチップモジュールの冷
却構造。
1. In a cooling structure in which heat generated by a plurality of semiconductor chips is transmitted to the housing via heat conductors in contact with the individual semiconductors and released to the outside, a heat conductor is placed between the heat conductors corresponding to each adjacent semiconductor chip. A multi-chip module cooling structure characterized by inserting springs so that they exert repulsive forces on each other, and using this force to bring each thermal conductor into contact with the housing.
JP62323937A 1987-12-23 1987-12-23 Cooling structure for multi-chip module Pending JPH01166544A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62323937A JPH01166544A (en) 1987-12-23 1987-12-23 Cooling structure for multi-chip module

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62323937A JPH01166544A (en) 1987-12-23 1987-12-23 Cooling structure for multi-chip module

Publications (1)

Publication Number Publication Date
JPH01166544A true JPH01166544A (en) 1989-06-30

Family

ID=18160294

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62323937A Pending JPH01166544A (en) 1987-12-23 1987-12-23 Cooling structure for multi-chip module

Country Status (1)

Country Link
JP (1) JPH01166544A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6780531B2 (en) 2000-10-31 2004-08-24 Hitachi Maxell, Ltd. Magnetic recording medium comprising a magnetic layer having specific surface roughness and protrusions
KR100703874B1 (en) * 2005-09-07 2007-04-04 (주)파도시스템 A structure of heatsink plate for embedded system being fixed on a inner wall
WO2017200630A1 (en) * 2016-05-18 2017-11-23 Raytheon Company Expanding thermal device and system for effecting heat transfer within electronics assemblies

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US6780531B2 (en) 2000-10-31 2004-08-24 Hitachi Maxell, Ltd. Magnetic recording medium comprising a magnetic layer having specific surface roughness and protrusions
KR100703874B1 (en) * 2005-09-07 2007-04-04 (주)파도시스템 A structure of heatsink plate for embedded system being fixed on a inner wall
WO2017200630A1 (en) * 2016-05-18 2017-11-23 Raytheon Company Expanding thermal device and system for effecting heat transfer within electronics assemblies
US10292255B2 (en) 2016-05-18 2019-05-14 Raytheon Company Expanding thermal device and system for effecting heat transfer within electronics assemblies
US10887978B2 (en) 2016-05-18 2021-01-05 Raytheon Company Expanding thermal device and system for effecting heat transfer within electronics assemblies

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