JPH01166530A - Resin-sealed semiconductor device - Google Patents
Resin-sealed semiconductor deviceInfo
- Publication number
- JPH01166530A JPH01166530A JP32402187A JP32402187A JPH01166530A JP H01166530 A JPH01166530 A JP H01166530A JP 32402187 A JP32402187 A JP 32402187A JP 32402187 A JP32402187 A JP 32402187A JP H01166530 A JPH01166530 A JP H01166530A
- Authority
- JP
- Japan
- Prior art keywords
- resin
- semiconductor element
- insulating adhesive
- linear expansion
- semiconductor device
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 74
- 239000000853 adhesive Substances 0.000 claims abstract description 29
- 230000001070 adhesive effect Effects 0.000 claims abstract description 29
- 229920005989 resin Polymers 0.000 claims abstract description 22
- 239000011347 resin Substances 0.000 claims abstract description 22
- 239000004744 fabric Substances 0.000 claims abstract description 17
- 229920001187 thermosetting polymer Polymers 0.000 claims abstract description 12
- 239000004760 aramid Substances 0.000 claims abstract description 5
- 229920003235 aromatic polyamide Polymers 0.000 claims abstract description 5
- 239000000945 filler Substances 0.000 claims abstract description 5
- 239000011521 glass Substances 0.000 claims abstract description 5
- 239000010453 quartz Substances 0.000 claims abstract description 5
- VYPSYNLAJGMNEJ-UHFFFAOYSA-N silicon dioxide Inorganic materials O=[Si]=O VYPSYNLAJGMNEJ-UHFFFAOYSA-N 0.000 claims abstract description 5
- 239000002657 fibrous material Substances 0.000 claims 1
- 239000000463 material Substances 0.000 abstract description 7
- 230000008646 thermal stress Effects 0.000 abstract description 5
- 238000005336 cracking Methods 0.000 abstract 1
- 230000001351 cycling effect Effects 0.000 abstract 1
- ZWEHNKRNPOVVGH-UHFFFAOYSA-N 2-Butanone Chemical compound CCC(C)=O ZWEHNKRNPOVVGH-UHFFFAOYSA-N 0.000 description 6
- 238000000034 method Methods 0.000 description 6
- 229920001721 polyimide Polymers 0.000 description 6
- 230000002950 deficient Effects 0.000 description 5
- 238000012360 testing method Methods 0.000 description 5
- 239000004642 Polyimide Substances 0.000 description 4
- 239000003822 epoxy resin Substances 0.000 description 4
- 229920000647 polyepoxide Polymers 0.000 description 4
- 239000000835 fiber Substances 0.000 description 3
- 238000010438 heat treatment Methods 0.000 description 3
- 229920002050 silicone resin Polymers 0.000 description 3
- 229920002379 silicone rubber Polymers 0.000 description 3
- 239000004945 silicone rubber Substances 0.000 description 3
- 239000002904 solvent Substances 0.000 description 3
- 230000000694 effects Effects 0.000 description 2
- LNEPOXFFQSENCJ-UHFFFAOYSA-N haloperidol Chemical compound C1CC(O)(C=2C=CC(Cl)=CC=2)CCN1CCCC(=O)C1=CC=C(F)C=C1 LNEPOXFFQSENCJ-UHFFFAOYSA-N 0.000 description 2
- 239000007788 liquid Substances 0.000 description 2
- 229910000679 solder Inorganic materials 0.000 description 2
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 description 1
- BQCADISMDOOEFD-UHFFFAOYSA-N Silver Chemical compound [Ag] BQCADISMDOOEFD-UHFFFAOYSA-N 0.000 description 1
- 238000012644 addition polymerization Methods 0.000 description 1
- XAGFODPZIPBFFR-UHFFFAOYSA-N aluminium Chemical compound [Al] XAGFODPZIPBFFR-UHFFFAOYSA-N 0.000 description 1
- 229910052782 aluminium Inorganic materials 0.000 description 1
- 239000003795 chemical substances by application Substances 0.000 description 1
- 230000000052 comparative effect Effects 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 229910052802 copper Inorganic materials 0.000 description 1
- 239000010949 copper Substances 0.000 description 1
- 230000006866 deterioration Effects 0.000 description 1
- 238000007688 edging Methods 0.000 description 1
- 238000005538 encapsulation Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005496 eutectics Effects 0.000 description 1
- 239000005357 flat glass Substances 0.000 description 1
- 238000007429 general method Methods 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 238000005259 measurement Methods 0.000 description 1
- 229920003986 novolac Polymers 0.000 description 1
- 238000004806 packaging method and process Methods 0.000 description 1
- 229920001568 phenolic resin Polymers 0.000 description 1
- 239000005011 phenolic resin Substances 0.000 description 1
- 229920001225 polyester resin Polymers 0.000 description 1
- 239000004645 polyester resin Substances 0.000 description 1
- 239000009719 polyimide resin Substances 0.000 description 1
- 238000011417 postcuring Methods 0.000 description 1
- 238000012545 processing Methods 0.000 description 1
- 238000007789 sealing Methods 0.000 description 1
- 229910052709 silver Inorganic materials 0.000 description 1
- 239000004332 silver Substances 0.000 description 1
- 239000007787 solid Substances 0.000 description 1
- 239000000758 substrate Substances 0.000 description 1
- 238000001721 transfer moulding Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/26—Layer connectors, e.g. plate connectors, solder or adhesive layers; Manufacturing methods related thereto
- H01L2224/31—Structure, shape, material or disposition of the layer connectors after the connecting process
- H01L2224/32—Structure, shape, material or disposition of the layer connectors after the connecting process of an individual layer connector
- H01L2224/321—Disposition
- H01L2224/32151—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/32221—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/32245—Disposition the layer connector connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
Landscapes
- Die Bonding (AREA)
- Lead Frames For Integrated Circuits (AREA)
Abstract
Description
【発明の詳細な説明】 〔産業上の利用分野〕 本発明は樹脂封止型半導体装置に係り、特に。[Detailed description of the invention] [Industrial application field] The present invention relates to a resin-sealed semiconductor device, and particularly relates to a resin-sealed semiconductor device.
パッケージの小型、薄型化と、信頼性に優れた樹脂封止
型半導体装置に関する。This invention relates to a resin-sealed semiconductor device with a smaller, thinner package and superior reliability.
樹脂封止型半導体は、一般に、リードフレームのタブと
呼ばれる半導体素子支持体の上に、Ａ ｕ ／ Ｓ ｉ
の共晶や銀ペースト等を用いて半導体素子を固定した後
、樹脂封止する方式が採られている。このタブの周囲に
は内部リードが配置され、内部り一°ドと半導体素子は
、金、銅、アルミニウム等のボンディングワイヤによっ
て接続されている。Resin-sealed semiconductors are generally manufactured by A u / Si on a semiconductor element support called a tab of a lead frame.
A method is adopted in which a semiconductor element is fixed using eutectic, silver paste, etc., and then sealed with resin. An internal lead is arranged around this tab, and the internal lead and the semiconductor element are connected by bonding wires made of gold, copper, aluminum, or the like.
しかし、集積度の向上に伴う半導体素子寸法の大型化や
、実装方式の高密度化、自動化に伴うパッケージの小型
、薄型化が進むに従い、従来のようなタブの上に半導体
素子を固定する方式ではパッケージの小型化に限界があ
る。すなわち、半導体素子の大きさに合せたタブの周囲
にボンデイングワイヤを接続するための内部リードを設
けられているため、パッケージは半導体素子に比べて内
部リードを配置する部分だけ大きくしなければならない
。そこで、特開昭６１−２１８１３９号、及び、特開昭
６１−２５８４５８号公報に記載のように、新しい半導
体素子の固定方式として、タブを用いずに内部リードを
半導体素子の裏側に回り込ませて、その内部リードの上
に半導体素子を固定する方式が試みられている。However, as the dimensions of semiconductor elements increase due to increased integration, packaging methods become more dense, and packages become smaller and thinner due to automation, the conventional method of fixing semiconductor elements on tabs is changing. However, there are limits to the miniaturization of the package. That is, since internal leads for connecting bonding wires are provided around a tab that matches the size of the semiconductor element, the package must be larger than the semiconductor element in the area where the internal leads are placed. Therefore, as described in JP-A-61-218139 and JP-A-61-258458, a new method for fixing semiconductor elements is to wrap the internal leads around the back side of the semiconductor element without using tabs. Attempts have been made to fix a semiconductor element onto the internal leads.
タブを用いずに内部リードの上に半導体素子を固定する
場合、半導体素子の裏面で内部リードが短絡しないよう
に半導体素子の裏面を絶縁する必要がある。半導体素子
と内部リードの上に固定する時、ポリイミドやシリコー
ン樹脂などの絶縁性フィルムにエポキシ樹脂やシリコー
ンゴム等の接着剤を塗った絶縁性接着材で半導体素子と
内部リードを固定した場合、ポリイミドやシリコーン樹
脂は線膨張係数が大きいため、半導体素子を内部リード
に固定する時、半導体封止用樹脂により封止する時、半
田リフローの時等に線膨張係数の差により熱応力が発生
し、半導体素子の特性変動や、半導体素子のクラック、
半導体素子の裏面と内部リード間の剥離等が生じ、耐湿
信頼性や耐クラツク性が低下する。When a semiconductor element is fixed onto an internal lead without using a tab, it is necessary to insulate the back surface of the semiconductor element so that the internal lead does not short-circuit on the back surface of the semiconductor element. When fixing the semiconductor element and internal leads onto the semiconductor element and internal leads, if the semiconductor element and internal leads are fixed using an insulating adhesive material such as polyimide or silicone resin coated with an adhesive such as epoxy resin or silicone rubber, polyimide and silicone resins have a large coefficient of linear expansion, so thermal stress is generated due to the difference in coefficient of linear expansion when fixing a semiconductor element to an internal lead, when encapsulating it with semiconductor encapsulating resin, during solder reflow, etc. Changes in the characteristics of semiconductor devices, cracks in semiconductor devices,
Peeling occurs between the back surface of the semiconductor element and the internal leads, resulting in deterioration of moisture resistance and crack resistance.
本発明の目的は、タブを用いずに半導体素子を固定する
方式において、半導体素子を固定する絶縁性接着材に改
良を加えた半導体素子を提供することにある。An object of the present invention is to provide a semiconductor element in which an insulating adhesive for fixing the semiconductor element is improved in a method of fixing the semiconductor element without using a tab.
上記目的は、半導体素子を内部リードに固定するための
繕縁性接着材の線膨張係数を小さくすることによって達
成することができる。そこで、本発明者らは、絶縁性接
着材の種類や構成と半導体素子を内部リードに固定した
樹脂封止型半導体装置の信頼性の関係について詳細な検
討を行った。The above object can be achieved by reducing the coefficient of linear expansion of the edging adhesive for fixing the semiconductor element to the internal lead. Therefore, the present inventors conducted a detailed study on the relationship between the type and structure of the insulating adhesive and the reliability of a resin-sealed semiconductor device in which a semiconductor element is fixed to an internal lead.
その結果、熱硬化性樹脂に線膨張係数の小さい充填材を
配合し、半硬化状態にしたフィルムやガラス布、アラミ
ド布１石英布などの線膨張係数の小さい繊維に熱硬化性
樹脂を含浸させ、半硬化状態にしたプリプレグを、半導
体素子と内部リードを固定するための絶縁性接着材とし
て用いれば良いことを見出した。特に、ガラス布、アラ
ミド布、石英布などは線膨張係数が小さく、薄く織り上
げることができ、線膨張係数の小さい絶縁性接着材を容
易に得ることができる。さらに、これらの布に熱硬化性
樹脂を含浸させて半硬化状態にした絶縁性接着材は、エ
ポキシ樹脂、シリコーンゴムなどの接着剤を用いずにそ
れ自体を半導体素子と内部リードの間に挟み、加熱する
ことによって溶融。As a result, we blended a filler with a small linear expansion coefficient into a thermosetting resin, and impregnated the thermosetting resin into fibers with a small linear expansion coefficient, such as semi-cured film, glass cloth, aramid cloth, and quartz cloth. discovered that semi-cured prepreg can be used as an insulating adhesive to fix semiconductor elements and internal leads. In particular, glass cloth, aramid cloth, quartz cloth, etc. have a small linear expansion coefficient and can be woven thinly, making it possible to easily obtain an insulating adhesive material with a small linear expansion coefficient. Furthermore, insulating adhesives made by impregnating these cloths with thermosetting resin to a semi-cured state can be sandwiched between semiconductor elements and internal leads without using adhesives such as epoxy resins or silicone rubber. , melted by heating.
硬化するため、半導体素子を内部リードに容易に接着、
固定することができる。このような熱硬化性樹脂として
は、エポキシ樹脂、フェノール樹脂、シリコーン樹脂、
ポリエステル樹脂、付加重合型ポリイミド樹脂などを用
いることができる。これらの樹脂は、液状のものは無溶
剤で、固体のものは適当な溶剤に溶かしてガラス布、ア
ラミド布、石英布などに含浸させ、加熱して樹脂を半硬
化状態にすることで、薄い絶縁性接着材を作成すること
ができる。この絶縁性接着材は、半導体素子の大きさに
合せて適当な大きさに切断し、半導体素子と内部リード
の間にはさみ、加熱硬化することによって半導体素子を
固定することができる。It hardens, making it easy to bond semiconductor elements to internal leads.
Can be fixed. Such thermosetting resins include epoxy resins, phenolic resins, silicone resins,
Polyester resin, addition polymerization type polyimide resin, etc. can be used. These resins can be made into thin sheets by dissolving the liquid ones without a solvent, or by dissolving the solid ones in an appropriate solvent and impregnating glass cloth, aramid cloth, quartz cloth, etc., and heating the resin to a semi-hardened state. An insulating adhesive can be created. This insulating adhesive material can be cut into an appropriate size to match the size of the semiconductor element, sandwiched between the semiconductor element and the internal leads, and heated and cured to fix the semiconductor element.
このように、熱硬化性樹脂に線膨張係数の小さい充填材
と配合し、半硬化状態にしたり、熱硬化性樹脂を線膨張
係数の小さい繊維で織った布に含浸させ半硬化状態にし
た絶縁性接着材は、加熱硬化させた場合に樹脂だけで硬
化させた時に比べて線膨張係数が小さくなる。そのため
、半導体素子を内部リードに固定する時や、樹脂によっ
て封止した時、単円処理の時などに発生する熱応力が小
さくなり、半導体素子のクラックや特性変動が起こらず
、半導体装置の信頼性が向上する。In this way, thermosetting resin is blended with a filler with a small linear expansion coefficient to create a semi-hardened state, or thermosetting resin is impregnated into a fabric woven from fibers with a small linear expansion coefficient to create a semi-hardened state. When the adhesive is cured by heating, the coefficient of linear expansion becomes smaller than when it is cured with only resin. This reduces the thermal stress that occurs when semiconductor elements are fixed to internal leads, when sealed with resin, and during single-circle processing, which prevents cracks and characteristic changes in semiconductor elements, and increases the reliability of semiconductor devices. Improves sex.
以下に本発明の一実施例を説明する。 An embodiment of the present invention will be described below.
第１図は、本発明の一実施例の樹脂封止型半導体装置の
断面図である。１は半導体素子、２は内部リードであり
、これらは絶縁性接着材３によって固定されている。第
２図は、−船釣な、タブを用いずに半導体素子を固定す
る方式に使用するリードフレームの外観を示す。FIG. 1 is a sectional view of a resin-sealed semiconductor device according to an embodiment of the present invention. 1 is a semiconductor element, 2 is an internal lead, and these are fixed with an insulating adhesive 3. FIG. 2 shows the external appearance of a lead frame used in a method for fixing semiconductor elements without using tabs, such as by boat fishing.
［実施例１〜３］
第１表に掲げた布（基材）に、θ−クレゾールフェノー
ルノボラック型エポキシ樹脂、硬化剤。[Examples 1 to 3] A θ-cresol phenol novolak type epoxy resin and a curing agent were added to the cloth (base material) listed in Table 1.
硬化促進剤をＭＥＫ （メチルエチルケトン）に溶かし
たものを含浸させ、その後、９０℃で二十分間加熱し溶
媒を除去し、樹脂を半硬化状態にして薄い絶縁性接着材
を得る。これを１８０℃で工時間、加熱硬化させ繊維方
向（ｘｙ力方向における線膨張係数を測定した。It is impregnated with a hardening accelerator dissolved in MEK (methyl ethyl ketone), and then heated at 90° C. for 20 minutes to remove the solvent and semi-cure the resin to obtain a thin insulating adhesive. This was heated and cured at 180° C. for a working time, and the linear expansion coefficient in the fiber direction (xy force direction) was measured.
さらに、未硬化のプリプレグを適当な大きさに裁断した
ものを、半導体素子と内部リードの間にはさみ、１８０
℃で６０秒間加熱硬化させ、さらに１８０℃で一時間の
後硬化を行い、半導体素子をリードフレームに固定した
。これを、半導体封止樹脂により、金型温度１８０℃で
９０秒のトランスファー成形を行い、さらに１８０℃で
内時間の後、硬化を行って、樹脂封止型半導体装置を得
た。Furthermore, cut the uncured prepreg into an appropriate size and sandwich it between the semiconductor element and the internal lead.
C. for 60 seconds, and then post-cured at 180.degree. C. for one hour to fix the semiconductor element to the lead frame. This was transferred to a semiconductor sealing resin for 90 seconds at a mold temperature of 180°C, and then cured at 180°C for an additional period of time to obtain a resin-sealed semiconductor device.
［比較例］
平坦なガラス基板上で、ワニス状のポリイミドを均一に
延した後、１００℃で一時間加熱し、その後３５０℃ま
で昇温させて、ポリイミドのフィルムを得る。さらに、
このフィルムの両面にシリコーンゴムを塗布したものを
適当な大きさに裁断し、半導体素子と内部リードの間に
はさみ、加熱硬化することで半導体素子をリードフレー
ムに固定し、これを半導体封止用樹脂によりトランスフ
ァ成形し、後硬化を行って樹脂封止型半導体装置を得た
。[Comparative Example] Varnish-like polyimide is uniformly spread on a flat glass substrate, heated at 100° C. for one hour, and then heated to 350° C. to obtain a polyimide film. moreover,
This film, coated with silicone rubber on both sides, is cut to an appropriate size, sandwiched between the semiconductor element and the internal leads, and heated and cured to fix the semiconductor element to the lead frame, which is used for semiconductor encapsulation. Transfer molding was performed using resin and post-curing was performed to obtain a resin-sealed semiconductor device.
第１表に、これら絶縁性接着材を硬化させた後の線膨張
係数の測定結果を示す。本方式で用いた絶縁性接着材は
、従来のポリイミドに接着剤を塗付したＪ＠Ｍ性接着材
よりも線膨張係数が明らかに小さくなっていることがね
かる。Table 1 shows the measurement results of the linear expansion coefficients of these insulating adhesives after curing. The insulating adhesive used in this method has a coefficient of linear expansion that is clearly smaller than that of the conventional J@M adhesive made by applying adhesive to polyimide.
さらに、これらの絶縁性接着材を用いて半導体素子と内
部リードを固定し、樹脂封止した半導体装置を一５゛５
℃／３０ｎ＋１ｎ０１５０℃／３０＋ｍｉｎの冷熱サイ
クル試験を行い、半導体装置を分解し、半導体素子と内
部リードの接着状態をＷＡ察し、不良品の発生率を調べ
た。その結果を第２表に示す。Furthermore, the semiconductor element and internal leads were fixed using these insulating adhesives, and the resin-sealed semiconductor device was heated to 15°C.
A thermal cycle test was conducted at 150°C/30+min, the semiconductor device was disassembled, the adhesion state between the semiconductor element and the internal leads was observed by WA, and the incidence of defective products was investigated. The results are shown in Table 2.
第 ２ 表
第２表より、半導体素子と内部リードの接着用に線膨張
係数の小さい絶縁性接着材を用いた場合、線膨張係数の
差が小さくなり、冷熱サイクル試験時に発生する熱応力
が小さくなり、不良品の発生率が少なくなる。Table 2 From Table 2, when an insulating adhesive with a small coefficient of linear expansion is used to bond the semiconductor element and internal leads, the difference in coefficient of linear expansion becomes smaller and the thermal stress generated during the thermal cycle test becomes smaller. This reduces the incidence of defective products.
また、表面にＡＱ配線を施した半導体素子を絶縁性接着
材で固定した後、樹脂封止した半導体装置を、２６０’
Ｃの溶融半田槽に＋１秒間浸漬した後、１２０℃／２ａ
ｔｆｆｌのＰＣＴ試験（プレッシャークツカーテスト）
を行い、抵抗率変化を調べ、抵抗値が５０％以上変化し
た時を不良とした時の不良品の発生率を調べた。その結
果を第３表に示す。In addition, after fixing the semiconductor element with AQ wiring on the surface with an insulating adhesive, the semiconductor device is sealed with resin and placed at 260'
After being immersed in the molten solder bath of C for +1 second, 120℃/2a
tffl PCT test (Pressure Kutskar test)
The change in resistivity was investigated, and the incidence of defective products was investigated, with a change in resistance value of 50% or more being considered defective. The results are shown in Table 3.
第 ３ 表
第３表より、半導体素子と内部リードの固定用の絶縁性
接着材に、線膨張係数の小さいプリプレグを用いること
により、半導体素子と内部リードの接着性が向上し、Ｐ
ＣＴ試験による不良品の発生率が少なくなり、耐湿性が
向上する。Table 3 From Table 3, using prepreg with a small coefficient of linear expansion as the insulating adhesive for fixing the semiconductor element and internal leads improves the adhesion between the semiconductor element and the internal leads.
The incidence of defective products in CT tests is reduced, and moisture resistance is improved.
本発明によれば、半導体素子・絶縁性接着材、リードフ
レームの間に発生する熱応力を小さくし接着性が向上し
、耐温度サイクル性、耐湿性が向上する。According to the present invention, the thermal stress generated between the semiconductor element, the insulating adhesive, and the lead frame is reduced, the adhesiveness is improved, and the temperature cycle resistance and moisture resistance are improved.
第１図は本発明の一実施例の樹脂封止型半導体装置の断
面図、第２図は一般的なタブを用いずに半導体素子を固
定する方式に使用するリードフレームの正面図である。
１・・・半導体素子、２・・・内部リード、３・・・絶
縁性液筒１図
第２図FIG. 1 is a sectional view of a resin-sealed semiconductor device according to an embodiment of the present invention, and FIG. 2 is a front view of a lead frame used in a general method for fixing semiconductor elements without using tabs. 1... Semiconductor element, 2... Internal lead, 3... Insulating liquid cylinder 1 Figure 2
Claims (1)
絶縁性接着材で前記半導体素子を固定して樹脂封止する
樹脂封止型半導体装置において、リード部に前記半導体
素子を固定する前記絶縁性接着材として熱硬化性樹脂に
線膨張係数の小さい充填材を配合した半硬化状態のフィ
ルムを用いることを特徴とする樹脂封止型半導体装置。 ２、前記絶縁性接着材は前記熱硬化性樹脂に線膨張係数
の小さい繊維状物質を配合した半硬化状態のフィルムで
ある特許請求の範囲第１項記載の樹脂封止型半導体装置
。 ３、前記絶縁性接着材が、ガラス布、アラミド布、石英
布に熱硬化性樹脂を含浸し半硬化状態にしたフィルムで
ある特許請求の範囲第１項に記載の樹脂封止型半導体装
置。[Claims] 1. In a resin-sealed semiconductor device in which the semiconductor element is fixed to a lead frame part with an insulating adhesive and resin-sealed without using a support for the semiconductor element, the semiconductor element is attached to the lead part. A resin-sealed semiconductor device characterized in that a semi-cured film made of a thermosetting resin mixed with a filler having a small coefficient of linear expansion is used as the insulating adhesive for fixing the element. 2. The resin-sealed semiconductor device according to claim 1, wherein the insulating adhesive is a semi-cured film made of the thermosetting resin mixed with a fibrous material having a small coefficient of linear expansion. 3. The resin-sealed semiconductor device according to claim 1, wherein the insulating adhesive is a semi-cured film obtained by impregnating glass cloth, aramid cloth, or quartz cloth with a thermosetting resin.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32402187A JPH01166530A (en) | 1987-12-23 | 1987-12-23 | Resin-sealed semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP32402187A JPH01166530A (en) | 1987-12-23 | 1987-12-23 | Resin-sealed semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01166530A true JPH01166530A (en) | 1989-06-30 |
Family
ID=18161260
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP32402187A Pending JPH01166530A (en) | 1987-12-23 | 1987-12-23 | Resin-sealed semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01166530A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07106498A (en) * | 1993-10-05 | 1995-04-21 | Nec Corp | Lead frame for resin-sealed semiconductor device and its manufacture as well as resin-sealed semiconductor device |
| US6072243A (en) * | 1996-11-26 | 2000-06-06 | Sharp Kabushiki Kaisha | Semiconductor integrated circuit device capable of surely electrically insulating two semiconductor chips from each other and fabricating method thereof |
-
1987
- 1987-12-23 JP JP32402187A patent/JPH01166530A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH07106498A (en) * | 1993-10-05 | 1995-04-21 | Nec Corp | Lead frame for resin-sealed semiconductor device and its manufacture as well as resin-sealed semiconductor device |
| US6072243A (en) * | 1996-11-26 | 2000-06-06 | Sharp Kabushiki Kaisha | Semiconductor integrated circuit device capable of surely electrically insulating two semiconductor chips from each other and fabricating method thereof |
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