JPH01157435U - - Google Patents
Info
- Publication number
- JPH01157435U JPH01157435U JP1988047461U JP4746188U JPH01157435U JP H01157435 U JPH01157435 U JP H01157435U JP 1988047461 U JP1988047461 U JP 1988047461U JP 4746188 U JP4746188 U JP 4746188U JP H01157435 U JPH01157435 U JP H01157435U
- Authority
- JP
- Japan
- Prior art keywords
- resin layer
- lead frame
- infrared rays
- fixes
- seals
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000011347 resin Substances 0.000 claims description 2
- 229920005989 resin Polymers 0.000 claims description 2
- 239000011248 coating agent Substances 0.000 claims 1
- 238000000576 coating method Methods 0.000 claims 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Description
第１図は、本考案の一実施例の縦断面図である
。
１……チツプ、２……リードフレーム、３……
プラスチツクモールド、４……プリント板、５…
…ガラス質の樹脂層、６……赤外線。
FIG. 1 is a longitudinal sectional view of an embodiment of the present invention. 1...chip, 2...lead frame, 3...
Plastic mold, 4... Printed board, 5...
... Glassy resin layer, 6... Infrared rays.
Claims (1)
するプラスチツクモールド表面に赤外線を反射す
る樹脂層をコーテイングしたことを特徴とする耐
熱性パツケージ。 A heat-resistant package characterized by coating the surface of the plastic mold that seals and fixes the integrated circuit chip and lead frame with a resin layer that reflects infrared rays.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988047461U JPH01157435U (en) | 1988-04-07 | 1988-04-07 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1988047461U JPH01157435U (en) | 1988-04-07 | 1988-04-07 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01157435U true JPH01157435U (en) | 1989-10-30 |
Family
ID=31273669
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1988047461U Pending JPH01157435U (en) | 1988-04-07 | 1988-04-07 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01157435U (en) |
-
1988
- 1988-04-07 JP JP1988047461U patent/JPH01157435U/ja active Pending