JPH01154536A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

Info

Publication number
JPH01154536A
JPH01154536A JP62312254A JP31225487A JPH01154536A JP H01154536 A JPH01154536 A JP H01154536A JP 62312254 A JP62312254 A JP 62312254A JP 31225487 A JP31225487 A JP 31225487A JP H01154536 A JPH01154536 A JP H01154536A
Authority
JP
Japan
Prior art keywords
film
plasma
silica film
silica
water content
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62312254A
Other languages
Japanese (ja)
Inventor
Akira Ohashi
顕 大橋
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62312254A priority Critical patent/JPH01154536A/en
Publication of JPH01154536A publication Critical patent/JPH01154536A/en
Pending legal-status Critical Current

Links

Landscapes

  • Local Oxidation Of Silicon (AREA)
  • Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)

Abstract

PURPOSE:To eliminate a water content in a silica film, and prevent defects developing in an upper layer plasma nitride film, by a method wherein, after a silica film as a part of an interlayer insulating film is spread and baked, it is exposed in a plasma atmosphere to eliminate the water content, and then the upper insulating film is immediately formed. CONSTITUTION:On a lower layer wiring 2 formd on a semiconductor substrate 1, is formed a lower plasma nitride layer 3a, and thereon a silica film 4 is spread, which is baked and exposed in a plasma atmosphere to eliminate water content. After that, an upper layer plasma nitride film 3b is immediately formed to constitute an interlayer insulating film. Since water content contained in the silica film is surely eliminated by irradiation of nitrogen plasma, and then immediately the upper layer plasma nitride film is formed, moisture absorption in the silica film can be prevented, and the decrease of reliability due to water content in the silica film is prevented.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体装置の製造方法に関し、特に上下配線の
間に設けられる層間絶縁膜の製造方法に関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor device, and more particularly to a method for manufacturing an interlayer insulating film provided between upper and lower wirings.

〔従来の技術〕[Conventional technology]

従来、半導体装置の下層配線と上層配線とを電気絶縁す
る層間絶縁膜としてプラズマ化学的気相成長法で形成さ
れたシリコン窒化膜(以下、プラズマ窒化膜と略す)が
用いられる。通常、このプラズマ窒化膜は下層プラズマ
窒化膜と上層プラズマ窒化膜とで2層に形成しており、
これらの間に下層配線による段差を平坦化するための塗
布膜、一般にはリンを含んだシリカフィルムを形成して
いる。このシリカフィルムは、その塗布後300°Cの
窒素雰囲気中でベークを行い、しかる上で上層のプラズ
マ窒化膜を形成していた。
BACKGROUND ART Conventionally, a silicon nitride film (hereinafter abbreviated as plasma nitride film) formed by plasma chemical vapor deposition has been used as an interlayer insulating film that electrically insulates lower-layer wiring and upper-layer wiring of a semiconductor device. Usually, this plasma nitride film is formed in two layers: a lower plasma nitride film and an upper plasma nitride film.
A coating film, generally a phosphorus-containing silica film, is formed between these layers to flatten the level difference caused by the lower wiring. After coating, this silica film was baked in a nitrogen atmosphere at 300°C, and then an upper plasma nitride film was formed.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の製造方法で使用されるシリカフィルムは
リンを含んでいるため非常に吸湿性が高い性質を有して
いる。このため、シリカフィルムが水分を吸収したまま
上層のプラズマ窒化膜を形成すると、その後の熱処理で
シリカフィルムが水分を放出し上層のプラズマ窒化膜の
一部が膨れたり、弾は飛んだりする不良が多発していた
The silica film used in the above-mentioned conventional manufacturing method contains phosphorus and therefore has very high hygroscopic properties. For this reason, if the upper plasma nitride film is formed while the silica film absorbs water, the silica film will release water during subsequent heat treatment, causing defects such as swelling of a part of the upper plasma nitride film and flying bullets. It was happening frequently.

この不良の対策として、ベークから上層プラズマ窒化膜
形成までの時間を極力短縮する等の検討を行ってきたが
、シリカフィルムの吸湿が極めて短時間で発生するため
、半導体基板周辺の雰囲気の影口を受は易く、良好な状
態を維持することは非常に困難であった。
As a countermeasure to this defect, we have been considering methods such as shortening the time from baking to forming the upper plasma nitride film as much as possible, but since the silica film absorbs moisture in an extremely short period of time, the influence of the atmosphere around the semiconductor substrate remains. It was very difficult to maintain good condition.

本発明は、シリカフィルム中の水分を除去し、上層プラ
ズマ窒化膜に生じる不具合を防止することを可能にした
半導体装置の製造方法を提供することを目的としている
SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor device that makes it possible to remove moisture from a silica film and prevent problems occurring in the upper plasma nitride film.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の半導体装置の製造方法は、半導体基板上に設け
た下層配線上に下層プラズマ窒化膜を形成し、かつこの
上にシリカフィルムを塗布する工程と、このシリカフィ
ルムをベークしかつプラズマ雰囲気に晒して水分を除去
する工程と、その後直ちに上層のプラズマ窒化膜を形成
して層間絶縁膜を完成する工程とを含んでいる。
The method for manufacturing a semiconductor device of the present invention includes the steps of forming a lower plasma nitride film on a lower wiring provided on a semiconductor substrate, coating a silica film thereon, and baking the silica film and exposing it to a plasma atmosphere. The method includes a step of exposing to remove moisture, and immediately thereafter a step of forming an upper plasma nitride film to complete an interlayer insulating film.

〔実施例〕〔Example〕

次に、本発明を図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図乃至第3図は本発明の一実施例方法を工程順に示
す断面図である。
1 to 3 are cross-sectional views showing a method according to an embodiment of the present invention in the order of steps.

先ず、第1図に示すように、半導体基板1の絶縁膜上に
下層配線としてのアルミニウム配線2を形成した上に、
プラズマ化学的気相成長法により下層プラズマ窒化膜3
aを0.5μmの厚さに形成する。そして、前記アルミ
ニウム配線20段差を緩和するために、この配線2の上
にシリカフィルム4を0.1μmの厚さに塗布し、かつ
300°Cの窒素雰囲気中でベークを行う。
First, as shown in FIG. 1, an aluminum wiring 2 as a lower layer wiring is formed on an insulating film of a semiconductor substrate 1, and then
Lower plasma nitride film 3 formed by plasma chemical vapor deposition method
A is formed to have a thickness of 0.5 μm. Then, in order to reduce the level difference in the aluminum wiring 20, a silica film 4 is coated on the wiring 2 to a thickness of 0.1 μm, and baked in a nitrogen atmosphere at 300°C.

次いで、第2図に示すように、前記シリカフィルム4を
プラズマ気相成長装置内で、800Wの窒素プラズマP
に接触させる。このとき、シリカフィルム4を窒素プラ
ズマP雰囲気に10分間晒すと基板温度は約20°C上
昇し、30分間晒すと約50°C上昇する。この窒素プ
ラズマPに晒すことにより、シリカフィルム4中の水分
は容易にシリカフィルム外に除去され、プラズマ気相成
長装置外に排出される。
Next, as shown in FIG. 2, the silica film 4 was heated with 800W nitrogen plasma
contact with. At this time, if the silica film 4 is exposed to the nitrogen plasma P atmosphere for 10 minutes, the substrate temperature will rise by about 20°C, and if it is exposed for 30 minutes, it will rise by about 50°C. By exposing the silica film 4 to this nitrogen plasma P, the moisture in the silica film 4 is easily removed to the outside of the silica film and discharged to the outside of the plasma vapor deposition apparatus.

その後、第3図に示すように、直ちにシリカフィルム4
上にプラズマ化学的気相成長法により上層のプラズマ窒
化膜3bを0.5μmの厚さに形成し、層間絶縁膜を完
成する。
Thereafter, as shown in FIG. 3, the silica film 4 is immediately
An upper plasma nitride film 3b having a thickness of 0.5 μm is formed thereon by plasma chemical vapor deposition to complete an interlayer insulating film.

以下、フォトリソグラフィ工程と、フレオンと酸素の混
合ガスを用いたドライエツチング工程を経て、前記下層
プラズマ窒化膜3a、 シリカフィルム4.上層プラズ
マ窒化膜3bからなる層間絶縁膜にスルーホールを開孔
し、かつこの上から上層配線としての2N目のアルミニ
ウム配線5を形成することにより、多層配線構造が完成
される。
Thereafter, the lower plasma nitride film 3a, the silica film 4. A multilayer wiring structure is completed by forming a through hole in the interlayer insulating film made of the upper plasma nitride film 3b, and forming the 2Nth aluminum wiring 5 from above as the upper layer wiring.

したがって、この方法によれば、シリカフィルム4に含
まれる水分は窒素プラズマの照射によって確実に除去で
き、その後直ちに上層プラズマ窒化膜3bを形成するの
で、シリカフィルムにおける吸湿を防止でき、シリカフ
ィルム中の水分が原因とされる半導体装置の信頬性低下
を防止できる。
Therefore, according to this method, the moisture contained in the silica film 4 can be reliably removed by irradiation with nitrogen plasma, and then the upper plasma nitride film 3b is immediately formed, so moisture absorption in the silica film can be prevented, and the moisture contained in the silica film can be removed. It is possible to prevent deterioration in reliability of semiconductor devices caused by moisture.

ここで、塗布及びベークしたシリカフィルムをプラズマ
化学的気相成長装置内でCF4プラズマに晒し、このと
きシリカフィルムの表面を600〜800人エツチング
することによってシリカフィルム中の水分を除去するよ
うにしてもよい。
Here, the coated and baked silica film is exposed to CF4 plasma in a plasma chemical vapor deposition apparatus, and at this time, the surface of the silica film is etched 600 to 800 times to remove moisture in the silica film. Good too.

〔発明の効果] 以上説明したように本発明は、層間絶縁膜の一部として
のシリカフィルムを塗布し、かつベークした後にプラズ
マ雰囲気に晒して水分を除去し、その後直ちに上層絶縁
膜を形成しているので、シリカフィルムの吸湿をほぼ完
全に抑えることができ、上層絶縁膜の損傷等を防止して
信頼度の高い層間絶縁膜を形成できる効果がある。
[Effects of the Invention] As explained above, the present invention applies a silica film as a part of an interlayer insulating film, and after baking, exposes it to a plasma atmosphere to remove moisture, and then immediately forms an upper insulating film. Therefore, moisture absorption of the silica film can be almost completely suppressed, and damage to the upper insulating film can be prevented, resulting in the formation of a highly reliable interlayer insulating film.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図乃至第3図は本発明の一実施例方法を工程順に示
す断面図である。 1・・・半導体基板、2・・・下層配線(アルミニウム
配線)、3a・・・下層プラズマ窒化膜、4・・・シリ
カフィルム、3b・・・上層プラズマ窒化膜、5・・・
上層配線(アルミニウム配線)。
1 to 3 are cross-sectional views showing a method according to an embodiment of the present invention in the order of steps. DESCRIPTION OF SYMBOLS 1... Semiconductor substrate, 2... Lower layer wiring (aluminum wiring), 3a... Lower layer plasma nitride film, 4... Silica film, 3b... Upper layer plasma nitride film, 5...
Upper layer wiring (aluminum wiring).

Claims (1)

【特許請求の範囲】[Claims] (1)半導体基板上に設けた下層配線上に下層プラズマ
窒化膜を形成し、かつこの上にシリカフィルムを塗布す
る工程と、このシリカフィルムをベークしかつプラズマ
雰囲気に晒して水分を除去する工程と、その後直ちに上
層のプラズマ窒化膜を形成して層間絶縁膜を完成する工
程とを含むことを特徴とする半導体装置の製造方法。
(1) A step of forming a lower plasma nitride film on the lower layer wiring provided on the semiconductor substrate and applying a silica film thereon, and a step of baking the silica film and exposing it to a plasma atmosphere to remove moisture. A method for manufacturing a semiconductor device, comprising the steps of: and immediately thereafter forming an upper plasma nitride film to complete an interlayer insulating film.
JP62312254A 1987-12-11 1987-12-11 Manufacture of semiconductor device Pending JPH01154536A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62312254A JPH01154536A (en) 1987-12-11 1987-12-11 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62312254A JPH01154536A (en) 1987-12-11 1987-12-11 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH01154536A true JPH01154536A (en) 1989-06-16

Family

ID=18027023

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62312254A Pending JPH01154536A (en) 1987-12-11 1987-12-11 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH01154536A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0327526A (en) * 1989-06-23 1991-02-05 Nec Corp Manufacture of semiconductor integrated circuit device
JPH0555387A (en) * 1991-06-14 1993-03-05 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
JPH06252275A (en) * 1993-02-25 1994-09-09 Nippon Telegr & Teleph Corp <Ntt> Manufacture of semiconductor device
EP3736628A1 (en) 2019-05-10 2020-11-11 Canon Kabushiki Kaisha Electronic apparatus to which an accessory is removably attached and corresponding accessory and system

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0327526A (en) * 1989-06-23 1991-02-05 Nec Corp Manufacture of semiconductor integrated circuit device
JPH0555387A (en) * 1991-06-14 1993-03-05 Mitsubishi Electric Corp Semiconductor device and manufacture thereof
JPH06252275A (en) * 1993-02-25 1994-09-09 Nippon Telegr & Teleph Corp <Ntt> Manufacture of semiconductor device
EP3736628A1 (en) 2019-05-10 2020-11-11 Canon Kabushiki Kaisha Electronic apparatus to which an accessory is removably attached and corresponding accessory and system

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