JPH01151500U - - Google Patents
Info
- Publication number
- JPH01151500U JPH01151500U JP4518088U JP4518088U JPH01151500U JP H01151500 U JPH01151500 U JP H01151500U JP 4518088 U JP4518088 U JP 4518088U JP 4518088 U JP4518088 U JP 4518088U JP H01151500 U JPH01151500 U JP H01151500U
- Authority
- JP
- Japan
- Prior art keywords
- clock pulse
- state buffer
- buffer circuit
- shift register
- controlled
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000872 buffer Substances 0.000 claims 10
- 238000010586 diagram Methods 0.000 description 5
Landscapes
- Shift Register Type Memory (AREA)
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4518088U JPH01151500U (enExample) | 1988-04-01 | 1988-04-01 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP4518088U JPH01151500U (enExample) | 1988-04-01 | 1988-04-01 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01151500U true JPH01151500U (enExample) | 1989-10-19 |
Family
ID=31271497
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP4518088U Pending JPH01151500U (enExample) | 1988-04-01 | 1988-04-01 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01151500U (enExample) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010225132A (ja) * | 2009-03-19 | 2010-10-07 | Au Optronics Corp | 整合されたタッチパネルおよびその製造と作動方法 |
-
1988
- 1988-04-01 JP JP4518088U patent/JPH01151500U/ja active Pending
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2010225132A (ja) * | 2009-03-19 | 2010-10-07 | Au Optronics Corp | 整合されたタッチパネルおよびその製造と作動方法 |