JPH01151340A - System for synchronizing asynchronous line switching device - Google Patents

Abstract

PURPOSE:To prevent the scale of a circuit from being increased by providing a clock signal generating part to operate a synchronizing part, a recovery part, and an equalizer for waveform shaping provided in a device. CONSTITUTION:The synchronization of each asynchronous external line signal is performed by providing the synchronizing means 2 at the front stage of a line switching part 1. Also, by providing the recovery part 3 at the rear stage of the line switching part 1, the output of the line switching part 1 is recovered to an original signal corresponding to a synchronizing method at the synchronizing part 2. At this time, a clock signal to operate the synchronizing part 2, the recovery part 3, and the equalizer 4 for waveform shaping provided in the device is supplied from the clock signal generating part 5, and its frequency and phase are controlled. Therefore, even in case of providing the equalizer 4 for waveform shaping in multiple stages in the line switching part 1 according to the increase of the transmission speed of a signal, it is not required to extract the clock signal for the waveform shaping in each equalizer. In such a way, it is possible to prevent the scale of the circuit from being increased.

Description

[Detailed Description of the Invention] [Summary] Regarding a synchronization method in an asynchronous line switching device, in particular, a synchronization method for an asynchronous line switching device that can suppress deterioration of an external line signal occurring within the device using a simple equalizer. Regarding the method, when a large number of stages of internal waveform shaping equalizers are used in asynchronous line switching equipment as transmission speed increases, there is no need to extract the clock in each equalizer, and therefore the circuit size is reduced. In a line switching device that includes a line switching unit and exchanges and outputs asynchronous external line input, a clock is provided in front of the line switching unit to clock the external line input. a synchronizing means for synchronizing in accordance with the signal; a restoring section provided after the line switching section for restoring the output of the line switching section to the original signal; and a clock signal generation section that generates a clock signal for operating a provided waveform shaping equalizer.

[Industrial application field]

The present invention relates to a synchronization method in an asynchronous line switching device,
In particular, the present invention relates to a synchronization method for an asynchronous line switching device that can suppress deterioration of external line signals occurring within the device using a simple isometric device.

Signal exchange equipment that exchanges asynchronous line signals, especially PCM
In a switching device that handles signals, input signals from an external line are transferred to an internal switching device, such as a crossbar.
After the exchange is performed using a switch or the like, the waveform of the internally transmitted signal is shaped using a filter at the stage before outputting the external line, and the signal is output to the external line.

However, as the speed of the signals to be exchanged increases in the switching device, waveform distortion within the switching device becomes more noticeable, and therefore it is necessary to provide an internal waveform vase with a number of stages commensurate with the transmission speed.

It is desired that the structure for waveform shaping in such an asynchronous line switching device be as simple as possible.

[Conventional technology]

FIG. 5 shows an example of the configuration of a line switching device. In the same figure, input from an external line is interfaced with the external line via an input ink face unit 11, and then exchanged in a line switching unit 12 composed of a crossbar switch, etc., and then transferred to an output ink face unit. At step 13, the signal is interfaced with an external line and output.

The output interface unit 13 includes a contour unit 14, which performs waveform shaping and generates an external line output.

FIG. 6 shows an example of a line switching section with a multi-stage structure equivalent to the line switching section 12 in FIG.

In the same figure, 12 I, 122 and 123 are line switching units, which are connected in multiple stages and are configured to perform more complex switching operations.

FIG. 7 shows an example of a configuration in which high-speed signals are handled in a multi-stage circuit switching section as shown in FIG. , 142 are inserted, and the waveform is shaped each time it passes through each line switching section. As the transmission signal speed increases, each line switching unit 12 +
, 122, and 123 cannot be avoided.

FIG. 8 shows the structure of a flower vase 14 conventionally used in such cases. In the same figure, 1
5 is a waveform shaping means, and 16 is a clock signal extracting means. The clock signal extracting means 16 is composed of, for example, a phase locked loop (PLL) including a crystal filter and a voltage controlled oscillator. The waveform shaping means 15 is composed of, for example, a D-type flip-flop, and shapes the waveform of the input signal in synchronization with the clock of the clock extraction means 16 to generate an output signal.

[Problem that the invention seeks to solve]

As described above, in the conventional asynchronous line switching device, as the transmission speed increases, a large number of internal waveform shaping stages are required.

In this case, conventional internal waveform shaping equalizers extract a clock internally and perform waveform shaping using this clock, but the clock signal extraction means has a fairly complicated configuration as described above. Therefore, when the transmission speed is high and the line switching section has a multi-stage configuration, there is a problem that the circuit size of the switching device increases and it becomes expensive.

The present invention is an attempt to solve the problems of the prior art, and is aimed at solving the problems of the prior art. It is an object of the present invention to provide a synchronization method for an asynchronous circuit switching device that does not require clock extraction in a flower vase and can therefore prevent an increase in circuit scale.

[Means for solving problems]

FIG. 1 shows the basic configuration of the present invention. In a line switching device that includes a line switching unit 1 and exchanges and outputs asynchronous external line input, a synchronizing unit 2 and a restoring unit 3 are provided.
and a clock signal generating section 5.

The synchronizing means 2 is provided upstream of the line switching section 1 and synchronizes external line input according to a clock signal.

The restoring section 3 is provided after the line switching section 1 and restores the output of this line switching section to the original signal.

The clock signal generating section 5 generates a clock signal for operating the synchronizing section 2, the restoring section 3, and the equalizing layer 4 for waveform shaping provided in the device.

[For production]

The line switching device includes a line switching section and has a function of exchanging and outputting asynchronous external line input.

In such a device, a synchronization means is provided upstream of the line switching section, and all of the asynchronous external line signals are synchronized by means such as staff synchronization.

At the same time, a restoring section is provided downstream of the line switching section, and the output of the line switching section is restored to the original signal by a method such as stuff multiplexing and demultiplexing, depending on the synchronization method in the synchronization section.

At this time, the clock signal for operating the synchronization section, the restoration section, and the equalization layer for waveform shaping provided in the device is supplied from a clock signal generation section, but the frequency and phase of the clock signal are determined by the clock signal. It shall be adequately controlled by the department where it occurred.

Therefore, in the method of the present invention, even when multiple equalization layers for waveform shaping are provided in the line switching section as the signal transmission speed increases, each equalization layer has a There is no need to extract a clock signal, and an increase in circuit scale can be prevented.

〔Example〕

FIG. 2 shows the overall configuration of an embodiment of the present invention, and the same parts as in FIG. 5 are designated by the same numbers.
2 is a synchronization section, 22 is a clock signal generation section, 23 is a restoration section, and 24 is an output interface section.

FIG. 3 shows a detailed configuration example of the line switching unit 12, in which 121 and 122 are multi-stage line switching units;
4 is an equalization layer. Although a two-stage configuration is shown in the figure, the configuration is not limited to this, and may include a larger number of line switching sections and an intermediate equalization layer.

Each input signal on the external line is input to the input interface section 1.
After passing through step 1 and establishing an interface with the external line,
It is added to the synchronization unit 21 and set to a half-open state. Synchronization part 2
1 is configured as a stuff multiplexing means using, for example, stuff multiplexing conversion technology, and performs stuff synchronization using the clock signal A of the clock signal generating section 22. The synchronized input signal is input to the equalization layer 14 via the line switching section 121, and is subjected to waveform shaping using the clock signal B of the clock signal generation section 22. The equalized signal is further applied to the restoration section 23 via the line switching section 122.

The restoring unit 21 is configured as a means for restoring (destuffing) stuffed multiplexed signals using, for example, stuff multiplexing conversion technology in accordance with the configuration of the synchronizing unit 21, and uses the clock signal C of the clock signal generating unit 22. destuff operation to restore the original signal. The restored signal is interfaced with an external line at the output interface section 13 and output.

Here, the clock signal generating section 22 is the synchronizing section 21. A generator of the mask clock of the equalization layer 14 in the restoration unit 12 and the circuit switching unit 12, and its external output signal A.

Although B and C have the same frequency, their phases are managed in order to realize waveform shaping in each equalizer.

FIG. 4 shows an example of the structure of the equalization layer 14 according to the present invention, in which a simple device such as a D-type flip-flop circuit is used as the waveform shaping means 15.

To explain a specific example of the operation of this embodiment, a signal input from an external line is converted by the input interface section 11 into a signal format that is easy to process within the device. For example, an input bipolar signal is converted to TTL logic format. In the synchronization unit 21, the input interface unit 1
1 is converted into a signal synchronized with the clock signal A by, for example, stuff multiplex conversion. line switching section 12+,
In 12z, lines are exchanged using, for example, a crossbar switch, but the equalization layer 14 is used to suppress waveform deterioration.
Waveform shaping is performed by At this time, the frequencies and phases of the clock signals A and B are well managed by the clock signal generation section 22, so that the signal output from the synchronization section 21 is easily waveform-shaped by the equalization layer 14.

The signal output from the line switching section 12 is converted into a signal having the same information content as the external input signal by, for example, stuff separation (destuffing) conversion in the restoration section. At this time, since the frequency and phase of the clock signal C are well managed by the clock signal generating section 22, waveform shaping is easily performed at the first input stage of the restoring section 23.

The output interface unit 24 converts the signal output from the restoration unit 23 into a signal format suitable for an external line, for example, a bipolar format, and outputs the converted signal to the external line.

〔Effect of the invention〕

As explained above, according to the present invention, when a large number of internal waveform shaping equalization layers are used in an asynchronous line switching device as the transmission speed increases, each equalization layer has a flip-flop for waveform shaping. There is no need to extract a clock signal for operations such as a loop, and therefore an increase in circuit scale can be prevented. The method of the present invention is advantageous compared to the prior art in suppressing an increase in device scale, especially in the area of high-speed signals.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the basic configuration of the present invention, FIG. 2 is a diagram showing the overall configuration of an embodiment of the present invention, FIG. 3 is a diagram showing a detailed configuration example of a line switching section, and FIG. A diagram showing an example of the configuration of the equalization layer in the present invention, FIG. 5 is a diagram showing an example of the configuration of a line switching device, FIG. 6 is a diagram showing an example of the configuration of a line switching section with a multi-stage configuration, and FIG. 7 is a diagram showing an example of the configuration of a line switching unit with a multi-stage configuration. FIG. 8 is a diagram showing a configuration example of a conventional equalization layer. 11-Manual interface section 12, 121, 122--Line switching section 14-Equalizer 15-Waveform shaping means 21--Synchronization section 22-Clock signal generation section 23--Restoration section 24--Output interface section

Claims (1)

[Scope of Claims] A line switching device that includes a line switching unit (1) and exchanges and outputs asynchronous external line input, wherein the line switching device is provided upstream of the line switching unit (1) and converts the external line input in accordance with a clock signal. a synchronizing means (2) for synchronizing with the line switching unit (1), and a synchronizing unit (2) provided after the line switching unit (1);
), the synchronization section (2), the restoration section (3), and the equalizer (4) for waveform shaping provided in the device are operated. 1. A synchronization method for an asynchronous line switching device, comprising: a clock signal generator (5) that generates a clock signal for the synchronization of an asynchronous line switching device.