JPS6468039A - Network synchronizing system - Google Patents

Abstract

PURPOSE:To eliminate the need for a complicated interface to simplify the constitution by supplying a signal, which is extracted from the signal sent from a host device and has a clock component, to the synchronizing device of an exchange to generate a system clock whose frequency is synchronized with the input clock component. CONSTITUTION:The signal from a host line inputted from a terminal T3 is equalized and identified by an equalizer part 13 and is inputted to a clock extracting part 14, and the transmission line clock is extracted by a self-timing system. Meanwhile, the output of the equalizer part 13 and the output of the clock extracting part 14 are applied to a decoder part 12 to convert the transmission line code to a NRZ code. Then, a frame synchronizing signal is detected and the synchronism protecting operation is performed. Meanwhile, the output signal of the clock extracting part 14 is inputted to a subsidiary synchronizing part 4 provided on the exchange main body side to generate the system clock, whose frequency is synchronized with the host line, in a block 4. Thus, an equalizer and a frame analyzer are unnecessary because the exchange and a multiplexer are operated by clocks having the same frequency and phase.