JPH01151259A - Semiconductor device - Google Patents
Semiconductor deviceInfo
- Publication number
- JPH01151259A JPH01151259A JP31006087A JP31006087A JPH01151259A JP H01151259 A JPH01151259 A JP H01151259A JP 31006087 A JP31006087 A JP 31006087A JP 31006087 A JP31006087 A JP 31006087A JP H01151259 A JPH01151259 A JP H01151259A
- Authority
- JP
- Japan
- Prior art keywords
- element fixing
- semiconductor device
- electrode lead
- thin
- semiconductor element
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 title claims abstract description 40
- 238000005530 etching Methods 0.000 abstract description 3
- 238000000034 method Methods 0.000 abstract 1
- 239000011347 resin Substances 0.000 description 4
- 229920005989 resin Polymers 0.000 description 4
- 230000000694 effects Effects 0.000 description 1
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 1
- 239000010931 gold Substances 0.000 description 1
- 229910052737 gold Inorganic materials 0.000 description 1
- 239000000463 material Substances 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は特に樹脂封止型半導体装置を薄型化するだめに
、半導体素子固着部の構造に改良を加えた半導体装置に
関する。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention particularly relates to a semiconductor device in which the structure of a semiconductor element fixing portion is improved in order to reduce the thickness of the resin-sealed semiconductor device.
低コスト民生機器用として大量使用されている樹脂封止
型半導体装置は、近年高密度化のために小型化、薄型化
が強く要求されている。2. Description of the Related Art In recent years, there has been a strong demand for resin-sealed semiconductor devices, which are used in large quantities for low-cost consumer equipment, to be smaller and thinner in order to achieve higher density.
第３図、第４図は、リードフレームを用いて組立てた従
来の樹脂封止型半導体装置の透視して示した断面図およ
び平面図である。半導体素子１は半導体素子固着部２に
接合材により固着されている。半導体素子の電極は半導
体素子固着部２と一体に形成された電極リード３と金線
等により電気的に接続され、該電極リード３は樹脂パッ
ケージ４より外部へ導出されている。FIGS. 3 and 4 are a transparent cross-sectional view and a plan view of a conventional resin-sealed semiconductor device assembled using a lead frame. The semiconductor element 1 is fixed to the semiconductor element fixing part 2 with a bonding material. The electrodes of the semiconductor element are electrically connected to electrode leads 3 integrally formed with the semiconductor element fixing part 2 by gold wires, etc., and the electrode leads 3 are led out from the resin package 4.
上記半導体装置を薄型化する場合、−船釣には樹脂パッ
ケージ上部厚ｔ２．下部厚ｔ３ ｅ半導体素子固着部を
それぞれ薄くする手段が取られる。When making the semiconductor device thinner, - For boat fishing, the upper part of the resin package has a thickness of t2. Lower thickness t3 e Measures are taken to make each of the semiconductor element fixing portions thinner.
上記の手段だけでは薄型化が不十分な場合にはさらに半
導体素子固着部厚ｔ、を薄くすることが必要となる。If the above measures alone are insufficient to reduce the thickness, it is necessary to further reduce the thickness t of the semiconductor element fixing portion.
しかるに、前記半導体素子固着部厚ｔ４を薄くすること
は半導体素子固着部２と一体に形成されている電極リー
ド３を簿くすることになり、電極リードの強度が低下し
リードが変形し易くなるため、製品歩留シの低下又は品
質の低下を招く等の問題があった。However, reducing the thickness t4 of the semiconductor element fixing part means that the electrode lead 3, which is integrally formed with the semiconductor element fixing part 2, is made smaller, which reduces the strength of the electrode lead and makes it easier to deform. Therefore, there were problems such as a decrease in product yield or quality.
本発明は、上記のような問題点を解消することを目的と
したものである。The present invention aims to solve the above problems.
本発明の半導体装置は、半導体素子固着部が電極リード
の板厚より薄く形成されている。又前記半導体素子固着
部の素子固着面が凹状に電極リードの板厚より薄く形成
されている。In the semiconductor device of the present invention, the semiconductor element fixing portion is formed to be thinner than the plate thickness of the electrode lead. Further, the element fixing surface of the semiconductor element fixing part is formed in a concave shape and is thinner than the plate thickness of the electrode lead.
以下詳細な説明を実施例に基づき行う。 A detailed explanation will be given below based on examples.
第１図に本発明に係る一実施例を示す。FIG. 1 shows an embodiment according to the present invention.
この実施例においては、半導体素子固着部２の素子固着
面全体をエツチングにより薄くしたものである０例えば
電極リードの板厚が０．１５ｍｍで、半導体素子固着部
の厚さをα０７菌まで薄くした場合には、その差のα０
８ｍ５＋薄く、かつ樹脂パッケージより４より外部へ導
出されている電極リードの強度低下をきたすことのない
半導体装置を提供することが可能である。In this example, the entire element fixing surface of the semiconductor element fixing part 2 is thinned by etching. For example, the electrode lead plate thickness is 0.15 mm, and the thickness of the semiconductor element fixing part is reduced to α07. In this case, the difference α0
It is possible to provide a semiconductor device that is 8 m5+ thin and does not cause a decrease in the strength of the electrode leads led out from the resin package.
第２図は本発明の他の一実施例を示す。FIG. 2 shows another embodiment of the invention.
この実施例においては、半導体素子固着部２の素子固着
面外周部に環状の土手５を残し中央部のみをエツチング
により薄くしたものである。該土手を設けたことＫより
該半導体素子固着部２の断面２次モーメントを大きくす
ることができるため、中央部の厚さを前記実施例よりも
薄くすることが可能である。例えば電極リードの板厚が
［Ｌ１５態で半導体素子固着部２の中央部の厚さを（１
０５閣まで薄くした場合には、その差α１＋ｍｇ薄い半
導体装置を提供することが可能である。なお、前記環状
の土手を相対する２方向のみの土手とすることも効果的
である。In this embodiment, an annular bank 5 is left on the outer periphery of the element fixing surface of the semiconductor element fixing part 2, and only the central part is thinned by etching. By providing the bank, the moment of inertia of the semiconductor element fixing portion 2 can be increased, so that the thickness of the central portion can be made thinner than in the previous embodiment. For example, when the plate thickness of the electrode lead is [L15], the thickness of the central part of the semiconductor element fixing part 2 is (1
When the thickness is reduced to 0.05 mm, it is possible to provide a semiconductor device that is thinner by the difference α1+mg. Note that it is also effective to configure the annular bank as a bank in only two opposing directions.
以上の如く、本発明によれば電極リードの強度を低下さ
せることがなく、従って高い歩留りで高品質の薄型化さ
れた半導体装置を提供することが可能である。As described above, according to the present invention, there is no reduction in the strength of the electrode leads, and therefore it is possible to provide a high-quality, thin semiconductor device with a high yield.
第１図は本発明による一実施例で、半導体装置の断面図
、第２図は本発明による他の一実施例で半導体装置の断
面図、第３図、第４図は、リードフレームを用いて組立
てた従来の半導体装置の透視して示した平面図および断
面図である。
１・・・・・・・・・半導体素子
２・・・・・・・・・半導体素子固着部３・・・・・・
・・・電極リード
４・・・・・・・・・樹脂パッケージ
５・・・・・・・・・環状の土手
第１図
第２図
第３図
笑４じFIG. 1 is a cross-sectional view of a semiconductor device according to an embodiment of the present invention, FIG. 2 is a cross-sectional view of a semiconductor device according to another embodiment of the present invention, and FIGS. 3 and 4 are sectional views of a semiconductor device using a lead frame. FIG. 2 is a perspective plan view and a cross-sectional view of a conventional semiconductor device assembled together. 1... Semiconductor element 2... Semiconductor element fixing part 3...
・・・Electrode lead 4・・・・・・・・・Resin package 5・・・・・・Ring-shaped embankment Figure 1 Figure 2 Figure 3 LOL 4 Figure
Claims (2)
ム枠に支持する支持リードと半導体素子の電極に接続さ
れた複数の電極リードとを有する半導体装置において、
該素子固着部が前記電極リードの板厚より薄く形成され
ていることを特徴とする半導体装置。(1) A semiconductor device having a semiconductor element fixing part, a support lead that supports the element fixing part on a lead frame frame, and a plurality of electrode leads connected to electrodes of the semiconductor element,
A semiconductor device characterized in that the element fixing portion is formed thinner than the plate thickness of the electrode lead.
ードの板厚より薄く形成されていることを特徴とする特
許請求の範囲第１項記載の半導体装置。(2) The semiconductor device according to claim 1, wherein in the element fixing portion, the element fixing surface is formed in a concave shape and is thinner than the plate thickness of the electrode lead.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31006087A JPH01151259A (en) | 1987-12-08 | 1987-12-08 | Semiconductor device |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP31006087A JPH01151259A (en) | 1987-12-08 | 1987-12-08 | Semiconductor device |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01151259A true JPH01151259A (en) | 1989-06-14 |
Family
ID=18000683
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP31006087A Pending JPH01151259A (en) | 1987-12-08 | 1987-12-08 | Semiconductor device |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01151259A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002184911A (en) * | 2000-12-15 | 2002-06-28 | Nippon Inter Electronics Corp | Resin sealed electronic component |
| JP2002198482A (en) * | 2000-12-25 | 2002-07-12 | Hitachi Ltd | Semiconductor device and manufacturing method thereof |
| JP2002353403A (en) * | 2001-03-05 | 2002-12-06 | Samsung Electronics Co Ltd | Ultra-thin semiconductor package and manufacturing method therefor |
-
1987
- 1987-12-08 JP JP31006087A patent/JPH01151259A/en active Pending
Cited By (4)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JP2002184911A (en) * | 2000-12-15 | 2002-06-28 | Nippon Inter Electronics Corp | Resin sealed electronic component |
| JP2002198482A (en) * | 2000-12-25 | 2002-07-12 | Hitachi Ltd | Semiconductor device and manufacturing method thereof |
| JP2002353403A (en) * | 2001-03-05 | 2002-12-06 | Samsung Electronics Co Ltd | Ultra-thin semiconductor package and manufacturing method therefor |
| JP4549608B2 (en) * | 2001-03-05 | 2010-09-22 | 三星電子株式会社 | Ultra-thin semiconductor package and manufacturing method thereof |
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