JPH0536882A - Semiconductor frame - Google Patents

Abstract

PURPOSE:To enable a package to be protected against warpage and improved in dimensional accuracy by a method wherein a thick-walled edge frame is provided to the peripheral edge of a die pad where a semiconductor chip is fixed. CONSTITUTION:A die pad 3 is provided with an edge frame 3a at its peripheral edge, and a semiconductor chip is fixed to the pad 3. A lead frame 4 is arranged around the die pad 3 and connected to the electrodes of the semiconductor chip with fine wires. A semiconductor frame constituted as above is sealed up with resin excluding the outer lead of the lead frame 4 for the formation of a package body after a die bonding and wire bonding operation is finished. In this case, the die pad 3 is enhanced in strength by the edge frame 3a, so that a package can be protected against warpage.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a semiconductor frame, and more particularly to prevention of warpage after resin encapsulation.

[0002]

2. Description of the Related Art FIG. 4 is a plan view showing a conventional semiconductor frame, and FIG. 5 is a sectional view taken along line VV in FIG. In the figure, reference numeral 1 denotes a die pad on which a semiconductor chip (not shown) is fixed, and 2 is connected to an electrode (not shown) of the semiconductor chip arranged around the die pad 1 by a thin wire (not shown). It is a lead frame.

The semiconductor frame constructed as described above is formed by a package body (not shown) which is die-bonded, wire-bonded and further sealed with resin except for the outer lead portions of the lead frame.

[0004]

Since the conventional semiconductor frame is constructed as described above, the strength of the die pad itself is weak and there is a problem that the package warps after die bonding, wire bonding, and resin sealing. there were.

The present invention has been made to solve the above problems, and an object thereof is to obtain a semiconductor frame capable of preventing the warp of a package.

[0006]

A semiconductor frame according to the present invention is such that a thick edge frame is formed at the peripheral edge of a die pad for fixing a semiconductor chip.

[0007]

The edge frame of the die pad in the semiconductor frame of the present invention improves the strength of the die pad and prevents warping of the package.

[0008]

EXAMPLES Example 1. Embodiment 1 of the present invention will be described below with reference to the drawings. 1 is a plan view showing a semiconductor frame according to the present invention, FIG. 2 is a sectional view taken along the line II-II in FIG. 1, and FIG. 3 is a perspective view showing the die pad in FIG. In the figure, 3 is a die pad to which a semiconductor chip (not shown) is fixed and whose peripheral portion is formed by an edge frame 3a.
Is a lead frame which is arranged around the die pad 3 and is connected to electrodes (not shown) of the semiconductor chip by thin wires (not shown).

The semiconductor frame constructed as described above is formed by a package body (not shown) which is die-bonded and wire-bonded and further sealed with resin except for the outer lead portions of the lead frame. In this case, since the strength of the die pad 3 is improved by the edge frame 3a, the warp of the package can be prevented.

Embodiment 2. In the first embodiment, the edge frame 3a provided on the die pad 3 is located above the semiconductor chip fixing surface, but the same effect can be obtained by providing it on the lower surface side.

[0011]

As described above, according to the present invention, since the thick edge frame is formed at the peripheral portion of the die pad for fixing the semiconductor chip, the warp of the package can be prevented and the semiconductor having high dimensional accuracy can be obtained. There is an effect that a frame for use is obtained.

[Brief description of drawings]

FIG. 1 is a plan view showing a semiconductor frame according to a first embodiment of the present invention.

2 is a cross-sectional view taken along the line II-II in FIG.

3 is a perspective view showing the die pad in FIG. 1. FIG.

FIG. 4 is a plan view showing a conventional semiconductor frame.

5 is a cross-sectional view taken along the line VV in FIG.

[Explanation of symbols]

 3 Die pad 3a Edge frame 4 Lead frame

Claims (1)

Claims: 1. A semiconductor chip is fixed to a die pad,
A semiconductor frame, in which a lead frame is arranged in the peripheral portion of the die pad, wherein a thick edge frame is formed at a peripheral portion of the die pad.