JPH01150395A - Erroneous operation preventive circuit for electronic device - Google Patents

Erroneous operation preventive circuit for electronic device

Info

Publication number
JPH01150395A
JPH01150395A JP62310226A JP31022687A JPH01150395A JP H01150395 A JPH01150395 A JP H01150395A JP 62310226 A JP62310226 A JP 62310226A JP 31022687 A JP31022687 A JP 31022687A JP H01150395 A JPH01150395 A JP H01150395A
Authority
JP
Japan
Prior art keywords
circuit
unit
electronic device
signal
units
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62310226A
Other languages
Japanese (ja)
Inventor
Michio Takayama
高山 美知男
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62310226A priority Critical patent/JPH01150395A/en
Publication of JPH01150395A publication Critical patent/JPH01150395A/en
Pending legal-status Critical Current

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  • Logic Circuits (AREA)
  • Mounting Of Printed Circuit Boards And The Like (AREA)
  • Direct Current Feeding And Distribution (AREA)
  • Control Of Voltage And Current In General (AREA)

Abstract

PURPOSE:To prevent the function of an electronic device from being stopped at the time of insertion and pulling-out of units by a method wherein an erroneous operation preventive circuit for preventing an erroneous operation at the time of delivery and receipt of the signal between the units at the time of insertion and pulling-out of the units in and from the device is mounted in the units. CONSTITUTION:A power supply is supplied to a mounting state informing circuit 14, an enable signal reception circuit 11 and an input/output signal control circuit 12 by a power (f) from an external power supply (x) before a unit 30 is inserted. Here, as an enable signal (d) is not received, the circuit 11 transmits information that an output signal (a) is disable to the circuit 12. When the signal (a) is in disable state, the output part of the circuit 12 is brought into the state of a high impedance. In this state, when the unit 30 is inserted in a shelf 20, the circuit 12 does not bring an erroneous operation to a device because the signal (a) is in the state of a high impedance. When the unit 30 is mounted to the device, the unit performs a normal delivery and receipt of signal between other mounting finished units and the unit. Reversely, in case the unit 30 is pulled out of the device, the circuit 12 is never operated erroneously when the external power supply is ready-connected to the unit 30.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は電子装置の誤動作防止回路に関する。[Detailed description of the invention] [Industrial application field] The present invention relates to a malfunction prevention circuit for electronic devices.

〔従来の技術〕[Conventional technology]

従来、ユニットの挿抜を行う場合は、通常電子装置の電
源を停止させて行っており、電子装置の機能の一時停止
をして行っていた。しかしながら電子装置の規模の拡大
、機能の多様化等により、この−時停止が許容されぬも
のとなり、そこで、従来は、ユニットの電子装置へ接続
するコネクタ部の端子寸法を差別化し、例えば、長短二
種類の端子にして、電子装置への挿入時に長い端子が先
ず接続し、次に短い端子が接続するようにし段階的にユ
ニットを挿入して接続させている。
Conventionally, when inserting or removing a unit, the power to the electronic device has usually been stopped, and the functions of the electronic device have been temporarily stopped. However, due to the expansion of the scale of electronic devices and the diversification of their functions, this temporary stop is no longer acceptable. Therefore, in the past, the terminal dimensions of the connector section that connects to the electronic device of the unit were differentiated, such as long and short. Two types of terminals are used, and when the unit is inserted into an electronic device, the long terminal is connected first, followed by the short terminal, so that the unit is inserted and connected in stages.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来のユニット挿抜方法では、電子装置活性時
のユニット挿抜のタイミングの遅早によっては、電源供
給の保証や、ユニット挿抜過渡期の出力信号の状態レベ
ルの保証等に問題があり、必ずしも全ての誤動作を防止
するまでには到らず、システム全体の機能が一時停止す
る場合があるという欠点がある。
In the conventional unit insertion/removal method described above, depending on the timing of unit insertion/removal when the electronic device is activated, there are problems in guaranteeing the power supply and guaranteeing the state level of the output signal during the transition period of unit insertion/removal. However, this method does not go so far as to prevent malfunctions of the system, and has the disadvantage that the function of the entire system may be temporarily stopped.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の電子装置の誤動作防止回路は、電子装置を構成
する各ユニットの実装状態を通知する実装状態通知回路
と、前記実装状態に呼応して前記電子装置から発せられ
前記ユニット動作の実行又は停止を制御するイネーブル
信号を受信するイネーブル信号受信回路と、前記電子装
置から挿抜されない他ユニットへの信号出力を前記イネ
ーブル信号を用いて制御する出力信号制御回路と、前記
電子装置の内部電源から供給される電力と前記電子装置
の外部電源から供給される電力との論理和をとり前記ユ
ニットへ電源を供給する電源統合回路とを有して構成し
、前記電子装置から前記ユニットの挿抜時の前記電子装
置の誤動作を防止する。
A malfunction prevention circuit for an electronic device according to the present invention includes a mounting state notification circuit that notifies the mounting state of each unit constituting the electronic device, and a mounting state notification circuit that issues a signal from the electronic device in response to the mounting state to execute or stop the operation of the unit. an enable signal receiving circuit that receives an enable signal to control the electronic device; an output signal control circuit that uses the enable signal to control signal output to other units that are not inserted or removed from the electronic device; and a power supply integrated circuit that logically ORs the power supplied from the external power source of the electronic device and the power supplied from the external power source of the electronic device and supplies power to the unit, Prevent equipment malfunction.

〔実施例〕〔Example〕

次に、本発明の実施例について図面を参照して説明する
Next, embodiments of the present invention will be described with reference to the drawings.

第1図は本発明の一実施例を示ず回路図、第2図は第1
図に示す本実施例が適用されているユニットが電子装置
のシェルフがら挿抜されている状態を示す模式図である
Fig. 1 is a circuit diagram of an embodiment of the present invention, and Fig. 2 is a circuit diagram of an embodiment of the present invention.
FIG. 2 is a schematic diagram showing a state in which a unit to which the illustrated embodiment is applied is inserted into and removed from a shelf of an electronic device.

第1図において本実施例の電子装置の誤動作防止回路1
は、誤動作防止回路1が実装されたユニット(図示省略
)がらのイネ−プル信号dを論理反転させるインバータ
回路からなるイネーブル信号受信回路11と、イネーブ
ル信号受信回路11からのイネーブル信号dを論理反転
させた信号子とユニットからの入力信号すとの論理積否
定をとって出力信号aを出力をするNAND回路からな
る出力信号制御回路12と、ユニットの内部電源からの
電力eと外部電源(図示省略)がらの電力fとの論理和
によって供給電力gを出力する電源統合回路13と、供
給電力gを受けると実装状態信号りを出力する実装状態
通知回路14とを有して構成している。
In FIG. 1, a malfunction prevention circuit 1 for an electronic device according to the present embodiment is shown.
The enable signal receiving circuit 11 is composed of an inverter circuit that logically inverts the enable signal d from the unit (not shown) in which the malfunction prevention circuit 1 is mounted, and the enable signal d from the enable signal receiving circuit 11 is logically inverted. The output signal control circuit 12 consists of a NAND circuit that performs the logical AND NOT of the input signal S from the unit and the input signal S from the unit, and outputs the output signal a. (omitted), and a power supply integrated circuit 13 that outputs the supplied power g by logical sum with the power f of the power supply g, and a mounting state notification circuit 14 that outputs a mounting state signal when it receives the supplied power g. .

第2図においては、本実施例の誤動作防止回路lが実装
されているユニット3oが、電子装置(図示省略)のシ
ェルフ20がら挿抜されている状態を示している。
FIG. 2 shows a state in which a unit 3o in which the malfunction prevention circuit l of this embodiment is mounted is inserted into and removed from a shelf 20 of an electronic device (not shown).

次に、本実施例の動作について第1図、第2図を併用し
て説明する。
Next, the operation of this embodiment will be explained using FIG. 1 and FIG. 2 together.

電子装置(以下装置と記す)のシェルフ2oヘユニツト
30を挿入する時点およびシェルフ2゜からユニット3
0を抜き出す時点には、必ず、外部電源からの電力fを
電源統合回路13に供給しておく。
At the time of inserting the unit 30 into the shelf 2o of an electronic device (hereinafter referred to as the device) and from the shelf 2° to the unit 3
When extracting 0, the power f from the external power supply is always supplied to the power supply integrated circuit 13.

外部電源の電力fは電源統合回路13に送られこれを通
過しユニット3o内で消費される。
Electric power f from the external power source is sent to the power source integrated circuit 13, passes therethrough, and is consumed within the unit 3o.

先ず、ユニット30挿入前には外部電源からの電力fに
より、実装状態通知回路14とイネーブル信号受信回路
11および人出信号制御回路12に電源供給を行う。
First, before the unit 30 is inserted, power is supplied to the mounting state notification circuit 14, the enable signal receiving circuit 11, and the turnout signal control circuit 12 using electric power f from an external power source.

ここで、ユニット3oは未だシェルフ2oに挿入されて
いないので、イネーブル信号dは受信されていない、従
ってイネーブル信号受信回路11は出力信号制御回路1
2に対して出力信号aをディスエーブルとする情報を送
信する。出方信号制御回路12の出力部はオープンコレ
−フタ又は3ステート等のデバイスを用いてディスエー
ブル時にはハイインピーダンスとなる。
Here, since the unit 3o has not yet been inserted into the shelf 2o, the enable signal d has not been received.
2, transmits information to disable the output signal a. The output section of the output signal control circuit 12 uses a device such as an open collector or 3-state, and becomes high impedance when disabled.

次に上記状態にてユニット3oをシェルフ2゜に挿入す
る。ユニット3oの出力信号はハイインピーダンスとな
っているので、装置に対して誤動作をもたらすことはな
い。
Next, in the above state, the unit 3o is inserted into the shelf 2°. Since the output signal of the unit 3o is high impedance, it will not cause malfunction to the device.

ユニット30が装置に実装されると、先ず、実装状態通
知回路14で作成した実装状態信号りが装置に通知され
、装置側ではこの実装状態信号りに呼応してイネ−プル
信号dを送信するので、これをイネーブル信号受信回路
11で受ける。イネーブル信号受信回路11では、この
イネーブル信号dに従いイネーブル信号dの論理反転し
たイネーブル情報1を出カ信号制御回2812に送信す
る。出力信号制御回路12ではイネーブル情報正に従い
、入力信号すの出力をイネーブルとする。
When the unit 30 is mounted on a device, first, the mounting state signal created by the mounting state notification circuit 14 is notified to the device, and the device side transmits an enable signal d in response to this mounting state signal. Therefore, this is received by the enable signal receiving circuit 11. The enable signal receiving circuit 11 transmits enable information 1, which is the logical inversion of the enable signal d, to the output signal control circuit 2812 in accordance with the enable signal d. The output signal control circuit 12 enables the output of the input signal according to the enable information.

以後、本ユニット3oは他の実装済ユニットとの間で通
常の信号の授受を行う。
Thereafter, this unit 3o performs normal signal exchange with other mounted units.

又、ユニット30が装置に実装されると、装置の内部電
源が電力eを電源統合回路13に供給するので、以後内
部電源を用いてユニット30を動作させれば良いので、
ユニット30と外部電源との接続は外して良い。
Furthermore, when the unit 30 is mounted on the device, the internal power supply of the device supplies power e to the power supply integrated circuit 13, so that from now on, the unit 30 can be operated using the internal power supply.
The connection between the unit 30 and the external power source may be removed.

逆に、ユニット30を装置から抜き出す場合も、先ず外
部電源をユニット30に接続しておけば、抜き出す時の
過渡期においても電源供給が保証されることにより出力
信号制御回路12が誤動作することはない。
Conversely, when the unit 30 is removed from the device, if the external power supply is connected to the unit 30 first, the output signal control circuit 12 will not malfunction because the power supply will be guaranteed even during the transition period when the unit 30 is removed. do not have.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明は、電子装置を構成するユ
ニット内に本発明による誤動作防止回路を実装すること
により、ユニットの挿抜時に電子装置に誤動作を与える
要因が無くなり、電子装置の機能停止をさせず、かつ電
子装置活性時にても誤動作することなく、ユニットの挿
抜を行うことが出来て、特に、実装状態通知回路からの
ユニットへの電力供給状態であることを示す実装状態信
号によってイネーブル信号を出力させるので、従来起き
ていたユニットの挿抜時でのシステム全体の機能の一時
停止をなくすることができる効果がある。
As explained above, the present invention implements the malfunction prevention circuit according to the present invention in a unit constituting an electronic device, thereby eliminating a factor that causes malfunction of the electronic device when the unit is inserted or removed, thereby preventing the electronic device from malfunctioning. In particular, it is possible to insert and remove the unit without causing malfunction even when the electronic device is active, and in particular, it is possible to use the enable signal by the mounting state signal indicating that power is being supplied to the unit from the mounting state notification circuit. This has the effect of eliminating the temporary stoppage of the entire system's functions when a unit is inserted or removed, which conventionally occurs.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例案示す回路図、第2図は第1
図に示す本実施例が適用されているユニートが電子装置
のシェルフから挿抜されている状態を示す模式図である
。 1・・・誤動作防止回路、11・・・イネーブル信号受
信回路、12・・・出力信号制御回路、13・・・電源
統合回路、14・・・実装状態通知回路。 代理人 弁理士  内 原  晋 第1図 第2図
Fig. 1 is a circuit diagram showing one embodiment of the present invention, and Fig. 2 is a circuit diagram illustrating an embodiment of the present invention.
FIG. 2 is a schematic diagram showing a state in which a unit to which the illustrated embodiment is applied is inserted and removed from a shelf of an electronic device. DESCRIPTION OF SYMBOLS 1... Malfunction prevention circuit, 11... Enable signal receiving circuit, 12... Output signal control circuit, 13... Power supply integration circuit, 14... Mounting status notification circuit. Agent: Susumu Uchihara, patent attorney Figure 1 Figure 2

Claims (1)

【特許請求の範囲】[Claims]  電子装置を形成する各ユニットの実装状態を通知する
実装状態通知回路と、前記実装状態に呼応して前記電子
装置から発せられ前記ユニットの動作の実行又は停止を
制御するイネーブル信号を受信するイネーブル信号受信
回路と、前記電子装置から挿抜されない他ユニットへの
信号出力を前記イネーブル信号を用いて制御する出力信
号制御回路と、前記電子装置の内部電源から供給される
電力と前記電子装置の外部電源から供給される電力との
論理和をとり前記ユニットへ電源を供給する電源統合回
路とを有して構成し、前記電子装置から前記ユニットの
挿抜時の前記電子装置の誤動作を防止することを特徴と
する電子装置の誤動作防止回路。
a mounting state notification circuit that notifies the mounting state of each unit forming the electronic device; and an enable signal that receives an enable signal issued from the electronic device in response to the mounting state and controlling execution or stop of the operation of the unit. a receiving circuit, an output signal control circuit that uses the enable signal to control signal output to other units that are not inserted or removed from the electronic device, and power supplied from an internal power source of the electronic device and an external power source of the electronic device. and a power integrated circuit that performs a logical sum with the supplied power and supplies power to the unit, thereby preventing malfunction of the electronic device when the unit is inserted or removed from the electronic device. Malfunction prevention circuit for electronic equipment.
JP62310226A 1987-12-07 1987-12-07 Erroneous operation preventive circuit for electronic device Pending JPH01150395A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62310226A JPH01150395A (en) 1987-12-07 1987-12-07 Erroneous operation preventive circuit for electronic device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62310226A JPH01150395A (en) 1987-12-07 1987-12-07 Erroneous operation preventive circuit for electronic device

Publications (1)

Publication Number Publication Date
JPH01150395A true JPH01150395A (en) 1989-06-13

Family

ID=18002709

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62310226A Pending JPH01150395A (en) 1987-12-07 1987-12-07 Erroneous operation preventive circuit for electronic device

Country Status (1)

Country Link
JP (1) JPH01150395A (en)

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