JPH01149438A - Manufacture of electronic device - Google Patents

Abstract

PURPOSE:To make it possible to execute a good joining of bump electrodes with a substrate even though a needle-erection process is not executed by a method wherein, in case joint metal layers for the bump electrodes are formed by a selective plating method, a plurality of times of selective platings are applied in such a way that the patterns of the uppermost layers of the selective plated layers become smaller than those of the layers under the uppermost layers. CONSTITUTION:Barrier metal (Ti) layers 12 and metal (Cu) layers 13 for plating are laminatedly formed in order on the whole surface of a substrate by a deposition method or the like. Barrier metal (Ni) layers 14 and first joint metal (In) layers 151 are formed on these laminated films in a prescribed pattern by a first selective plating method. Subsequently, second joint metal (In) layers 152 of an area smaller than those of the layers 151 are formed on the layers 151 by the same selective plating method as the above. Lastly, the unnecessary parts of the layers 13 and 12 under formed bump electrodes are etched away in order using the bump electrodes as masks. In case these bump electrodes are pressure welded with the electrodes of other substrate, the bump electrodes can be easily joined because the areas of their upper second joint metal layers are smaller and are in a state easy to cause a plastic deformation.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Field of Application) The present invention relates to a method of manufacturing an electronic device having bump electrodes, and particularly to an improvement in the process of forming bump electrodes by selective plating.

(Prior Art) A structure is known in which electronic devices each having a plurality of protruding bump electrodes formed on a substrate are made to face each other face to face and are integrated. An example is shown in FIG.

Each of the substrates 21 and 23 has a predetermined electronic element formed thereon. For example, the substrate 23 has a photosensor array formed thereon, and the substrate 21 has signal processing circuit elements formed thereon. Bump electrodes 22 and 24 are formed at opposing positions on each substrate, and these are integrated by abutting the bump electrodes 22 and 24.

The signal processing circuit board 21 is connected to the outside by connecting wires 26 to the bonding pads 25.

Bump electrodes of such electronic devices have a much more complex structure and manufacturing process than bonding pads.

However, the bonding method using bump electrodes
What advantages does it have over the wire bonding method using pads? First, bump electrodes have almost no restrictions on electrode placement. In the case of bonding pads, they are usually placed around the periphery of the substrate, so for example 1 mm x
There are at most 1 bonding pad on a 1 mm chip.
Only 00 pieces can be provided. On the other hand, since bump electrodes can be provided anywhere within the chip surface, about 400 electrodes can be arranged. Second, as is clear from the example in FIG. 5, as a result of being able to connect face-to-face,
The length of connection wiring is much shorter than that of wire bonding. Therefore, the wiring capacitance is small, speeding up circuit operation,
Low noise can be achieved. Thirdly, the image processing device illustrated in FIG. 5 is capable of parallel transmission of signals from a large number of pixels, and therefore can achieve high-speed and high-performance image processing.

By the way, bump electrodes have conventionally been formed using a selective plating method in boat fishing. An example of the conventional method will be explained with reference to FIG. The substrate 21 is, for example, a Si substrate, and has predetermined circuit elements formed thereon. An insulating film 22 is formed on the surface of this substrate 21.
is formed, and a contact hole and metal wiring (A) are formed in this.
) layer 25 is provided, and bump electrodes 23 (2
3a.

23b) is formed. The bump electrode 23 includes a barrier metal (Ti) layer 26. Metal (Cu) electrode for plating 271
Bump core metal (Cu) layer 28 by selective plating. It is composed of a barrier metal (Ni) layer 29 and a bonding metal (In) layer 30. In addition to the bump electrodes, bonding pads 24 for arranging power supply lines, signal output lines, etc. are formed in the peripheral portion using the same A1 layer as the metal wiring layer 25. In the process of forming bump electrodes, first, a barrier metal layer 26 and a plating electrode layer 27 are deposited on the entire surface, and selective plating is performed using the formed bump electrodes as a mask.
Plating electrode 27 below. Pattern the barrier metal layer 26.

In such a conventional bump electrode forming method, a phenomenon peculiar to electroplating is that the current density increases at the periphery of the substrate, and the bump electrode at the periphery of the substrate becomes higher than that at the center. Furthermore, the surface of the uppermost bonding layer of each bump electrode is rounded as shown in FIG. In such a state, when the bump electrode surfaces are butted together and integrated as shown in Figure 5, the top bonding layer is difficult to deform under normal heating and pressure, resulting in poor conductivity at the center of the board. occurs.

In order to solve this problem, it is effective to sharpen the surface of the bump electrode (tilt step) as shown in FIG.

This is done by pressing the surfaces of a plurality of bump electrodes against a flat substrate, heating and melting the surfaces, and then peeling off the substrate. However, this method requires melting the top layer of the bump electrode. Therefore, only low melting point metals such as In, Sn, and solder can be used as the bonding layer for the uppermost layer of the bump electrode.

Furthermore, it is also impractical to provide a bump core metal layer 28 in order to prevent molten metal from flowing out and coming into contact with adjacent electrodes. Therefore, there are many types of plating.

Furthermore, even if a low melting point metal such as In is used for the bonding layer to eliminate distortion caused by thermal expansion between the substrates to be bonded, and plating is laminated to increase the thickness, the thickness will increase during the tilting process. As a result, the thickness of the joint cannot be made that thick.

(Problems to be Solved by the Invention) As described above, in the conventional bump electrode formation method using the selective plating method, variations in the height of the bump electrodes are a problem. There were problems such as only a low melting point metal could be used for the layer, a bump core metal layer was essential, and it was difficult to make the joint part thick enough.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing an electronic device having a bump electrode forming step that solves such problems.

[Structure of the Invention] (Means for Solving the Problems) The present invention provides that, when forming a joint metal layer of a bump electrode by a selective plating method, the top layer pattern of the selective plating layer is smaller than that of the lower layer. It is characterized by performing selective plating multiple times to achieve the desired results.

(Function) When the bump electrode obtained by the present invention is brought into pressure contact with the bump electrode of another substrate, the top layer having a small area is easily deformed.

Therefore, even in the case of a substrate on which a plurality of bump electrodes are formed, reliable bonding can be performed. Furthermore, since the area under the top layer of the bump electrode is larger than the top layer, there is little deformation when the bump electrodes are pressed together, and the thickness of the entire joint can be ensured by the selective plating layer below the top layer. Furthermore, the selective plating layers used multiple times only need to have different patterns and can be made of the same material, so there is no need for many types of plating.

(Example) The present invention will be explained in detail below.

FIG. 1 shows a bump electrode structure according to one embodiment. Contact holes are formed in the insulating film 2 on the substrate, bump electrodes 3a, 3b, . . . are formed therein, and bonding pads 4 are formed around the substrate. The substrate 1 is, for example, a semiconductor substrate made of Si or the like on which transistors and the like are integrated.

A metal wiring (A, ff) layer 11 and a bonding pad 4 are formed at contact hole positions in an insulating film 2 formed on the surface of a semiconductor substrate. The manufacturing process of the bump electrode is as follows.

First, a barrier metal (Ti) layer 12. Metal for plating (Cu)
A layer 13 is sequentially laminated over the entire surface by a vapor deposition method or the like. In this embodiment, bump electrodes are formed on this laminated film by repeating the selective plating process twice. That is, the barrier metal (Ni) layer 14 and the first joint metal (In) layer 151 are formed in a predetermined pattern by the -th selective plating method, and then the first joint metal layer 151 is formed by the same selective plating method. A second junction metal (In) layer 152 having a smaller area is formed on layer 151. Finally, using the formed bump electrode as a mask, the underlying plating metal layer 13. Unnecessary portions of the barrier metal layer 12 are sequentially etched away.

When the bump electrode according to this embodiment is pressure-contacted with an electrode on another substrate, the first bonding metal layer on the top of the bump electrode has a small area and is easily susceptible to plastic deformation, so it is easy to apply an appropriate pressure-contact force. can be joined to. Moreover, since the second joint metal layer has a sufficiently large cross-sectional area, it does not deform.
The overall thickness of the joint metal layer is ensured by the first joint metal layer. Moreover, in the manufacturing process, there is no need for a core metal as in the case of pressing and peeling off flat substrates as explained in FIG. 7, and the number of types of plating can be reduced.

FIG. 2 shows an example in which the bump electrode substrate of FIG. 1 is directly bonded to an electrode of another substrate. The other substrate 5 has an insulating film 6 on its surface.
are formed, and contact holes are opened in these to form electrodes 7a, 7b, . . . , and bump electrodes 3a
, 3b, . . . are pressure-welded to these electrodes 7a, 7b, . For example, assume that the cross-sectional area of the second bonding metal layer 15□ is 1/4 that of the first bonding metal layer 151.

At this time, the pressing force F1 at which the first joining metal layer 151 starts to undergo plastic deformation is four times the pressing force F2 at which the second joining metal layer 152 begins to undergo plastic deformation. Therefore, the pressing force F between the boards is F2 x F≦F.

By setting an appropriate value that satisfies the above conditions, it is possible to maintain the thickness of the first bonding metal layer 151 almost as it is and to perform reliable bonding by the second bonding metal layer 152.

FIG. 3 shows the structure of one bump electrode section according to another embodiment of the present invention. In this embodiment, the joint metal layer 15 is
First layer joint metal layer 150 by selective plating three times. Second layer joint metal layer 152 and third layer joint metal layer 15
3. Here, the first layer 151 and the second layer 2
have the same area, and only the third layer 153, which is the uppermost layer, has an area smaller than this. With such a configuration, it is possible to ensure a larger thickness of the joint metal layer that does not cause plastic deformation.

FIG. 4 shows yet another embodiment, in which the first
The area is made smaller in order from the first layer to the third layer. Similar effects can be obtained with this embodiment as well.

The present invention is not limited to the embodiments described above. For example, the joint metal layer is not limited to two or three layers, but can be stacked in even more layers. In addition to In, the material of the joint metal layer also includes Au and C.
Any material that can be bonded by thermocompression, such as U, A, Pd, Sn, or solder, can be used. The barrier metal layer and the plating metal layer are not limited to the materials used in the embodiments, and other materials can be selected as needed. The substrate on which the bump electrodes are formed is not limited to a semiconductor substrate either.

[Effects of the Invention] As described above, according to the present invention, deformation is concentrated on the upper part of the metal layer at the joint portion of the bump electrode by repeating the selective plating process, so that deformation can be achieved without performing the tilting process. Good substrate bonding can be achieved. Since there is no need for an inclined standing process, there is no need for a bump core metal, and therefore the plating process is also simplified.

Furthermore, a sufficient thickness of the joint metal layer can be ensured by performing selective plating multiple times.

[Brief explanation of the drawing]

FIG. 1 is a diagram showing the structure of a bump electrode part according to an embodiment of the present invention, FIG. 2 is a diagram showing a state in which the substrate of FIG. 1 is bonded to another substrate, and FIGS. 3 and 4 are diagrams showing other substrates. Figure 5 is a diagram showing an example of substrate bonding using a conventional bump electrode, and Figures 6 and 7 specifically illustrate the structure of a conventional bump electrode. It is a diagram. DESCRIPTION OF SYMBOLS 1... Substrate, 2... Insulating film, 3a, 3b... Bump electrode, 4... Bonding pad, 11... Metal wiring (A)) layer, 12... Barrier metal (Ti )layer,
13... Metal for plating (Cu) layer, 14... Barrier metal (Ni) layer, 151-153... Joint metal (I
n) layer. Applicant's Representative Patent Attorney Takehiko Suzue Figure 1 Figure 2 Figure 3 Figure 4 Figure 5

Claims (1)

[Claims] In a method of manufacturing an electronic device having a bump electrode on a predetermined substrate, the bonding metal layer of the bump electrode is formed twice or more by setting the pattern of the uppermost selective plating layer to be smaller than the pattern of the selective plating layer below it. A method of manufacturing an electronic device, characterized in that it is formed by a selective plating process.