JPH01147521U - - Google Patents
Info
- Publication number
- JPH01147521U JPH01147521U JP4319888U JP4319888U JPH01147521U JP H01147521 U JPH01147521 U JP H01147521U JP 4319888 U JP4319888 U JP 4319888U JP 4319888 U JP4319888 U JP 4319888U JP H01147521 U JPH01147521 U JP H01147521U
- Authority
- JP
- Japan
- Prior art keywords
- transistor
- electric field
- base
- field detection
- collector
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000005684 electric field Effects 0.000 claims 5
- 238000001514 detection method Methods 0.000 claims 4
- 238000010586 diagram Methods 0.000 description 3
- 239000003990 capacitor Substances 0.000 description 1
Landscapes
- Amplifiers (AREA)
- Circuits Of Receivers In General (AREA)
Description
第1図は本考案の一実施例を示す回路図、第2
図は従来例の回路図である。
Q4……第1のトランジスタ、Q5……第2の
トランジスタ、Q6……第3のトランジスタ、R
1,R2……抵抗、C1……コンデンサ、I1…
…定電流源。
Figure 1 is a circuit diagram showing one embodiment of the present invention, Figure 2 is a circuit diagram showing an embodiment of the present invention.
The figure is a circuit diagram of a conventional example. Q4 ...first transistor, Q5 ...second transistor, Q6 ...third transistor, R
1 , R2 ...Resistor, C1 ...Capacitor, I1 ...
...constant current source.
Claims (1)
ンジスタのエミツタ間に抵抗を接続し、第2の電
界検出出力用トランジスタのベースに高周波信号
を加え、第1のトランジスタのベースを一定電位
に保つことにより電界検出を行う回路において、
コレクタ及びベースをそれぞれ第2のトランジス
タのコレクタ及びベースに接続し、エミツタを第
1のトランジスタのエミツタに接続する第3のト
ランジスタを設け、無信号又は微小信号時に第1
のトランジスタで発生するオフセツト電流を第3
のトランジスタで代替して零とし、電界検出にオ
フセツトの影響を防止するように構成したことを
特徴とする電界検出回路。 A resistor is connected between the emitters of a pair of transistors consisting of the first and second transistors, a high frequency signal is applied to the base of the second electric field detection output transistor, and the base of the first transistor is maintained at a constant potential. In a circuit that detects an electric field by
A third transistor is provided whose collector and base are respectively connected to the collector and base of the second transistor, and whose emitter is connected to the emitter of the first transistor.
The offset current generated in the transistor of
What is claimed is: 1. An electric field detection circuit characterized in that the electric field detection circuit is configured to be replaced with a transistor to make it zero, thereby preventing the influence of offset on electric field detection.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4319888U JPH0339927Y2 (en) | 1988-03-31 | 1988-03-31 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4319888U JPH0339927Y2 (en) | 1988-03-31 | 1988-03-31 |
Publications (2)
Publication Number | Publication Date |
---|---|
JPH01147521U true JPH01147521U (en) | 1989-10-12 |
JPH0339927Y2 JPH0339927Y2 (en) | 1991-08-22 |
Family
ID=31269604
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4319888U Expired JPH0339927Y2 (en) | 1988-03-31 | 1988-03-31 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH0339927Y2 (en) |
-
1988
- 1988-03-31 JP JP4319888U patent/JPH0339927Y2/ja not_active Expired
Also Published As
Publication number | Publication date |
---|---|
JPH0339927Y2 (en) | 1991-08-22 |