JPH01142229U

JPH01142229U -

Info

Publication number: JPH01142229U
Application number: JP3860188U
Authority: JP
Priority date: 1988-03-24
Filing date: 1988-03-24
Publication date: 1989-09-29

Description

[Brief explanation of drawings]

第１図はこの考案の一実施例を示す概観図、第
２図ａは従来のデイジタル―アナログ変換装置の
入出力特性図、第２図ｂは本考案のデイジタル―
アナログ変換装置の入出力特性図、第３図ａは入
力Ｍｂｉｔデイジタル信号のフオーマツト図、第
３図ｂは入力Ｍｂｉｔデイジタル信号が＋｜２（
Ｎ−１）−１｜時の上位Ｎｂｉｔのフオーマツト
図、第３図ｃは下位Ｎｂｉｔのフオーマツト図、
第３図ｄは入力Ｍｂｉｔデイジタル信号１１が−
｜２（Ｎ−１）｜時の上位Ｎｂｉｔのフオーマツ
ト図、第３図ｅは下位Ｎｂｉｔのフオーマツト図
、第４図は従来のデイジタル―アナログ変換装置
の概観図である。図において、１はＮｂｉｔＤ／Ａコンバータ
、２，５は基準電源、３はシフトレジスタ、４は
スイツチ、６はアナログスイツチ、７は判定器、
１１は入力Ｍｂｉｔデイジタル信号、１２はアナ
ログ信号である。なお、各図中同一記号は同一ま
たは相当部分を示す。 Fig. 1 is an overview diagram showing an embodiment of this invention, Fig. 2a is an input/output characteristic diagram of a conventional digital-to-analog converter, and Fig. 2b is a diagram of the digital-to-analog converter of the present invention.
The input/output characteristic diagram of the analog converter, FIG. 3a is the format diagram of the input Mbit digital signal, and FIG. 3b is the input Mbit digital signal +|2
N-1)-1 | The format diagram of the upper N bits at the time, FIG. 3c is the format diagram of the lower N bits,
FIG. 3d shows that the input Mbit digital signal 11 is -
FIG. 3e is a format diagram of the upper N bits when |2(N-1)|, FIG. 3e is a format diagram of the lower N bits, and FIG. 4 is an overview diagram of a conventional digital-to-analog converter. In the figure, 1 is an Nbit D/A converter, 2 and 5 are reference power supplies, 3 is a shift register, 4 is a switch, 6 is an analog switch, 7 is a judge,
11 is an input Mbit digital signal, and 12 is an analog signal. Note that the same symbols in each figure indicate the same or equivalent parts.

Claims

[Scope of utility model registration request]

One input Mbit digital signal (M−N
) shift register, a switch that switches between the output signal of this shift register and the input Mbit digital signal, and a D/A converter for the output signal of this switch to generate an output analog signal.
bit D/A converter, this Nbit D/A converter
A reference power supply that generates the reference power supply voltage of the A converter, a reference power supply that generates a voltage 1/2 (M−N) times that of this reference power supply, and an output voltage of the two reference power supplies mentioned above are switched, and the Nbit D/A converter is connected to the Nbit D/A converter. A digital-to-analog conversion device, comprising: an analog switch used as a reference power source; and a determiner that determines the magnitude of the input Mbit digital signal and controls contacts of the switch and the analog switch.