JPS6249196U - - Google Patents

Info

Publication number
JPS6249196U
JPS6249196U JP13902185U JP13902185U JPS6249196U JP S6249196 U JPS6249196 U JP S6249196U JP 13902185 U JP13902185 U JP 13902185U JP 13902185 U JP13902185 U JP 13902185U JP S6249196 U JPS6249196 U JP S6249196U
Authority
JP
Japan
Prior art keywords
signal
digital
analog
display device
converts
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP13902185U
Other languages
Japanese (ja)
Other versions
JPH032942Y2 (en
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP13902185U priority Critical patent/JPH032942Y2/ja
Publication of JPS6249196U publication Critical patent/JPS6249196U/ja
Application granted granted Critical
Publication of JPH032942Y2 publication Critical patent/JPH032942Y2/ja
Expired legal-status Critical Current

Links

Description

【図面の簡単な説明】[Brief explanation of the drawing]

添付図は、本考案の好適な一実施例の回路図で
ある。 図において、24及び26はD/A変換器、2
8及び30はスイツチ、32及び34は加算器、
36は表示器である。
The attached figure is a circuit diagram of a preferred embodiment of the present invention. In the figure, 24 and 26 are D/A converters, 2
8 and 30 are switches, 32 and 34 are adders,
36 is a display.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] M+Nビツトのデジタル信号をアナログ信号に
変換して、表示器における表示位置を制御する表
示装置において、上記デジタル信号のMビツトを
アナログ信号に変換するデジタル・アナログ変換
器と、上記デジタル信号の残りのNビツトに応じ
て複数のアナログ電圧の1つを選択するスイツチ
と、上記デジタル・アナログ変換器の出力信号及
び上記スイツチの出力信号を加算する加算回路と
を具え、該加算回路の出力信号により上記表示器
における表示位置を制御することを特徴とする表
示装置。
A display device that converts an M+N bit digital signal into an analog signal to control the display position on the display device includes a digital-to-analog converter that converts the M bits of the digital signal into an analog signal, and a digital-to-analog converter that converts the M bits of the digital signal into an analog signal; A switch that selects one of a plurality of analog voltages according to the N bit, and an adder circuit that adds the output signal of the digital-to-analog converter and the output signal of the switch, and the output signal of the adder circuit is used to A display device characterized by controlling a display position on a display device.
JP13902185U 1985-09-11 1985-09-11 Expired JPH032942Y2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP13902185U JPH032942Y2 (en) 1985-09-11 1985-09-11

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP13902185U JPH032942Y2 (en) 1985-09-11 1985-09-11

Publications (2)

Publication Number Publication Date
JPS6249196U true JPS6249196U (en) 1987-03-26
JPH032942Y2 JPH032942Y2 (en) 1991-01-25

Family

ID=31044539

Family Applications (1)

Application Number Title Priority Date Filing Date
JP13902185U Expired JPH032942Y2 (en) 1985-09-11 1985-09-11

Country Status (1)

Country Link
JP (1) JPH032942Y2 (en)

Also Published As

Publication number Publication date
JPH032942Y2 (en) 1991-01-25

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