JPH0197634U - - Google Patents
Info
- Publication number
- JPH0197634U JPH0197634U JP13235387U JP13235387U JPH0197634U JP H0197634 U JPH0197634 U JP H0197634U JP 13235387 U JP13235387 U JP 13235387U JP 13235387 U JP13235387 U JP 13235387U JP H0197634 U JPH0197634 U JP H0197634U
- Authority
- JP
- Japan
- Prior art keywords
- analog
- signal
- terminal
- digital
- input
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 3
- 239000000284 extract Substances 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 9
Description
第１図は本考案に係るＡ／Ｄ変換装置の回路図
、第２図はサーボ帰還部の詳細な回路図、第３図
は第２図に示した回路図の各部の波形図、第５図
は従来のＡ／Ｄ変換装置の回路図、第６図は第５
図に示したＡ／Ｄ変換装置を改良した従来のＡ／
Ｄ変換装置の回路図である。
７……保持回路、８……アナログ―デイジタル
変換部、１０，１８……積分回路、１１……抽出
部、１２……サーボ制御部、１３……サーボ帰還
部。
Fig. 1 is a circuit diagram of the A/D converter according to the present invention, Fig. 2 is a detailed circuit diagram of the servo feedback section, Fig. 3 is a waveform diagram of each part of the circuit diagram shown in Fig. 2, and Fig. 5 is a detailed circuit diagram of the servo feedback section. The figure is a circuit diagram of a conventional A/D converter, and Figure 6 is a circuit diagram of a conventional A/D converter.
A conventional A/D converter that is an improved version of the A/D converter shown in the figure.
It is a circuit diagram of a D conversion device. 7... Holding circuit, 8... Analog-digital conversion section, 10, 18... Integrating circuit, 11... Extracting section, 12... Servo control section, 13... Servo feedback section.
補正 平１．２．３
図面の簡単な説明を次のように補正する。
明細書中、第１６頁第１行〜第２行の「５図は
〜第５図に」を「４図は従来のＡ／Ｄ変換装置の
回路図、第５図は第４図に」と補正する。Amendment 1.2.3 The brief description of the drawing is amended as follows. In the specification, on page 16, lines 1 to 2, "Figure 5 is to Figure 5" has been changed to "Figure 4 is a circuit diagram of a conventional A/D converter, and Figure 5 is to Figure 4." and correct it.
Claims (1)
力するアナログ信号をデジタル信号に変換して前
記出力端子に出力するアナログ―デイジタル変換
部と、前記出力端子から出力されるデイジタル信
号からサインビツトを抽出する抽出部と、前記サ
インビツトを用いてサーボ信号を作成し、そのサ
ーボ信号を、前記アナログ信号のレベルを調整す
るための直流シフト用電圧の一部として、アナロ
グ―デイジタル変換部の入力側にあるシフト端子
に供給するサーボ制御部とを有することを特徴と
するアナログ―デイジタル変換装置。 an input terminal, an output terminal, an analog-to-digital converter that converts an analog signal input from the input terminal into a digital signal and outputs it to the output terminal, and extracts a sign bit from the digital signal output from the output terminal. A servo signal is created using the extractor and the sign bit, and the servo signal is used as a part of the DC shift voltage for adjusting the level of the analog signal by a shifter on the input side of the analog-to-digital converter. An analog-to-digital conversion device characterized by having a servo control unit that supplies power to a terminal.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13235387U JPH0197634U (en) | 1987-08-31 | 1987-08-31 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP13235387U JPH0197634U (en) | 1987-08-31 | 1987-08-31 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH0197634U true JPH0197634U (en) | 1989-06-29 |
Family
ID=31389234
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP13235387U Pending JPH0197634U (en) | 1987-08-31 | 1987-08-31 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0197634U (en) |
Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59181719A (en) * | 1983-03-31 | 1984-10-16 | Fujitsu Ltd | Offset compensating circuit |
-
1987
- 1987-08-31 JP JP13235387U patent/JPH0197634U/ja active Pending
Patent Citations (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS59181719A (en) * | 1983-03-31 | 1984-10-16 | Fujitsu Ltd | Offset compensating circuit |
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