JPH01132286A - Picture communication equipment - Google Patents

Picture communication equipment

Info

Publication number
JPH01132286A
JPH01132286A JP62289573A JP28957387A JPH01132286A JP H01132286 A JPH01132286 A JP H01132286A JP 62289573 A JP62289573 A JP 62289573A JP 28957387 A JP28957387 A JP 28957387A JP H01132286 A JPH01132286 A JP H01132286A
Authority
JP
Japan
Prior art keywords
clock
transmission line
signal
outputted
frequency
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP62289573A
Other languages
Japanese (ja)
Other versions
JP2511481B2 (en
Inventor
Shuzo Tsugane
津金 修三
Sadaharu Hiratsuka
平塚 貞晴
Toshio Kawamichi
川路 俊夫
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
NEC Engineering Ltd
Original Assignee
NEC Corp
NEC Engineering Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp, NEC Engineering Ltd filed Critical NEC Corp
Priority to JP28957387A priority Critical patent/JP2511481B2/en
Priority to US07/272,709 priority patent/US5045942A/en
Priority to CA000583477A priority patent/CA1312372C/en
Publication of JPH01132286A publication Critical patent/JPH01132286A/en
Application granted granted Critical
Publication of JP2511481B2 publication Critical patent/JP2511481B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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  • Color Television Systems (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)

Abstract

PURPOSE:To transmit much picture information through a simple circuit by providing an encoded signal with high efficiency by a sampling clock phase- synchronizing with a video signal, and outputs the encoded signal to a transmission line by the speed of a transmission line clock, and synchronizing the phase of the sampling clock with that of the transmission line clock. CONSTITUTION:The transmission line clock (a) is inputted to a first frequency divider 31, and is 779-th frequency divided, and is outputted to a phase comparator 32 as the clock signal of 6.176/779MHz. On the other hand, the clock signal outputted from a voltage controlled oscillator 34 is inputted to a second frequency divider 35, and is 1806-th frequency divided, and is outputted to the phase comparator 32. The phases of two clock signals are compared by the phase comparator 32, and a phase difference is outputted to a low pass filter 33, and after a high frequency component is removed, it is supplied to the voltage controlled oscillator 34, and its oscillation frequency is controlled so as io come to (6.176/779)X1806MHz, and is outputted to the second frequency divider 35 and a black burst signal generator 36. A black burst signal (b) synchronizing with the transmission line clock (a) is generated and outputted by the black burst signal generator 36.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、ビデオ信号を高能率符号化する符号化部を有
する画像通信装置に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to an image communication device having an encoding section that encodes a video signal with high efficiency.

高能率符号化は、帯域圧縮符号化とも呼ばれ、典型的に
は、予測符号化である。
High-efficiency coding is also called band compression coding, and is typically predictive coding.

〔従来の技術〕[Conventional technology]

従来、この種の画像通信装置は、ビデオ信号を高能率符
号化し、伝送路から要求される伝送速度で伝送路へデー
タを送出する符号化部を有している。上記ビデオ信号は
、入力装置(例えば、ビデオカメラや、フレームシンク
ロナイザ)Kよって出力されたものである。この入力装
置の出力信号は、伝送路からの伝送路クロックに無関係
に出力されるので、伝送路からの伝送路クロックと前記
入力装置の出力とは一般に同期していない。前記符号化
部では1画質上、前記入力装置の出力とは同期した標本
化クロックで符号化が行われるので。
Conventionally, this type of image communication device has an encoding unit that encodes a video signal with high efficiency and sends data to a transmission path at a transmission rate required by the transmission path. The video signal is output by an input device K (for example a video camera or a frame synchronizer). Since the output signal of this input device is output regardless of the transmission line clock from the transmission line, the transmission line clock from the transmission line and the output of the input device are generally not synchronized. In the encoding section, encoding is performed using a sampling clock that is synchronized with the output of the input device in order to improve the image quality.

標本化クロックは伝送路からの伝送路クロックとは非同
期であった。
The sampling clock was asynchronous with the transmission line clock from the transmission line.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述したように、従来の方法は、伝送路からの伝送路ク
ロックと標本化クロックとは非同期となる。このため1
画像通信装置としては、送信部としての前記符号化部に
は、ビデオ信号をディジタル化する標本化クロックの周
波数情報を受信部としての復号化部に送る機能と、前記
受信部としての前記復号化部には、伝送路から受信した
周波数情報によシ標本化クロックを再生する機能夛が必
要である。このため1回路構成が複雑となる。
As described above, in the conventional method, the transmission line clock and the sampling clock from the transmission line are asynchronous. For this reason 1
In the image communication device, the encoding section serving as a transmitting section has a function of sending frequency information of a sampling clock for digitizing a video signal to a decoding section serving as a receiving section, and the decoding section serving as the receiving section. The part must have a function for regenerating the sampling clock based on the frequency information received from the transmission line. Therefore, one circuit configuration becomes complicated.

本発明の目的は1回路構成が簡単な画像通信装置を提供
することKある。
An object of the present invention is to provide an image communication device with a simple circuit configuration.

〔問題点を解決するための手段〕[Means for solving problems]

本発明によれば、伝送路からの伝送路クロックに位相同
期したブラックバースト信号を発生するブラックバース
ト信号発生回路と、前記ブラックバースト信号に同期さ
せて映像信号を重畳させたビデオ信号を出力する手段と
、前記ビデオ信号に位相同期した標本化クロックで高能
率符号化し。
According to the present invention, there is provided a black burst signal generation circuit that generates a black burst signal phase-synchronized with a transmission line clock from a transmission line, and a means for outputting a video signal on which a video signal is superimposed in synchronization with the black burst signal. and high-efficiency encoding using a sampling clock phase-synchronized with the video signal.

符号化した信号を前記伝送路クロックの速度で前記伝送
路へ出力する符号化部とを有し、前記標本化クロックが
前記伝送路クロックに位相同期していることを特徴とす
る画像通信装置が得られる。
an encoding unit that outputs an encoded signal to the transmission line at a speed of the transmission line clock, and the sampling clock is phase-synchronized with the transmission line clock. can get.

〔実施例〕〔Example〕

次に2本発明について図面を参照して説明する。 Next, two aspects of the present invention will be explained with reference to the drawings.

第1図は本発明の一実施例を示すブロック図である。入
力端子1からの伝送路クロックaは符号化部2とブラッ
クバースト信号発生回路3へ入力される。ブラックバー
スト信号発生回路3では伝送路クロックaに同期したブ
ラックバースト信号blテレビカメラ4に出力し、テレ
ビカメラ4では入力したブラックバースト信号すに同期
させて映像信号を重畳させたビデオ信号Cを符号化部2
へ出力する。符号化部2ではビデオ信号cf高能率符号
化し、伝送路クロックaの速度で出力端子5へ送出する
FIG. 1 is a block diagram showing one embodiment of the present invention. A transmission line clock a from an input terminal 1 is input to an encoding section 2 and a black burst signal generation circuit 3. The black burst signal generation circuit 3 outputs a black burst signal BL synchronized with the transmission line clock a to the television camera 4, and the television camera 4 encodes the video signal C on which a video signal is superimposed in synchronization with the input black burst signal. conversion part 2
Output to. The encoding unit 2 performs high-efficiency encoding on the video signal cf, and sends it to the output terminal 5 at the speed of the transmission line clock a.

第2図に、伝送路クロック、ブラックバースト信号、及
びビデオ信号をそれぞれ示す。
FIG. 2 shows a transmission path clock, a black burst signal, and a video signal, respectively.

第3図に符号化部2の構成を示す。ビデオ信号Cはめ変
換器21と同期分離器22へ入力され。
FIG. 3 shows the configuration of the encoding section 2. The video signal is input to a C-fit converter 21 and a sync separator 22.

同期分離器22ではビデオ信号Cから同期信号dを分離
して標本化クロック発生器23へ出力する。
The synchronization separator 22 separates the synchronization signal d from the video signal C and outputs it to the sampling clock generator 23.

標本化クロック発生器23では入力した同期信号dに位
相同期した標本化クロックe(基本周波数は14.31
8 MHz )を生成し、帥変換器21へ出力する。帥
変換器21ではビデオ信号Cを標本化クロックeにより
標本化を行いディジタル信号に変換し、符号器24へ出
力する。符号器24では高能率符号化を行い、バッファ
メモリ25に一旦記憶し、伝送路クロックaの速度でノ
4ソファメモリ25から読み出され出力端子5へ送出す
る。
The sampling clock generator 23 generates a sampling clock e (basic frequency is 14.31
8 MHz) and outputs it to the converter 21. The converter 21 samples the video signal C using the sampling clock e, converts it into a digital signal, and outputs it to the encoder 24. The encoder 24 performs high-efficiency encoding, temporarily stores it in the buffer memory 25, reads it out from the sofa memory 25 at the speed of the transmission line clock a, and sends it to the output terminal 5.

第4図にブラックバースト信号発生回路3の構成を説明
する。本実施例では伝送路クロックaO値’fr: 6
.176 M)Izの速度に定め実施した。
The configuration of the black burst signal generation circuit 3 will be explained in FIG. In this embodiment, the transmission line clock aO value 'fr: 6
.. The test was carried out at a speed of 176 M) Iz.

伝送路クロックaは第1の分周器31に入力し。The transmission line clock a is input to the first frequency divider 31.

779分周され、 6.176 / 779 MHzの
クロyり信号として位相比較器32へ出力する。一方。
The frequency is divided by 779 and output to the phase comparator 32 as a 6.176/779 MHz black signal. on the other hand.

電圧制御発振器34から出力するクロック信号(第3図
の標本化クロックeと同一周波数)は第2の分局器35
へ入力され、1806分周して位相比較器32へ出力す
る。位相比較器32では二つのクロック信号の位相比較
を行い位相差を低域ろ波器33へ出力し、高周波成分を
除去した後、電圧制御発振器34へ加えられ発振周波数
が(6,176/779)X1806■hになるよう制
御され、第2の分周器35とブラックバースト信号発生
器36へ出力する。ブラックバースト信号発生器36で
は伝送路クロックaに同期したブラック・ぐ−スト信号
bl生成して出力する。
The clock signal (same frequency as the sampling clock e in FIG. 3) output from the voltage controlled oscillator 34 is sent to the second branch 35.
The frequency is divided by 1806 and output to the phase comparator 32. The phase comparator 32 compares the phases of the two clock signals, outputs the phase difference to the low-pass filter 33, removes the high frequency component, and then applies it to the voltage-controlled oscillator 34 so that the oscillation frequency is (6,176/779 )X1806■h, and is output to the second frequency divider 35 and black burst signal generator 36. A black burst signal generator 36 generates and outputs a black burst signal bl synchronized with the transmission line clock a.

受信部としての復号化部(図示せず)では、伝送路から
抽出した6、 176 MHzのクロック信号を第4図
のブラックバースト信号発生回路3と同じ構成の回路に
入力し、出力するブラックバ−スト信号により伝送路ク
ロックに同期した標本化クロックを生成する。
In a decoding section (not shown) serving as a receiving section, a 6.176 MHz clock signal extracted from the transmission path is input to a circuit having the same configuration as the black burst signal generation circuit 3 shown in FIG. A sampling clock synchronized with the transmission line clock is generated using the strike signal.

尚9本実施例によるとブラックバースト信号発生回路3
で生成される標本化クロック周波数は基本周波数に対し
て0.56 ppmの周波数誤差を生じるが、各構成す
る機器の周波数許容範囲を考慮すると問題ではない。
9 According to this embodiment, the black burst signal generation circuit 3
Although the sampling clock frequency generated by this method has a frequency error of 0.56 ppm with respect to the fundamental frequency, this is not a problem considering the frequency tolerance range of each constituent device.

又9本実施例ではビデオ信号に同期した標本化クロック
eを、標本化クロック発生器23内に電圧制御発振器(
VCO)を設けて発生しているが。
In addition, in this embodiment, the sampling clock e synchronized with the video signal is generated by a voltage controlled oscillator (
This occurs when a VCO) is installed.

ブラックバースト信号発生回路3を標本化クロック発生
器23内にとシこめば前記電圧制御発振器は省略でき、
しかも該電圧制御発振器による引っ込み時間も0にでき
る。
By incorporating the black burst signal generation circuit 3 into the sampling clock generator 23, the voltage controlled oscillator can be omitted.
Moreover, the pull-in time by the voltage controlled oscillator can also be reduced to zero.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、伝送路からの伝送路クロ
ックに同期した標本化クロックで符号化するため、送信
部としての符号化部に必要であった。標本化クロックの
周波数情報を受信部としての復号化部に送る機能と、前
記受信部としての前記復号化部に必要であった。伝送路
から受信した周波数情報によシ標本化クロックを再生す
る機能とが不要となったため、ハード的に回路を構成す
る規模が減少する。又、標本化クロックの周波数情報を
送るために割シ当てられたタイムスロット上に画像デー
タを割シ当てることができ1画像の情報を多く伝送でき
る効果がある。
As explained above, the present invention is necessary for the encoding unit as a transmitting unit because encoding is performed using a sampling clock synchronized with the transmission line clock from the transmission line. The function of sending the frequency information of the sampling clock to the decoding section serving as a receiving section and the decoding section serving as the receiving section were necessary. Since the function of regenerating the sampling clock based on the frequency information received from the transmission path is no longer necessary, the scale of the hardware circuit is reduced. Furthermore, image data can be allocated to the time slots allocated for transmitting frequency information of the sampling clock, which has the effect of transmitting a large amount of information for one image.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例による画像通信装置のブロッ
ク図、第2図は第1図の画像通信装置の各部の波形を示
した図、第3図及び第4図は第1図の符号化部2及びブ
ラックバースト信号発生回路3の構成ブロック図である
。 1は入力端子、2は符号化部、3はブラックバースト信
号発生回路、4はテレビカメラ、5は出力端子、21は
め変換器、22は同期分離器。 23は標本化クロック発生器、24は符号器。 25はノクツファメモリ、31は第1の分周器。 32は位相比較器、33は低域ろ波器、34は電圧制御
発振器、35は第2の分周器、36はブラックバースト
信号発生器、aは伝送路クロック。 bはブラックバースト信号、Cはビ、デオ信号。 dは同期信号、eは標本化クロック。 第1図 第3図
FIG. 1 is a block diagram of an image communication device according to an embodiment of the present invention, FIG. 2 is a diagram showing waveforms of various parts of the image communication device of FIG. 1, and FIGS. 3 and 4 are diagrams of the image communication device of FIG. 2 is a block diagram of the configuration of an encoding section 2 and a black burst signal generation circuit 3. FIG. 1 is an input terminal, 2 is an encoding section, 3 is a black burst signal generation circuit, 4 is a television camera, 5 is an output terminal, 21 is a fitted converter, and 22 is a sync separator. 23 is a sampling clock generator, and 24 is an encoder. 25 is a clock buffer memory, and 31 is a first frequency divider. 32 is a phase comparator, 33 is a low-pass filter, 34 is a voltage controlled oscillator, 35 is a second frequency divider, 36 is a black burst signal generator, and a is a transmission line clock. b is a black burst signal, and C is a video and video signal. d is a synchronization signal, and e is a sampling clock. Figure 1 Figure 3

Claims (1)

【特許請求の範囲】[Claims] 1、伝送路からの伝送路クロックに同期したブラックバ
ースト信号を発生するブラックバースト信号発生回路と
、前記ブラックバースト信号に同期させて映像信号を重
畳させたビデオ信号を出力する手段と、前記ビデオ信号
に同期した標本化クロックで高能率符号化し、符号化し
た信号を前記伝送路クロックの速度で前記伝送路へ出力
する符号化部とを有し、前記標本化クロックが前記伝送
路クロックに同期していることを特徴とする画像通信装
置。
1. A black burst signal generation circuit that generates a black burst signal synchronized with a transmission line clock from a transmission line, means for outputting a video signal on which a video signal is superimposed in synchronization with the black burst signal, and the video signal an encoding unit that performs high-efficiency encoding using a sampling clock synchronized with the transmission line clock and outputs the encoded signal to the transmission line at a speed of the transmission line clock, the sampling clock being synchronized with the transmission line clock. An image communication device characterized by:
JP28957387A 1987-11-18 1987-11-18 Image communication device Expired - Lifetime JP2511481B2 (en)

Priority Applications (3)

Application Number Priority Date Filing Date Title
JP28957387A JP2511481B2 (en) 1987-11-18 1987-11-18 Image communication device
US07/272,709 US5045942A (en) 1987-11-18 1988-11-17 Digital video communication system having a network clock source
CA000583477A CA1312372C (en) 1987-11-18 1988-11-18 Digital video communication system having a network clock source

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP28957387A JP2511481B2 (en) 1987-11-18 1987-11-18 Image communication device

Publications (2)

Publication Number Publication Date
JPH01132286A true JPH01132286A (en) 1989-05-24
JP2511481B2 JP2511481B2 (en) 1996-06-26

Family

ID=17744980

Family Applications (1)

Application Number Title Priority Date Filing Date
JP28957387A Expired - Lifetime JP2511481B2 (en) 1987-11-18 1987-11-18 Image communication device

Country Status (1)

Country Link
JP (1) JP2511481B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61148986A (en) * 1984-12-24 1986-07-07 Hitachi Ltd Television signal sampling device
JPS61198988A (en) * 1985-02-28 1986-09-03 Mitsubishi Electric Corp Image encoding and transmitting system

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61148986A (en) * 1984-12-24 1986-07-07 Hitachi Ltd Television signal sampling device
JPS61198988A (en) * 1985-02-28 1986-09-03 Mitsubishi Electric Corp Image encoding and transmitting system

Also Published As

Publication number Publication date
JP2511481B2 (en) 1996-06-26

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