JPH01130946A - Image processing apparatus - Google Patents

Abstract

PURPOSE:To enhance the grade of an image by judging whether the dot already typed in the processed region of the periphery of a noticeable pixel is present and quantizing the noticeable pixel corresponding to the judge result. CONSTITUTION:According to the value of a signal 510, a selector 19 outputs a signal 520 as a signal 400 when the signal 510 is '0' and outputs a signal 530 as the signal 400 when the signal 510 is '1'. However, the value of the signal 530 is '0'. That is, binarized data in the periphery of a noticeable pixel is investigated with respect to a pixel low in image density and, when there is a signal turning a dot ON in said data, the signal 520 becomes '1' and, therefore, the signal 400 to a threshold valve setting circuit 4 becomes '1' and, since a threshold value T1=300 is selected in the threshold value setting circuit, the dot of the noticeable dot is turned OFF necessarily. Further, when there is no signal turning the dot ON in the periphery of the noticeable pixel at this time, the signal 520 becomes '0' and, therefore, a threshold value T2=127 is selected in the threshold value setting circuit 4 and binarization processing is performed. Since the signal 530 is selected with respect to a pixel high in image density by the selector 19, the threshold value T2=127 is selected in the threshold value setting circuit 4 to perform binarization processing.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of the Invention] The present invention relates to an image processing apparatus such as a digital printer and a digital facsimile.

[Prior art]

2. Description of the Related Art Conventionally, as a binarization method for reproducing halftones in digital printers, digital facsimiles, etc., there is a dither method that uses a dither matrix that periodically changes the threshold value. In this method, the number of gradations that can be expressed is limited by the dither matrix, and when the number of gradations is, for example, 16 gradations, there is a drawback that a false contour is generated in the output image. Furthermore, as a binarization method that has recently attracted attention, there is a method called an error diffusion method in which errors generated in the binarization process are dispersed to surrounding pixels. This method was first developed by Floyd and Steinberg in 1975 in “An Adaptive Algori
thm for 5patialGray
This method was proposed in a paper entitled ``5cale'' SID DIGEST, and is superior to the dither method in both resolution and gradation.

[Problem that the invention seeks to solve]

However, the conventional error diffusion method described above has the disadvantage that when the density of the original is low, dots are generated close to each other in the reproduced image, and the dots are connected in a linear manner, significantly degrading the quality of the image.

This is because the errors when binarizing in area a shown in Figure 8 are all positive because the density is low, and this error is diffused to area b, so dots are generated close to each other in that area. Put it away.

[Means and operations for solving the problem] The present invention aims to eliminate the drawbacks of the above-mentioned conventional example and to obtain a high-quality reproduced image for any image.

In order to solve this problem, the present invention is an image processing device that processes images using digital signals, and determines whether or not there are dots that have been placed in the already processed area around the pixel of interest. and a quantization means that quantizes the pixel of interest according to the determination result of the determination means. In such a configuration, referring to the already quantized area around the pixel of interest to be quantized, it is determined whether or not there is a dot placed in that area.
Based on the determination signal, the quantization means quantizes the pixel of interest.

〔Example〕

The present invention will be described in detail below with reference to the accompanying drawings.

FIG. 1 is a block diagram of the image processing apparatus of this embodiment.

Image data read by an input device 1 having a photoelectric conversion element such as a COD and a drive system for scanning it is sequentially input to an A/D converter.
It is sent to converter 2. Here, for example, the data of each pixel is converted into 8-bit digital data. This means that the data has been quantized to have 256 levels of gradation. Next, in the correction circuit 3, corrections such as shading correction for correcting uneven sensitivity of the sensor and unevenness in illuminance due to the illumination light source are performed by digital calculation processing. Next, the signal 100 of this correction method is transmitted to the binarization processing circuit 5 and the determination circuit 6.
is input. In the threshold value setting circuit 4, a threshold value for binarization is set based on the determination signal 400 outputted from the determination circuit 6, and a threshold value signal 200 is output. In the binarization circuit 5, the correction method signal 100 output from the correction circuit 3 is binarized using the threshold signal 200 output from the threshold setting circuit 4, and a binary signal 300 is output.

The determination circuit 6 uses the binary signal 300 output from the binarization circuit 5 and the correction method signal 100 output from the correction circuit 3 to refer to an already binarized area around the pixel of interest to be binarized. Then, it is determined whether or not there is a dot that is turned on, and a determination signal 400 is output.

The output device 7 is constituted by a laser beam printer, an inkjet printer, or the like, and forms an image by turning on and off dots using the binary signal 300 output from the binarization circuit 5.

FIG. 2 is a block diagram showing details of the threshold setting circuit 4. As shown in FIG.

The determination signal 400 output from the determination circuit 6 is sent to the selector 8
The threshold value is set here by the determination signal 400. In the selector 8, if the judgment signal 400 is "1", the threshold Tl=300 is selected, and if it is "0", the threshold T2=1
27 is selected and outputs the threshold signal 200.

Here, Tl=300, but TI is the correction method signal 10
Any value greater than the maximum value of 0 is sufficient. Also, T2=1
Although it is set to 27, other values may be used.

FIG. 3 is a block diagram of the binarization circuit 5. As shown in FIG.

The correction method signal 100 (density of the pixel of interest) output from the correction circuit 3 is added to the error E+1 (sum of errors allocated to the pixel of interest) stored in the error buffer memory 10 in the adder 9, and the result is Error correction method signal 210 as
is output.

Error correction signal 210 is then input to comparator 11 where it is compared with threshold signal 200. If the error correction method signal 210 is larger than the threshold signal 200, "1" is output, and if it is smaller, "0" is output as the binary signal 300.

On the other hand, in the converter 12, the input binary signal 300 is “
If it is “0”, the value remains as is, and if it is “1pa”, it is “Dm, l”.
The value converted to "x" is output as a signal 220. Signal 2
10 and signal 220 are input to the arithmetic unit 13. Here the difference between those two signals is calculated and the signal 230 (ΔEI
I). This signal 230 is inputted to the weighting circuit 14, where it is weighted (α is +) and then added to the error at a predetermined pixel position in the error buffer. FIG. 4 shows an example of the weighting coefficient (αkl). However, * corresponds to the pixel position of interest (1, J). By repeating the above operations, binarization is performed using the error diffusion method. In this embodiment, since the corrected signal 100 is handled with 8 bits, Dmax'' is set as 255, but if the corrected signal 100 is handled with m bits, Dmax-2ffi'-1+2'''-2+2+...
・・・・・・・・・・・・・・・＋2°.

FIG. 5 shows a block diagram of the determination circuit 6. As shown in FIG.

The binary signal 300 is input to the line buffer 17 and simultaneously latched. Further, the signal read from the line buffer 17 is also input to the line buffer 16 and latched at the same time. In other words, if the position of the pixel of interest to be processed is (I, J), the surrounding pixel positions (
I-2, J-2), (I-1, J-2), (1, J-2
), (I+1.J-2), (I+2.J-2), (I-
2゜J-1), (I-1, J-1), (I, J-1),
(I+1.J-1), (1+2.J-1), (1-2,
Binarized stream data for 12 pixels of J) and (I-1, J) will be latched.

The latched data for 12 pixels is input to the OR circuit 18. Here, the OR' of the data for 12 pixels is taken,
The result is output as signal 520.

The corrected signal 100 is input to the comparator 15 and the threshold value D=
20, and if the signal 100 is larger than the threshold, "l" is output as the signal 510, and if it is smaller than the threshold, "0" is output as the signal 510.

This makes it possible to determine the shading of the image.

Depending on the value of the signal 510, the selector 19 outputs the signal 520 as the signal 400 if the signal 510 is "0", and outputs the signal 530 as the signal 400 if the signal 510 is "L".
The value of 30 is "0".

In other words, for a pixel with low image density, the binarized flow data around the pixel of interest is checked, and if there is a signal that turns on the dot, 520 becomes "1", so the signal is sent to the threshold setting circuit 4. Since the signal 400 becomes "1" and the threshold value setting circuit selects the threshold value T1=300, the dot of the pixel of interest is always turned off. Further, at this time, if there is no signal to turn on the dot around the pixel of interest, the signal 520 becomes "0", so the threshold value setting circuit 4 selects the threshold value T2=127 and performs the binarization process.

For pixels with high image density, the signal 530 is selected by the selector 19, so the threshold value setting circuit 4 sets the threshold value T2=1.
27 is selected and binarization processing is performed.

By examining the binarized flow data around the pixel of interest with the above configuration, if there are dots around the pixel of interest in low-density parts of the image, the dots are forcibly turned off, so that the dots are separated. It is possible to prevent the phenomenon of being hit in close proximity.

[Other Embodiments 1] FIG. 6 is a block diagram in the case where the determination circuit 6 in the above embodiment is changed.

The binary signal 300 is input to the line buffer 20 and latched at the same time. Further, the signal read from the line buffer 20 is also input to the line buffer 21 and latched at the same time. In other words, if the position of the pixel of interest to be processed is (1, J), the surrounding pixel positions (
1-2, J-2), (I-1, J-2), (I, J-2
), (I+1.J-2), (I+2.J-2), (I-
2゜J-1), (I-1, J-1), (I, J-1),
(I+1.J-1), (I+2.J-1), (I-2,
Binarized stream data for 12 pixels of J) and (I-1, J) will be latched.

In the OR circuit 22, pixel positions (I-1, J-1), (I,
The OR' of the binary stream data for four pixels, J-1), (I+1.J-1), and (I-1, J), is performed, and a signal 630 is output as a result.

In the OR circuit 23, pixel positions (I-2, J-2), (I-
1°J-2), (I, J-2), (1+IJ-2), (
I+2. J-2), (I-2, J-1), (1+2.J
-1), (I-2, J) of the 8-picture portion of the binarized data is OR'ed, and a signal 620 is output as a result.

In the LUT 24, 3
A level switching signal 610 is output. switching signal 610
is 1" when the correction method signal 100 is 20 or less, "2" when it is 21 or more and 50 or less, and "0" when it is 51 or more.

In the selective OR circuit 25, according to the switching signal 610 output from the LUT 24, if the switching signal 610 is "0", "
0", if it is '1', 'OR' of signal 620 and signal 630
' is removed, and if it is "2", the signal 630 is output as the determination signal 400. For example, if the correction method signal 100 is 1
8, the switching signal 610 becomes "1", and at this time, if the signal 620 is "1" and the signal 630 is "0", the determination signal 400 becomes "1".

Here, the area to be referenced for the value of the correction method signal 100 is set in three stages (that is, the area around the pixel of interest is not examined at all, the surrounding 4 pixels are examined, or the surrounding 12 pixels are examined). ing. As a result, the lower the density of the image, the larger the area to be examined around the image, so that the dots can be dispersed according to the density, and it is possible to prevent dots from being placed close to each other in areas of low density.

Note that by increasing the number of line buffers, latches, and OR circuits as necessary, reference areas can be set in multiple stages. An example of four stages will be described below.

The position of the pixel of interest to be processed now is (I.

J). Pixel positions around it (1-3, J-3),
(1-2, J-3), (I-1, J-3), (I, J-
3), (I+1°J-3), (1+2.J-3), (r
+a, J-3), (I-3゜J-2), (I-2, J-
2), (I-1, J-2), (I, J-2), (I+1
．． J-2), (I+2.J-2), (1+3.J-2)
, (I-3, J-1), (1-2, J-1), (I-1
, J-1), (1, J-1), (1+1.J-1), (
I+2. J-1), (1+3°J-1), (I-3,J
), (I-2, J), and (1-1, J), which are necessary to hold the binarized data for 24 pixels. And three OR circuits (a, b, c
) and one selective OR circuit (d). In the OR circuit, pixel positions (1-1,, J-1), (I, J-1)
, (I+1.J-1), (I-1,J), the OR' of the binarized data for four pixels is taken, and as a result, the signal e
is output. In the OR circuit, the pixel position (I-2, J-
2), (I-1, J-2), (1, J-2), (I+1
．． J-2), (I+2.J-2), (I-2, J-1)
, (1+2.J-1), (I-2,J), which are eight pixels worth of binary data, are 'OR'ed, and as a result, a signal f is output. In the OR circuit C, the pixel position (I-3°J
-3), (I-2, J-3), (I-1, J-3), (
I, J-3), (1+1.J-3), (I+2.J-3
), (I+3.J-3), (1-3,J-2), (I+
3. J-2), (I-3, J-1), (I+3.J-1
), (I-3, J) of 12 pixels of binarized data
R' is taken and a signal g is output as a result. In the selective OR circuit d, if the correction method signal 100 is 10 or less, the result of 'OR'ing the signal e, the signal f, and the signal g is
If the correction method signal 100 is greater than or equal to 11 and less than or equal to 20, the result of 'OR'ing the signal e and the signal f is
If the correction method signal 100 is 1 or more and 50 or less, the result of taking the signal e may be outputted, and if the correction method signal 100 is 51 or more, "0" may be output as the determination signal. Here, the level of the correction method signal 100 is set to four levels: 10 or less, 11 or more and 20 or less, 21 or more and 50 or less, and 51 or more, but this is just an example.

Furthermore, a color image can be realized by providing the circuits shown in this embodiment for predetermined colors.

[Other Embodiments 2] FIG. 7 is a block configuration diagram when the embodiment of FIG. 1 is applied to ternarization processing.

The input sensor 1, A/D converter 2, and correction circuit 3 are the same as those shown in FIG. The correction method signal 100 is input to the ternarization processing circuit 27 and the determination circuit 28 .

In the threshold value setting circuit 26, a threshold value for ternarization is set based on the determination signals 750, 760 outputted from the determination circuit 28. For example, if the determination signal 750 is “0”, 80
If the determination signal 760 is '1', 160 is output as the threshold signal 710. If the determination signal 760 is '0', 160 is output, and if it is '1', 300 is output as the threshold signal 720.

This threshold value setting circuit 26 can be realized by having two circuits similar to the circuit shown in FIG.

In the ternarization circuit 27, the corrected signal 100 output from the correction circuit 3 is ternarized using the threshold signals 710 and 720 output from the threshold setting circuit 26, and the signal 730.7
Outputs 40. For example, if signal 100 is smaller than signal 710, signals 730 and 740 are both “0” and signal 1
If 00 is greater than or equal to signal 710 and less than signal 720, signal 730 is set to "1" and signal 740 is set to "O". Furthermore, if the signal 100 is greater than or equal to the signal 720, the signal 710 is “
0" and the signal 740 is "1". The ternarization processing here is performed by an error diffusion method in which the difference between the output image density and the input image density is diffused to surrounding pixels.

The determination circuit 28 can be realized by including two circuits as shown in FIG. 5 or 6. Here, the signals 730 and 740 output from the ternarization circuit 27 and the corrected signal 100 output from the correction circuit 3 are used to refer to the already ternarized area around the pixel of interest to be ternarized. It is determined whether or not there is a dot placed within that area, and determination signals 750 and 760 are output. For example, signal 100
If is less than 20, the circuit to which the signal 730 is input checks whether there are dots in the processed area around the pixel of interest, and outputs the result as a signal 750. At this time, the signal 760 is forcibly set to 0''. If the signal 100 is greater than or equal to 128 and less than or equal to 150, the circuit to which the signal 740 is input checks whether there are dots in the processed area around the pixel of interest, and The result is output as a signal 760. At this time, the signal 750 is forced to "0".

Also, if the signal 100 is 21 or more and less than 128 or 150
If it is larger than , both signals 750 and 760 become 0''.

The output device 29 is constituted by a laser beam printer, an inkjet printer, or the like, and forms an image using signals 730 and 740 output from the ternary circuit 27.

Although the ternarization circuit has been explained here, the threshold value setting circuit in FIG. 2 and the determination circuit in FIG.
If N-1) pieces are used, this embodiment can be applied to N-value processing.

Furthermore, a color image can be realized by providing the circuits shown in the above embodiments for predetermined colors.

In this way, according to this embodiment, the presence or absence of dots around the pixel of interest is checked during the binarization process and the N-value process, and the error diffusion method is performed by performing the binarization (N-value conversion) process. It is possible to prevent the dots from being hit in close proximity, which has been a problem.

Furthermore, by changing the reference binarization area according to the image density, dots can be printed with uniformity that matches the image density, improving the quality of the image.

Incidentally, the present invention can also prevent white noise that occurs because dots are not placed in areas of high image density. In this case, if even one dot is not placed in the reference area, a dot is placed at the pixel of interest, and if all dots are placed, the pixel is binarized using a normal threshold value.

〔Effect of the invention〕

As explained above (according to the present invention, it is determined whether or not there are dots placed in the already processed area around the pixel of interest, and the pixel of interest is quantized according to the determination result). As a result, it is possible to prevent the phenomenon in which dots are placed close to each other, which occurs in areas of low image density, and the quality of the image can be improved.

[Brief explanation of the drawing]

Fig. 1 is a block diagram of the present embodiment, Fig. 2 is a block diagram of the threshold setting circuit 4, Fig. 3 is a block diagram of the binarization circuit 5, and Fig. 4 shows an example of weighting coefficients. 5 is a block configuration diagram of the determination circuit 6, FIG. 6 is a block configuration diagram when the determination circuit 6 is changed, and FIG. 7 is a block diagram of an embodiment in which the present invention is applied to multi-value processing. Configuration diagram, Figure 8 is a diagram showing problems in conventional processing, 1 in the diagram
2 is an input device, 2 is an A/D converter, 3 is a correction circuit, 4 is a threshold value setting circuit, 5 is a binarization circuit, 6 is a determination circuit, and 7 is an output device.

Claims (5)

[Claims] (1) An image processing device that processes an image using a digital signal, including a determining means for determining whether or not there are dots that have been placed in an already processed area around a pixel of interest, and a determination by the determining means. 1. An image processing device comprising: quantization means for quantizing a pixel of interest according to a result. (2) The image processing apparatus according to claim (1), wherein the size of the processed area is variable depending on the density of the pixel of interest. (3) The image processing apparatus according to claim (1), wherein the size of the processed area becomes larger as the density of the pixel of interest is lower, and smaller as the density is higher. (4) The image processing apparatus according to claim (1), wherein the determining means outputs a signal indicating whether or not a dot exists within the processed area to the quantizing means. (5) The image according to claim (1), wherein the quantization means does not place a dot on the pixel of interest if the determination means determines that a dot exists in the processed area. Processing equipment.