JPH01276969A - Picture signal processor - Google Patents

Abstract

PURPOSE:To secure the continuity between a noticed picture element and its peripheral output picture elements so as to improve picture qualities of characters and graphics by setting the threshold level when binarization is made lower than the threshold level at the time of normal processing in accordance with the dot arrangement of the peripheral output picture elements of the noticed picture element. CONSTITUTION:A binarized output storing means 111 stores a binarizing level Pxy from a binarizing means 108 in corresponding to positions of peripheral output picture elements of a noticed picture element and, when binarization is performed, the inside of the peripheral output area 112 of the noticed picture element is read out and outputted to a peripheral output calculating means 113. The means 113 reads out the peripheral output area 112 in the storing means 111 and, when the binarizing level of all or partial picture elements of the area 112 is a black level, sets the threshold level 107 of the binarization, for example, lower so that the binarizing level of the noticed picture element can easily become the black level. Therefore, the continuity between the noticed picture element and its peripheral output picture elements can be secured and picture qualities of characters and graphics can be improved.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an image signal processing device having a function of binary-reproducing image information including gradation images.

2. Description of the Related Art In recent years, with the mechanization of office processing and the rapid spread of image communications, there has been an increasing demand for high-quality reproduction of gradation images and printed images in addition to conventional black-and-white binary originals.

In particular, many proposals have been made for pseudo gradation reproduction of gradation images using binary images, which is highly compatible with display devices and recording devices.

The denoiser method is the most well-known method for reproducing these pseudo gradations. This method attempts to reproduce gradation based on the number of dots reproduced within a predetermined area, and compares the input image information with the threshold value prepared in the dither matrix for each pixel. At the same time, binarization processing is performed. In this method, the gradation characteristics and resolution directly depend on the size of the dithered Vx, and are incompatible with each other. Furthermore, the occurrence of moiré patterns in reproduced images used for printed images and the like is unavoidable.

A random dither method has been proposed as a method that achieves both the above gradation characteristics and high resolution, and is highly effective in suppressing the occurrence of moiré patterns.A representative example of this method is the error diffusion method [R.F. Special Gray Scale “Nisiday 75 Digest Pages 36-37 (Reference: R, FLOYD & L, 5TEINB
ERG, “An Adaptive Algorithm
for 5patial GrayScale”,
SID 75 DIGEST, pP36-37)) has been proposed.

FIG. 4 is a block diagram of essential parts of an apparatus for realizing the above error diffusion method.

When the coordinates of the pixel of interest in the original image are (x, y), 401 is an error storage means, 402 is an unprocessed pixel area around the pixel of interest indicated by the error distribution coefficient matrix, and 403 is an accumulation at the coordinates (x, y). Error Sxy storage device, 40
4 is the input terminal of the input level Ix)F at the coordinates (x, y), 405 is the input terminal of I' xy (=Ixy+Sxy)
406 is an output terminal for a binary signal Pxy of output level O or R, 407 is a signal terminal for applying a constant threshold value R/2, 408 is an input signal I'xy and a constant threshold value R
/2 and outputs PxV=R when I'xy>R/2, and outputs Pxy=O in other cases, 409
is a difference calculation means for calculating the binarization error for the target pixel of Exy (=I'xy-Pxy).

Now, the integration error Sxy for the pixel of interest is expressed by equation (1).

It is expressed as (2).

5xy=ΣKij -Ex-j+2.3'-i +1
・・・−・−・・−(11 (However, 1.J indicates the coordinate in the error distribution coefficient matrix) This error distribution coefficient Kij weights the distribution of the error Exy to the surrounding pixels of the pixel of interest. In the above-mentioned document, (however, the position of the pixel of interest is shown) is given as an example.

In the configuration shown in FIG. 4, the above calculation is performed by multiplying the binarization error Exy for the pixel of interest by the distribution coefficient corresponding to each pixel A to D in the unprocessed surrounding pixel area 402, and
This is realized by an error distribution calculation means 410 that adds the value within 01 and stores it again at the corresponding position. However, the accumulated error at pixel position B in the error storage means 401 is cleared to O in advance.

Problems to be Solved by the Invention The error diffusion method described above has superior performance in terms of gradation characteristics and resolution compared to the dither method, and the appearance of moiré patterns is extremely rare even when reproducing printed images. However, since the arrangement of dots in the binarized output is not considered, the reproduction of characters, figures, etc. lacks continuity, leading to deterioration in character quality.

The present invention provides an image signal processing device that ensures the continuity of characters and graphics in the above-mentioned error diffusion method, has excellent gradation characteristics and resolution, and has good character quality.

Means for Solving the Problems In order to achieve the above object, the technical solution of the present invention is as follows:
When binarizing multi-gradation density levels sampled in pixel units, an error storage means stores the binarization error of the pixel of interest in correspondence with the surrounding pixel positions;
A binarized output storage means for storing the digitized output in correspondence with its surrounding pixel position, and a correction level that adds the input level of the pixel of interest and the integrated error corresponding to the pixel position of interest in the error storage means. input correction means for outputting a pixel; peripheral output calculation means for outputting a threshold level for binarization at a threshold level corresponding to a dot arrangement of peripheral output pixels of the pixel of interest in the binarization output storage means; a binarization means that compares the correction level with a threshold level from the peripheral output calculation means and determines a binarization level of the pixel of interest;
A difference calculation means for calculating a difference in digitization level, that is, a binarization error, and a correction error from the error calculation means and a plurality of predetermined distribution coefficients to calculate an error distribution value corresponding to unprocessed pixels around the pixel of interest. , an error distribution calculation means for adding the error distribution value to the accumulated error of the corresponding pixel position in the error storage means and storing the result again.

For production.

According to the above configuration, the present invention sets the threshold level during binarization to a value lower than, for example, the threshold level during normal processing, depending on the dot arrangement of peripheral output pixels of the pixel of interest, and increases the black level. By making it easier to draw, continuity with peripheral output pixels is ensured, and the image quality of characters and graphics is improved.

Embodiment FIG. 1 is a block diagram of main parts of an image signal processing apparatus in an embodiment of the present invention.

In the same figure, the configuration and operation of each block 101 to 110 are the same as those of each block 401 to 110 in the conventional error diffusion method in FIG.
This is similar to 410. The binary skewer force storage means 111 and the peripheral output calculation means 113, which differ from the configuration shown in FIG. 3, will be described in detail below.

The binary output storage means 111 stores the 2-value output from the binary output means lO8.
The digitization level PxV is stored in correspondence with the peripheral output pixel position of the pixel of interest, and when binarizing, the peripheral output area 112 of the pixel of interest is read out and output to the peripheral output calculation means 113.

The peripheral output calculation means 113 reads out the peripheral output area 112 in the binary output storage means 111, and when the binary level of all or some of the pixels in the peripheral output area 112 is the black level, binarizes the peripheral output area 112. For example, the threshold level 107 is set low to make it easier for the binarization level of the pixel of interest to reach the black level.

The peripheral area referred to by the peripheral output means 113 will be explained using FIG.

Figure 2 (JL) shows the peripheral output pixel a adjacent to the pixel of interest.
%d is used, and the peripheral output pixel a
The threshold level is controlled by a logical product or logical sum condition at the binarization level of all or some pixels of %d.

Figure 2 (b) shows the peripheral output pixel area expanded over a wide range, and takes into consideration the directionality of the dot arrangement of black pixels, where θl to θ4 are vertical, horizontal, or subject directions. Peripheral output pixel a %
The directionality is detected as follows based on the binarization level of h.

(However, Australia indicates logical product.) Furthermore, as the peripheral output calculation means 113, 01 to θ4
The threshold level Bth at the time of binarization is controlled to be low by the logical sum condition of the directionality.

FIG. 3 is a block diagram of the peripheral output calculation means. 3
Reference numeral 01 indicates an output arithmetic circuit for realizing the logical conditions of the peripheral output area, and 304 indicates a selector for selecting a threshold level for binarization.

The output arithmetic circuit 301 can be explained using the logic condition shown in FIG. 2(b) as an example: y=(a*b)+(c*d)+(e if)+
(gnah)・・・・・・・・・ (3) If we express the logical condition as a logical formula, it will look like formula (5),
The output arithmetic circuit can be configured by a gate circuit of AND 302 and OR 303.

The selector 304 selects the normal threshold level Bthl when y=o according to the select signal from the output calculation circuit 301.
When y=1, a threshold level Bth2 set lower than the normal threshold level Bthl is selected and the threshold level Bth is output to the binarization means.

In addition, the output calculation circuit 301 is not a random logic like a gate circuit, but a ROM (read-only memory).
It is also a simple method to configure. The peripheral output pixels a%d or a~h shown in Figure 2 are used as addresses, and R
It is easily possible to output one or more as a threshold level select signal in the OM pattern.

Furthermore, the number of black pixels in the peripheral output pixel a% d in FIG. 2(a) or 01 to 01 in the peripheral output pixel area in FIG. 2(b)
It is also conceivable to set a plurality of threshold levels with respect to the threshold level during normal processing, depending on the number of detected directions of θ4.

By setting the threshold level Bth2 to 0'', it is possible to forcibly set the black level when a logical condition is satisfied, instead of making it easier to set the black level.

Effect of the invention .

As described above, in the present invention, the threshold level during binarization is set lower than the threshold level during normal processing, depending on the dot arrangement of peripheral output pixels of the pixel of interest.
When converted into a value, the black level can be easily changed, continuity with peripheral output pixels can be ensured, and the image quality of characters and graphics can be improved.

Furthermore, the same effect can be obtained by setting the second threshold level at the time of binarization to '0' and forcing the black level.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of main parts of an image signal processing device according to an embodiment of the present invention, FIG. 2 is a conceptual diagram showing a peripheral area of a peripheral output pixel of a pixel of interest in the same device, and FIG. FIG. 4 is a detailed block diagram of the peripheral output calculation means, and is a block diagram of main parts of an image signal processing device implementing the conventional error diffusion method. 101, 401...Error storage means, 110...Error calculation means, 111...Binary output storage means, 113...
- Peripheral output calculation means, 301... Output calculation circuit, 30
4...Selector. Name of agent: Patent attorney Toshio Nakao and 1 other person N1
Figure 2 Figure 5 King II! 11th man (Fig. 3 301) ■Includes Fig. 4

Claims (1)

[Claims] an error storage means for storing a binarization error of a pixel of interest in correspondence with pixel positions around it when binarizing multi-gradation density levels sampled in pixel units; and binarization of the pixel of interest. a binarized output storage means for storing the output in correspondence with its surrounding pixel position; and a correction level is output by adding the input level of the pixel of interest and the integrated error corresponding to the position of the pixel of interest in the error storage means. input correction means; peripheral output calculation means for outputting a threshold level for binarization at a threshold level corresponding to a dot arrangement of peripheral output pixels of the pixel of interest in the binarization output storage means; 2 of the pixel of interest compared with the threshold level from the peripheral output calculation means.
a binarization means for determining a digitization level; a difference calculation means for obtaining a binarization error as a difference between the correction level and the binarization level; and a correction error from the error calculation means and a plurality of predetermined distribution coefficients. Error allocation calculation means for calculating an error allocation value corresponding to unprocessed pixels around the pixel of interest from the pixel of interest, adding the error allocation value to the accumulated error of the corresponding pixel position in the error storage means, and storing the result again. An image signal processing device characterized by: