JPH01127004U - - Google Patents
Info
- Publication number
- JPH01127004U JPH01127004U JP2302088U JP2302088U JPH01127004U JP H01127004 U JPH01127004 U JP H01127004U JP 2302088 U JP2302088 U JP 2302088U JP 2302088 U JP2302088 U JP 2302088U JP H01127004 U JPH01127004 U JP H01127004U
- Authority
- JP
- Japan
- Prior art keywords
- program
- programmable controller
- programs
- executing
- utility
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000010586 diagram Methods 0.000 description 5
- 238000000034 method Methods 0.000 description 3
Landscapes
- Programmable Controllers (AREA)
Description
第1図は本考案を適用したプログラマブルコン
トローラの一構成例を示すブロツク図、第2図は
各プログラムに対応した計数レジスタの一例を示
す説明図、第3図は本例に係るプログラム起動時
の動作図を説明するための説明図、第4図は本例
に係るプログラムの起動処理およびタイマ命令処
理手順の一例を示すフローチヤート、第5図は割
り込みプログラムとサイクリツクプログラムとを
処理する際の動作手順の一例を示すフローチヤー
トである。
1……CPU、2……システムプログラムメモ
リ、4……ユーザプログラムメモリ、6……タイ
マ、10……RAM。
Fig. 1 is a block diagram showing an example of the configuration of a programmable controller to which the present invention is applied, Fig. 2 is an explanatory diagram showing an example of a counting register corresponding to each program, and Fig. 3 is a block diagram showing an example of the configuration of a programmable controller to which the present invention is applied. An explanatory diagram for explaining the operation diagram, FIG. 4 is a flowchart showing an example of a program startup process and a timer instruction processing procedure according to this example, and FIG. It is a flowchart showing an example of an operation procedure. 1...CPU, 2...System program memory, 4...User program memory, 6...Timer, 10...RAM.
Claims (1)
コントローラにおいて、各プログラム毎に個別の
タイマ計数手段を設けたことを特徴とするプログ
ラマブルコントローラ。 A programmable controller capable of executing a plurality of programs, characterized in that a separate timer counting means is provided for each program.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2302088U JPH01127004U (en) | 1988-02-25 | 1988-02-25 |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP2302088U JPH01127004U (en) | 1988-02-25 | 1988-02-25 |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01127004U true JPH01127004U (en) | 1989-08-30 |
Family
ID=31241659
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP2302088U Pending JPH01127004U (en) | 1988-02-25 | 1988-02-25 |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01127004U (en) |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5260389A (en) * | 1975-11-14 | 1977-05-18 | Hitachi Ltd | Timer system for sequence controller |
JPS5533231A (en) * | 1978-08-30 | 1980-03-08 | Koyo Denshi Kogyo Kk | Sequential controller |
-
1988
- 1988-02-25 JP JP2302088U patent/JPH01127004U/ja active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS5260389A (en) * | 1975-11-14 | 1977-05-18 | Hitachi Ltd | Timer system for sequence controller |
JPS5533231A (en) * | 1978-08-30 | 1980-03-08 | Koyo Denshi Kogyo Kk | Sequential controller |