JPH01117650A - Current limiting circuit - Google Patents
Current limiting circuitInfo
- Publication number
- JPH01117650A JPH01117650A JP62276088A JP27608887A JPH01117650A JP H01117650 A JPH01117650 A JP H01117650A JP 62276088 A JP62276088 A JP 62276088A JP 27608887 A JP27608887 A JP 27608887A JP H01117650 A JPH01117650 A JP H01117650A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- current
- state
- superconducting wire
- superconducting
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000003990 capacitor Substances 0.000 abstract description 12
- 230000000694 effects Effects 0.000 description 6
- 238000010586 diagram Methods 0.000 description 4
- 239000004020 conductor Substances 0.000 description 3
- 230000003111 delayed effect Effects 0.000 description 2
- 230000007704 transition Effects 0.000 description 2
- 230000001934 delay Effects 0.000 description 1
- 238000009499 grossing Methods 0.000 description 1
- 239000002887 superconductor Substances 0.000 description 1
Classifications
-
- Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
- Y02—TECHNOLOGIES OR APPLICATIONS FOR MITIGATION OR ADAPTATION AGAINST CLIMATE CHANGE
- Y02E—REDUCTION OF GREENHOUSE GAS [GHG] EMISSIONS, RELATED TO ENERGY GENERATION, TRANSMISSION OR DISTRIBUTION
- Y02E40/00—Technologies for an efficient electrical power generation, transmission or distribution
- Y02E40/60—Superconducting electric elements or equipment; Power systems integrating superconducting elements or equipment
Landscapes
- Emergency Protection Circuit Devices (AREA)
- Control Of Voltage And Current In General (AREA)
- Power Conversion In General (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野]
この発明は、電源回路の電源投入時の突入電流を制限子
る電流制限回路に関するものである。DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a current limiting circuit that limits the rush current of a power supply circuit when the power is turned on.
[従来の技術]
第4図は、例えば不ミック・ラムダ社カタログ1987
年版23ページに示された電流制限回路である。[Prior art] Fig. 4 shows, for example, Fmic Lambda Catalog 1987.
This is the current limiting circuit shown on page 23 of the current edition.
第4図において、(1)は電源スィッチ、(2)は交流
入力を直流に変換する整流回路、(3)は、電流を制限
する制限抵抗、(4)は一連荷あるいは平滑回路を含め
たコンデンサ、(5)は負荷、(6)は電源ONの信号
を遅らせる遅延回路、(7)は、サイリスタのゲート信
号を発生するトリガ回路、(8)はサイリスタである。In Figure 4, (1) is a power switch, (2) is a rectifier circuit that converts AC input to DC, (3) is a limiting resistor that limits current, and (4) is a series load or smoothing circuit. A capacitor, (5) a load, (6) a delay circuit that delays a power ON signal, (7) a trigger circuit that generates a gate signal for a thyristor, and (8) a thyristor.
次に動作について説明する。端子(101)に入力され
た交流電源は一端子(,102)に印加される電源ON
の信号により作動する電源スィッチ(1)を経て整流回
路!電圧■1の直流電圧となる。整流回路の出力側に接
続されたサイリスタ(8)は第5図(C)に示すように
ゲート入力信号が第図5(a)に示すような端子(10
2)に印加された電源ON信号を遅延回路(6)で時間
Tだけ遅らせているため、電源投入時はしゃ断状態であ
る。Next, the operation will be explained. The AC power input to the terminal (101) is turned on when the power is applied to one terminal (, 102).
Rectifier circuit via power switch (1) activated by the signal! The voltage becomes a DC voltage of 1. As shown in FIG. 5(C), the thyristor (8) connected to the output side of the rectifier circuit receives the gate input signal from the terminal (10) shown in FIG. 5(a).
Since the power ON signal applied to 2) is delayed by the time T by the delay circuit (6), it is in a cut-off state when the power is turned on.
従って整流回路(2)の直流出力(■1)はサイリスタ
(8)と並列に接続された制限抵抗(3)を辿して負荷
側のコンデンサ(4)を充電する。この時の充電電流は
制限抵抗(3)により制限されるので、電源投入時の突
入電流を小さくすることができる。第5図(b)に示す
ようにコンデンサの充電が完了し、その電圧か整流回路
(2)の出力電圧とほぼ等しくなる時間(T)後に1.
第5図1(C)のようなゲート信号をトリが発生回路(
7)で発生させ、サイリスタ(8)のゲートに印加すれ
ばサイリスタ(8)は導通状態となり、整流回路(3)
の出力を負荷(5)に供給することができる。しかしな
がら、サイリスタ(8)が導通状態になっても完全な導
通とはならないで電圧(■5)の電圧降下を生じ−その
電圧は一般的なサイリスタの場合は0.5〜0.7v程
度で、負荷電流10との積で示されるだけの損失を生じ
る。特に出力電圧が低く、電流IOが大きい場合には、
このサイリスタ(8)での損失の割合が大きくなる。Therefore, the DC output (1) of the rectifier circuit (2) traces the limiting resistor (3) connected in parallel with the thyristor (8) and charges the capacitor (4) on the load side. Since the charging current at this time is limited by the limiting resistor (3), the rush current when the power is turned on can be reduced. As shown in FIG. 5(b), after a time (T) when the charging of the capacitor is completed and its voltage becomes almost equal to the output voltage of the rectifier circuit (2), 1.
The circuit that generates the gate signal as shown in Figure 5 (C) (
7), and when applied to the gate of the thyristor (8), the thyristor (8) becomes conductive, and the rectifier circuit (3)
can be supplied to the load (5). However, even if the thyristor (8) becomes conductive, it is not completely conductive and a voltage drop of (■5) occurs - this voltage is about 0.5 to 0.7 V in the case of a general thyristor. , a loss is generated as shown by the product of the load current 10. Especially when the output voltage is low and the current IO is large,
The loss rate in this thyristor (8) increases.
従来の電流制限回路は以上のように構成されているので
、特に出力電圧が低く、電流の大きい電源装置の場合、
損失が大きくなる問題があった。Conventional current limiting circuits are configured as described above, so especially in the case of power supplies with low output voltage and large current,
There was a problem of large losses.
この発明は、上記のような問題点を解消するためになさ
れたもので、損失が無く突入電流を制限できる電流制限
回路を得ることを目的とする。The present invention has been made to solve the above-mentioned problems, and an object of the present invention is to provide a current limiting circuit that can limit inrush current without loss.
この発明に係る電流制限回路は、超電導線と超電導線の
近くに配した永久磁石と、永久磁石の磁力を打ち消すよ
うに働く電磁石と、上記超電導線と並列に抵抗を接続し
たものである。The current limiting circuit according to the present invention includes a superconducting wire, a permanent magnet placed near the superconducting wire, an electromagnet that acts to cancel the magnetic force of the permanent magnet, and a resistor connected in parallel with the superconducting wire.
この発明における電流制限回路は、負荷側コンデンサの
充電が完了した後の実負荷状態で制限抵抗をバイパスす
る回路に用いた超重、S線を常電導状態から超電導状態
に変移させるようにし電流制限回路での損失を無くすよ
うにする。The current limiting circuit according to the present invention is configured to transition the super-heavy and S wires used in the circuit that bypasses the limiting resistor from the normal conducting state to the superconducting state in the actual load state after the charging of the load side capacitor is completed. Try to eliminate losses.
以下、この発明の一実施例を図について説明する。 An embodiment of the present invention will be described below with reference to the drawings.
第1図において(1)〜(6)は従来と同一である。In FIG. 1, (1) to (6) are the same as the conventional one.
αBは実負荷状態で電流通路となる超電導線、αυは超
電導線を常電導体にする磁界を発生する永久磁石、(1
2+は永久磁石1υの磁力を打ち消す磁力を発生させる
電磁石、11mは電磁石に電流を供給するコイル用電源
である。αB is a superconducting wire that becomes a current path under actual load, αυ is a permanent magnet that generates a magnetic field that makes the superconducting wire a normal conductor, (1
2+ is an electromagnet that generates a magnetic force that cancels the magnetic force of the permanent magnet 1υ, and 11m is a coil power source that supplies current to the electromagnet.
次に動作について説明する。Next, the operation will be explained.
端子(101)に入力さjた交流電源は端子(102)
から入力される電源ONの信号で動作するリレーで制御
され整流回路で直流重圧(vl)に変換される。The AC power input to the terminal (101) is connected to the terminal (102).
It is controlled by a relay that operates with a power ON signal input from the power source, and is converted into DC heavy pressure (vl) by a rectifier circuit.
一方さ延回路(6)へ入力された電源ONの信号は第2
図(d)に示すように#間Tだけ遅れてコイル用電源α
3に印加される。遅延回路αJでの遅延時間Tの間はコ
イル甲電源113+の出力は無く、永久磁石0υの嫡男
(ロ)が超電導線ααを交差し、このときの磁界(ロ)
を超電導線の臨界磁界(yO)より大きな値となるよう
に設定し、超電導体が常電導体として作用し。On the other hand, the power ON signal input to the spreading circuit (6) is the second
As shown in figure (d), the coil power supply α is delayed by # interval T.
3 is applied. During the delay time T in the delay circuit αJ, there is no output from the coil A power supply 113+, and the eldest son (b) of the permanent magnet 0υ crosses the superconducting wire αα, and the magnetic field (b) at this time
is set to a value larger than the critical magnetic field (yO) of the superconducting wire, and the superconductor acts as a normal conductor.
そのインピーダンス(抵抗値)が大きな状態となるよう
にする。電源投入後、9荷側コンデンサ(4)を充電す
る時間より大きな時間の遅延時間(T)を選んでおけは
1M源投入時のコンデンサ(4)の充電電流は制限抵抗
(3)で制限される突入電流に制限することができる。The impedance (resistance value) is set to be large. If you select a delay time (T) that is larger than the time to charge the load-side capacitor (4) after turning on the power, the charging current of the capacitor (4) when the 1M power is turned on will be limited by the limiting resistor (3). The inrush current can be limited to
また時間(T)経過後即ち、コンデンサ(4)の光重後
コイル用電源uJが作動状態となり、電磁石Uに電流(
りを流し、その電流による磁界(ai)が永久磁石の磁
力(ロ)を打ち消す方向と大きさになるよう電磁石d2
のコイル巻数および電流(I)を選んで、合成の磁界を
超電導線の臨界磁界(ダ0)より小さくする。その結果
常電導状態で高インピーダンス状態であった超電導線Q
Gは超電導状態となり、そのインピーダンス(抵抗値)
は、超電導線の特徴である抵抗値が零となり、負荷電流
(10)による損失も零となる。Also, after time (T) has elapsed, the power source uJ for the light coil of the capacitor (4) becomes active, and the electromagnet U receives a current (
The electromagnet d2 is set so that the magnetic field (ai) caused by the current has a direction and size that cancels out the magnetic force (b) of the permanent magnet.
The number of coil turns and current (I) are chosen to make the resultant magnetic field smaller than the critical magnetic field (da0) of the superconducting wire. As a result, the superconducting wire Q was in a high impedance state in a normal conducting state.
G becomes superconducting and its impedance (resistance value)
In this case, the resistance value, which is a characteristic of superconducting wires, becomes zero, and the loss due to the load current (10) also becomes zero.
なお、上記実施例では、永久磁石uDの磁力を打ち消す
11磁石@を永久磁石(Iυとは別に設けたが、第2図
に示すように、永久磁石(111を磁芯とし、その上に
電磁石用コイル−1(14を巻き、永久磁石(I])の
磁界を打ち消す方向の電流(■1)を流すようにしても
効果は同じである。ナセ、第2図で示す以外の部分は第
1図と同一である。In the above embodiment, 11 magnets @ that cancel the magnetic force of the permanent magnet uD were provided separately from the permanent magnet (Iυ), but as shown in FIG. The effect is the same even if you wind the coil 1 (14) and flow the current (■1) in the direction of canceling the magnetic field of the permanent magnet (I). Same as Figure 1.
また上記2つの実施例では一市源投入時の突入電流を制
限するのみの効果であったが、第3図に示すように、電
磁石α2に第2のコイル−219を設けて、そのコイル
−2Q51に負荷電流(10)を電磁石の作る磁力を打
ち消す方向に流し、負荷短絡等の過大電流が流れたとき
、’iii’磁石uzの磁力を打ちlnし、永久磁石α
υの磁力により、超1M導線aαの臨界磁界(00)を
超え、超電導線OGは常電導体となり、継続的に短絡電
流が流れるのを防止することかできる効果か得られる。In addition, in the above two embodiments, the effect was only to limit the rush current when one source is turned on, but as shown in FIG. In 2Q51, the load current (10) is applied in the direction of canceling the magnetic force created by the electromagnet, and when an excessive current such as a load short circuit flows, the magnetic force of the 'iii' magnet uz is struck ln, and the permanent magnet α
Due to the magnetic force of υ, the critical magnetic field (00) of the super 1M conducting wire aα is exceeded, and the superconducting wire OG becomes a normal conductor, producing the effect of preventing the continuous flow of short circuit current.
以上のように、この発明によれば、負荷側コンデンサの
充電が完了した後実負荷状態で制限抵抗をバイパスする
回路に用いた超電導線を常電導状態から超電導状態に変
移させるようにしたので、実負荷状態での損失が全く生
じない電流制限回路が得られる効果がある。As described above, according to the present invention, the superconducting wire used in the circuit that bypasses the limiting resistor is made to transition from the normal conductive state to the superconducting state in the actual load state after the charging of the load side capacitor is completed. This has the effect of providing a current limiting circuit in which no loss occurs under actual load conditions.
第119’lは本発明の一実施例を示す構成図、第2図
は本発明による永久磁石を磁芯とした電流制限回路の1
部を示す部分構成図、第3図は本発明による電源投入時
の突入電流を制限する機能の他に1荷短絡等の過大電流
をも制限する電流制限回路図、第4図は従来の電流制限
回路図−第5図(a)(b)(C)(d)は従来の電流
制限回路の動作を説明するための説明図である。
(1)は電源スィッチ、(2)は整流回路、(3)は制
限抵抗、(4)は負荷側容量を代表するコンデンサー(
5)は負荷、(6)は遅延回路、(7)はトリが発生回
路、(8)はサイリスタ、αGは超電導線、ul)は永
久磁石、u乃は電磁石、u3はコイル用軍源、(141
はコイル−1−■はコイル−2゜119'l is a configuration diagram showing one embodiment of the present invention, and FIG.
Fig. 3 is a current limiting circuit diagram that limits the inrush current when the power is turned on according to the present invention, as well as excessive current caused by short circuits of one load, and Fig. 4 shows the conventional current limiting circuit. Limiting circuit diagrams - FIGS. 5(a), 5(b), 5(c), and 5(d) are explanatory diagrams for explaining the operation of a conventional current limiting circuit. (1) is the power switch, (2) is the rectifier circuit, (3) is the limiting resistor, and (4) is the capacitor representing the load side capacitance (
5) is the load, (6) is the delay circuit, (7) is the generation circuit, (8) is the thyristor, αG is the superconducting wire, ul) is the permanent magnet, u is the electromagnet, u3 is the source for the coil, (141
is coil-1-■ is coil-2゜
Claims (1)
磁石の磁力を打ちけすように働く電磁石と、上記超電導
線と並列に抵抗を接続した電流制限回路。A current limiting circuit consisting of a superconducting wire, a permanent magnet placed near the superconducting wire, an electromagnet that works to overcome the magnetic force of the permanent magnet, and a resistor connected in parallel with the superconducting wire.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62276088A JPH01117650A (en) | 1987-10-30 | 1987-10-30 | Current limiting circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP62276088A JPH01117650A (en) | 1987-10-30 | 1987-10-30 | Current limiting circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPH01117650A true JPH01117650A (en) | 1989-05-10 |
Family
ID=17564633
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP62276088A Pending JPH01117650A (en) | 1987-10-30 | 1987-10-30 | Current limiting circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPH01117650A (en) |
Cited By (1)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6243118B1 (en) | 1996-12-05 | 2001-06-05 | Nippon Steel Corporation | Electrostatic recording apparatus for supplying vaporized solvent and liquid toner to an electrostatic latent image |
-
1987
- 1987-10-30 JP JP62276088A patent/JPH01117650A/en active Pending
Cited By (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
US6243118B1 (en) | 1996-12-05 | 2001-06-05 | Nippon Steel Corporation | Electrostatic recording apparatus for supplying vaporized solvent and liquid toner to an electrostatic latent image |
US6509918B1 (en) | 1996-12-05 | 2003-01-21 | Nippon Steel Corporation | Electrostatic recording apparatus and image density control method thereof |
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