JPH01114273A - Motor servo circuit of recording and reproducing device - Google Patents

Abstract

PURPOSE:To eliminate the disturbance of a phase reference signal and to stabilize the revolution of a motor by using an external synchronizing signal in the same way as a recording time before and after as a servo phase reference signal at the time of review and reproduction. CONSTITUTION:At the time of normal reproduction, a video floppy 1 is phase- controlled with an internal synchronizing signal (g) as reference. When a first switching signal (a) is 'high', namely, at the review and recording time, the video floppy 1 is phase-controlled with the external synchronizing signal (e) as reference. Furthermore, an AND circuit 13 outputs the external synchronizing signal (e) only when the first switching signal (a) is 'high'. With resetting SSG11 by the output signal of the AND circuit 13, namely, a reset signal (f), the phase of the external synchronizing signal (e) and the internal synchronizing signal (g) coincide at the reviewing and recording time. Since the external synchronizing signal (e) is always set to the phase reference signal (h) at the reviewing and recording time, the disturbance of the phase reference signal (h) is eliminated at the switching time of review/reproduction and recording modes, and stable rotation can be obtained.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a motor servo circuit for a recording/reproducing device, and particularly to a motor servo circuit suitable for suppressing phase fluctuations in a video floppy disk recording/reproducing device.

[Conventional technology]

The problem with the motor servo circuit of a video floppy recording/reproducing machine is discussed, for example, on page 21 of the September 1985 issue of the Journal of the Television Society. As shown in FIG. 11 of this paper, the motor servo circuit consists of a motor drive circuit, a speed control circuit, and a phase control circuit. The speed control circuit detects the difference between the rotational speed of the motor and the target rotational speed and feeds it back to the motor drive circuit, thereby making the rotational speed of the motor match the target rotational speed. The phase control circuit uses an output signal (hereinafter referred to as PG) of a pulse generator (hereinafter referred to as PG) that detects the rotational phase of the video floppy.
The rotational phase of the video floppy and the phase reference signal are synchronized by detecting the phase difference between the phase reference signal and the phase reference signal and feeding it back to the motor drive circuit.

When recording on a video floppy, it is necessary to maintain a predetermined phase relationship between the rotational phase of the video floppy and the phase of the recording signal. Therefore, during recording and recording standby (
In the recording mode (hereinafter both referred to as recording mode), a synchronization signal obtained by synchronously separating the recording signal (hereinafter referred to as external synchronization signal) is used as a phase reference signal. On the other hand, when playing back from a video floppy (hereinafter referred to as playback mode), it may not be possible to obtain an external synchronization signal, but even in this case it is necessary to apply phase control to stabilize the rotation of the motor. be. Therefore, in the reproduction mode, the output synchronization signal (hereinafter referred to as internal synchronization signal) of the synchronization signal generation circuit (hereinafter referred to as SSG) is used as the phase reference signal.

In order to realize the above operation, a switch is provided, and a switching operation is performed to select an external synchronization signal in recording mode and an internal synchronization signal in playback mode as a phase reference signal.

[Problem that the invention seeks to solve]

The above-mentioned conventional technology does not take into account the following problems that occur when the recording mode and reproduction mode are frequently switched. That is, in the prior art, when switching between the recording mode and the reproduction mode, the phase reference signal is switched from an external synchronization signal to an internal synchronization signal, or vice versa. At this time, since the phases of the external synchronization signal and the internal synchronization signal are not necessarily aligned, the synchronization of the phase reference signal is disturbed. When phase control is applied to the motor using this phase reference signal, the motor follows this disturbance and causes speed fluctuations, resulting in problems such as distorted reproduced images and longer recording standby times during recording. Ta.

In particular, in the so-called review playback function, in which the recorded signal is automatically played back for a predetermined period of time after recording is finished, and then returned to recording mode, the phase reference signal generated before and after the review playback is Disturbances in synchronization caused the above-mentioned problems, reducing the usefulness of review playback.

Also, when an abnormal situation occurs during playback, such as the absence of an external synchronization signal or the frequency range of the external synchronization signal deviates from the specified range, or when the channel (signal source) of the input video signal is switched. Synchronization disturbances also occur.

Therefore, an object of the present invention is to provide a motor servo circuit for a recording/reproducing device that can eliminate the problems of the prior art described above, suppress disturbances in the phase reference signal, and perform stable motor rotation control. be.

[Means for solving problems]

In order to achieve the above object, in the motor servo circuit of the recording and reproducing apparatus of the first invention of the present application, an external synchronizing signal, that is, input The synchronization signal (first synchronization signal) separated from the video signal is selected, and during normal (other than review) playback, the internal synchronization signal, that is, the synchronization signal (second synchronization signal) obtained by the generation circuit of the recording/playback device is selected. ).

In the motor servo circuit of the recording and reproducing device of the second invention of the present application, an abnormality detection circuit is provided to detect an abnormality such as the absence of an external synchronization signal or the failure of the external synchronization signal to fall within a predetermined frequency range. When an abnormality is detected, the internal synchronization signal is selected for the period until the next transition to the recording mode, and the external synchronization signal is selected for the other period, and this signal is used as the phase reference signal of the recording medium rotation drive motor control means. Configure it to be used as a.

In the motor servo circuit of the recording/reproducing device of the third invention of the present application, a phase-locked oscillation circuit that oscillates in phase-locked (PLL) L/L with an external synchronization signal is provided, and this phase-locked oscillation circuit is always used during recording and playback. The output synchronization signal (second synchronization signal) is used as a phase reference signal for the recording medium rotation drive motor control means.

In this case, the response time constant of the phase-locked oscillator circuit is set to a sufficiently known value during recording, and the response time constant of the phase-locked oscillator circuit is set to a sufficiently long value during playback, especially during normal playback. Configure.

[Effect]

According to the first invention of the present application, since the external synchronization signal (first synchronization signal) is used as the phase reference signal throughout the review playback and the recording before and after the review playback, disturbances occur in the phase reference signal. The motor can be rotated stably without any problems.

According to the second invention of the present application, as long as the external synchronizing signal is normally generated, the external synchronizing signal is always used as the phase reference signal, regardless of whether the mode is recording mode or reproducing mode. Therefore, there is no disturbance in the phase reference signal, and the motor can be rotated stably. In addition, if an abnormality occurs in the external synchronous signal, such as when the external synchronous signal cannot be obtained, the abnormality detection circuit detects this abnormality and selects the internal synchronous signal as the phase reference signal. No problem arises.

According to the third invention of the present application, the phase synchronization (PLL) output synchronization signal has a phase that matches the external synchronization signal when the external synchronization signal is normal, and a free-running frequency when the external synchronization signal is not obtained. Become. Regardless of the recording mode or the reproduction mode, since the PLL output synchronization signal is used as the phase reference signal, the phase reference signal is not disturbed and the motor can be rotated stably. Furthermore, if the response time constant of the PLL oscillator is made small in the recording mode and made large in the playback mode, the servo will quickly follow even when the input video signal source to be recorded is switched. Stable motor rotation control is performed during playback.

〔Example〕

An embodiment of the present invention will be described below with reference to FIG. 1st
The figure is a circuit diagram of an embodiment that has the effect of suppressing disturbances in the phase reference signal before and after review playback.

In FIG. 1, numeral 1 indicates a video floppy as a recording medium. A motor 2 rotates the video floppy 1. 3 is a frequency generator (
(hereinafter referred to as FG), 4 is a speed control circuit, and 5 is a drive circuit. The motor 2 is rotated at a constant speed by the speed control loop formed by these 2 to 5. Next, 6 is a PG that detects the rotational phase of the video floppy 1, 7 is a phase control circuit that detects the phase difference with the PG double signal phase reference signal (b), and 8 is an adder. The phase control loop formed by these 6 to 8 controls the rotational phase of the video floppy 1 and the phase reference signal (
h) to a predetermined phase.

Next, 9 is a video input terminal for inputting a video input signal;
separates the synchronization signal from the video input signal and outputs the external synchronization signal (
11 is a synchronization separation circuit that outputs an internal synchronization signal (g
), the SSG 12 selects either the external synchronization signal (e) or the internal synchronization signal (gl) to generate the phase reference signal (
Switch for supplying phase control port @g7 as hl, 13
is an AND circuit.

14 is a recording circuit, 15 is a switch, and 16 is a magnetic head, and the video input signal is recorded on the video floppy 1 through these 14 to 16. 17 is a reproducing circuit, 18 is a switch, and 19 is a video output terminal. When reproducing a video signal from the video floppy 1, it passes through a magnetic head 16, a switch 15, a reproducing circuit 17, and a switch 18.
A reproduced video signal is output to the video output terminal 19.

20 is a first switching terminal, 21 is a recording command terminal, 22 is a timer, and pus is an AND circuit. The first switching terminal 20 is connected to 60" terminals for playback modes other than review playback (hereinafter referred to as normal playback) and 60" for review playback and recording modes (hereinafter referred to as review and recording mode). The first switching signal (al
Enter. A recording command signal (b) is input to the recording command terminal 21, which becomes 6 high only when a recording current is applied to the magnetic head 16.
When the signal is "high", the recording circuit 14 outputs a recording current.The timer 22 detects the falling instant when the recording command signal (b) changes from "high" to "low", that is, the instant when recording ends; From this moment on, the review signal (c) is outputted such that it becomes "60" for a period of time T and becomes "high" during other periods. This review signal (c) is 60
” is the time of review playback.

The review playback time T may be a value that is fixed in advance, or may be a value that is selected by the user at that time.

The AND circuit 23 generates a mode switching signal (d) which is the AND of the first switching signal (a) and the review signal (c).
) is output. When this mode switching signal (d) is "1 high", it is the recording mode, and when it is "low", it is the reproduction mode. In the recording mode, the switches 15 and 18 are in contact with the H side, and the magnetic head 16 is connected to the recording circuit 14. The video input and 11° input signals input from the video input terminal 9 are output as they are to the video output terminal 19.

In the playback mode, switches 15 and 18 are in contact with the L side,
The magnetic head 16 is connected to a reproducing circuit 17, and a reproduced video signal reproduced from the video floppy 1 is outputted to a video output terminal 19.

Also, as a result of the switch 12 being controlled by the first switching signal (a), when the first switching signal (a) is 60'', that is, during normal playback, the phase of the video floppy 1 is determined based on the internal synchronizing signal (g). The control is performed and the first switching signal (
, ) are "high", that is, during review and recording, the phase of the video floppy 1 is controlled based on the external synchronization signal (e). Further, the AND circuit 13 outputs the external synchronization signal (e) only when the first switching signal (,) is "high".
) is output. By resetting the 5SGII with the output signal of the AND circuit 13, that is, the reset signal (f), the phases of the external synchronization signal (e) and the internal synchronization signal (g) match during review and recording.

A timing chart showing the relationship between the above signals (a) to (h) is shown in FIG.

, 12 degrees and below, the operation will be explained according to the timing chart of FIG. In FIG. 2, before time t, normal playback is in progress, and the first switching signal (al) and mode switching signal (d) are both low. At this time, the switch 12 is connected to the phase reference signal (h). An internal synchronization signal (g) is supplied as
A reproduced video signal reproduced from the video floppy 1 is output to a video output terminal 19.

At time t1, normal playback shifts to recording standby, and the first switching signal (a) and mode switching signal (d) both become "high." After this, the switch 12 switches to the phase reference signal (h
), the video input signal is directly output to the video output terminal 19, and the magnetic head 16 is connected to the recording circuit 14. Further, after t1, 5S011 is reset by the external synchronization signal (e).

From time t to t, the recording command signal (b) is "high"
Therefore, the recording circuit 14 supplies a recording current to the magnetic head 16.

At time ts1, that is, at the end of recording, the review signal (c) is -
The state changes from "high" to "low" and returns to "high" again at time t4, which is the time T that has elapsed since t8. Time t.

Review playback is performed during the period from to t.

At time t4, the mode shifts to recording mode again. After that, time t,
During the period from t to t, recording and review playback are performed in the same manner as at times t to t4.

At time t, the first switching signal (a) changes from ``6 high'' to ``low.'' After this, normal playback begins, and the same operation as before time t1 is performed.

During the above series of operations, the external synchronization signal (e) is always used as the phase reference signal (hl) during review and recording, so no disturbance of the phase reference signal (h) occurs when switching between review playback and recording mode. Therefore, it is possible to suppress disturbances in the rotational phase of the video floppy 1 due to disturbances in the phase reference signal (h) before and after review playback, which has been a problem in the past, and to realize stable rotation.

The embodiment shown in FIG. 1 above has the effect of suppressing disturbances in the phase reference signal (b) before and after review playback, but the embodiment shown in FIG. This also has the effect of suppressing disturbances in the phase reference signal (h) at the time of switching.

The difference between FIG. 3 and FIG. 1 is that the external synchronization signal (e
) is provided as a reference input, and includes a PLL oscillation unit 26 consisting of a phase detection circuit U and a voltage controlled oscillation circuit (hereinafter referred to as VCO) 25, and the output of the VCO 25 is directly used as the phase reference signal (h). be. As a result, when the external synchronization signal (e) is obtained, the VCo 25 generates a phase reference signal (h) with the same phase as the external synchronization signal (e), and when the external synchronization signal (e) is not obtained. , the VCO 25 generates a free-running frequency phase reference signal (b). V CO2
5 can also supply a signal (i) such as a color subcarrier for an encoder or a clock pulse for driving a CCD to the reproducing circuit 7.

The effect of this embodiment is that regardless of the mode, V CO
Since the output signal of 25 is used as the phase reference signal (h), there is no disturbance in the phase reference signal (h) during any mode switching, and stable rotation of the video floppy 1 can be realized.

Now, in the embodiment shown in FIG. 3, let us consider a case where a television broadcast signal is input to the video input terminal 9 and the channel of the blur is changed. When switching channels,
Synchronization disturbance occurs in the external synchronization signal (e). When this channel switching occurs in the recording mode, the rotational phase of the video floppy 1 must quickly follow the synchronization signal of the new channel, so it is better to keep the time constant of the response of the PLL shooting section 26 small. On the other hand, when this channel switching occurs in the playback mode, it is necessary to suppress speed fluctuations of the video floppy 1 so as not to disturb the playback image, and it is better to set a large response time constant of the PLL oscillator 26. In other words, in playback mode and recording mode, PL
It is preferable to change the time constant of the response of the L oscillation section 26. This time constant switching is performed by a mode switching signal (d) input to the PLL oscillation section 26.

FIG. 4 shows that when the mode switching signal (d) is "1" (recording mode), the time constant of the response of the PLL oscillator 26 is decreased, and when it is "low" (playback mode), this time constant is The figure shows a waveform diagram when increasing .Vp is the phase difference between the rotational phase of video floppy 1 and the external synchronization signal (e), and Vv is the amount of speed fluctuation of video floppy 1.AI and A! are the instants when channel switching occurs. When channel switching occurs in the recording mode, the speed fluctuation amount Vv is large and the rotational phase of the video floppy 1 quickly follows the external synchronizing signal (e). When channel switching occurs in playback mode, the response is slow, but
The speed fluctuation amount Vv is small, and a stable reproduced image can be obtained.

Note that here, the mode switching signal (dl) is used to switch the PLL oscillator 2.
Although the method of switching the time constant of the response of No. 6 has been described above, it is also possible to perform similar switching using the first switching signal (a).

FIG. 5 will be described as an example of an advanced method of switching the time constant of the response of the PLL oscillator 26 according to the mode described above. Each block in FIG. 5 is the same as in FIG. 1 or 3, and therefore will not be described again. In the embodiment of FIG. 5, in the recording mode, the phase reference signal (h) is obtained directly from the external synchronization signal (el), so the PLL in FIG.
It has the same effect as setting the response time constant of the oscillator 26 to O, and changes the rotational phase of the video floppy 1 to an external synchronizing signal (
e) can be quickly followed. In the playback mode, the phase reference signal (h) is obtained from the external synchronization signal (e) through the PI and L oscillation section 26, so disturbances in the external synchronization signal (e) due to channel switching etc.
26 absorbs the energy, allowing the video floppy 1 to rotate stably. Further, since the external synchronization signal (e) and the internal synchronization signal (gl) are normally in phase with each other, the phase reference signal (b) is not disturbed even when the mode is switched.

In addition, in FIG. 5, the switch 12 is activated by the mode switching signal (d).
Although a method of switching the switch 12 is shown, the switch 12 can also be switched using the first switching signal (a).

FIG. 6 shows a method for suppressing disturbances in synchronization of the phase reference signal (hl) at the time of arbitrary mode switching without using the PLL oscillator 26. is provided with an abnormality detection circuit 27 that detects an abnormality in the external synchronization signal (e) and outputs an abnormality detection signal 0), and outputs an abnormality detection signal (j) instead of the first switching signal (a) as a control input for the switch 12. ) is used.

This abnormality detection circuit 27 is always "4 high" in the recording mode.
In the playback mode, an abnormality such as the external synchronization signal (e) is not present or does not fall within a predetermined frequency range is detected, and the period from the moment this abnormality is detected until the moment the switch to the recording mode is 60" is output, and in other periods, "high" is output.

If the switch 12 is controlled by this abnormality detection signal (j),
When there is no abnormality in the playback mode and in the recording mode, the external synchronization signal (e) becomes the phase reference signal (h) as it is,
If there is an abnormality in the external synchronization signal (e) in playback mode, the external synchronization signal (e) will be
g) becomes the phase reference signal (hl).

A timing chart showing the above situation is shown in FIG. In FIG. 7, the external synchronization signal (e) is no longer obtained at time Bl in the reproduction mode, and the abnormality detection signal (j) shifts from 0 high to 60. At this time, the phase reference signal (
h) shifts from the external synchronization signal (e) to the internal synchronization signal (g). After that, the external synchronization signal (e) is generated again at the timer in the playback mode, but the abnormality detection signal 0) continues to remain at 60". After that, time B.

At this time, the mode is switched to recording mode, the abnormality detection signal (j) changes to "size high", and the phase reference signal (h) changes to the internal synchronization signal (
Moving from g) to external synchronization signal (e).

FIG. 8 shows an example of the internal circuit of the abnormality detection circuit 27. In FIG. 8, 101 is an external synchronization signal (
e) A rising edge detection circuit for detecting the rising edge of the signal, 102 is a delay circuit, 103 and 104 are timers, 105 is an inverter, 106 is a flip-flop, 107 is a NOR circuit,
108 is a flip-flop.

FIG. 9 is a timing chart showing the operation of a portion of the abnormality detection circuit 27, that is, a portion from the rise detection circuit 101 to the inverter 105. In order to detect an abnormality in the frequency of the external synchronization signal (e), an abnormality is detected when the period of the external synchronization signal (e) becomes T or less or 17 or more. The rising edge detection circuit 101 receives an external synchronization signal (
e) and outputs an edge signal (k). The delay circuit 102 transmits the edge signal to T. and outputs a delayed signal (t). Timers 103 and 104 are retriggerable mono-multivibrators that output "high" for time (TITO) and ('rz-'ro), respectively. Let the respective output signals be -) and (n), respectively. Inverter 105 outputs a signal (o) that is an inversion of signal (n). With the above operation, the signal (c) rises after T0 and falls after T1 from the leading edge of the external synchronization signal (e). Further, the signal (ol) falls after T2 from the leading edge of the external synchronization signal (e) and rises after T2.

Using these signals 6TI) and (o), an abnormality in the period of the external synchronization signal (e) is detected. The flip-flop 106 is a D flip-flop with a set input,
The signal (o) is used as a set input, the signal -) is used as a D input, and the edge signal (k) is used as a clock input. If the period of the external synchronization signal (e) is T, or less (!:), D input (c) at clock time.
is 4 high, so the output (p) is 60.

When the cycle is greater than or equal to T8, D input h at clock time
) becomes "low", so the output (pi) becomes "high". When the period is 12 or more, the set input becomes "high", so the output (p) becomes "low". Timing charts showing the operation are shown in Figures 10 to 12. Figure 10 shows when the period of the external synchronizing signal (el) is T8 or more and less than (normal), and the distortion output (p) is competitive high”
becomes. 11 and 12, the period is T1, respectively.
Below and above T1 (both are abnormal), the q output (p) is 60.

FIG. 13 is a timing chart showing the relationship between the distortion output (p) and the abnormality detection signal (j) in each mode. When the mode switching signal (d) is "6 high" (recording mode), the output (q) of the NOR circuit N 107 is "low", and the reset input of the flip-flop 108, that is, the mode switching signal (di is "high"). Therefore, the distortion output of the flip-flop 108, that is, the abnormality detection signal (j) is always "high" (normal). ) becomes 10" (abnormal), the set input of the flip-flop 108 (that is, the NOR circuit 107 (7) output (q)) becomes 6 high, so the abnormality detection signal (j) becomes "low". (
abnormal). This abnormality detection signal (j) returns to "high" (normal) again the moment the recording mode is entered.

The method for detecting an abnormality in the period of the external synchronization signal (e) has been described above, but when this (el) does not exist, the signal (o
) is always 6 high, so an abnormality can be detected in the same way.

As described above, according to the embodiments shown in FIGS. 6 and 8, when no abnormality is detected, the external synchronization signal (e) is used as the phase reference signal (h) regardless of the mode, so the mode can be switched. There is no disturbance in the phase reference signal (hl) and the video floppy 1 rotates stably.

〔Effect of the invention〕

As described in detail above, according to the present invention, it is possible to suppress the phase fluctuation of the phase reference signal by using an external synchronization signal as the servo phase reference single signal during review playback as well as during previous and subsequent recording. By using the internal synchronization signal when an abnormality occurs in the external synchronization signal, and using the external synchronization signal regardless of the mode in other cases, the motor can be rotated stably without any disturbance in the phase reference signal. Alternatively, by always using the output of the excavator that oscillates in phase synchronization with the external synchronization signal as a phase reference signal in any mode, if the external synchronization signal is normal, the phase matches this, and there is no external synchronization signal. Since the oscillation output of the free-running frequency is used, a phase reference signal with no disturbance throughout can be obtained. Therefore, in any case, it is possible to realize stable rotation of the recording medium, and as a result, it is possible to eliminate image disturbances, and the recording time can be significantly shortened, which has excellent effects. It is.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a first embodiment of the present invention, FIG. 2 is a timing chart of FIG. 1, FIG. 3 is a block diagram of a second sister example of the present invention, and FIG. A waveform diagram showing variations in rotational phase and rotational speed of a video floppy in
5 is a block diagram of a third embodiment of the present invention, FIG. 6 is a block diagram of a fourth embodiment of the present invention, FIG. 7 is a timing chart of FIG. 6, and FIG. 8 is a block diagram of a fourth embodiment of the present invention. FIGS. 9 to 13 are block diagrams of examples of internal circuits of the abnormality detection circuit inside, and are timing charts of FIG. 8. 1... Video floppy 2... Floppy drive motor 3... Frequency generator 4... Speed control circuit 5...
... Motor drive circuit 6 ... Floppy rotation phase detector 7 ... Phase control circuit 8 ... Adder 9 ... Video input terminal 10 ... Synchronization separation circuit 11 ... Synchronization signal generator 12 Switch 13... AND circuit 24... Phase detection circuit 25... Voltage controlled oscillator (VCO) 26... PLL oscillation section 27.
・Anomaly Detection Circuit Agent Patent Attorney Masaru Ogawa CL β De 〉 〉 /-S Do) Do-\ Do-\ ″
f-＼ -′) O-engineering ヱ mo sleep O-engineering

Claims (1)

[Claims] 1. Recording and reproducing means for recording and reproducing input video signals on a recording medium, and a motor for rotationally driving the recording medium using a phase reference signal during recording and reproduction. In a motor servo circuit of a recording and reproducing apparatus having a motor control means, the reproducing means includes a normal reproducing means and a review reproducing means for performing reproduction for a predetermined time immediately after recording ends, and the reproducing means separates a first synchronization signal from the input video signal. a synchronization separation circuit that internally generates a second synchronization signal, a synchronization signal generation circuit that internally generates a second synchronization signal, and uses the first synchronization signal as the phase reference signal during recording and review playback, and the second synchronization signal during normal playback. 1. A motor servo circuit for a recording/reproducing device, comprising: switching means for switching to use the motor servo circuit. 2. The motor servo circuit for a recording and reproducing apparatus according to claim 1, wherein the synchronization signal generation circuit is constituted by a phase synchronization type oscillator that uses the first synchronization signal as a reference input. 3. Recording and reproducing means for recording and reproducing input video signals on a recording medium, and motor control means for controlling a motor that rotationally drives the recording medium using a phase reference signal during recording and reproduction. In a motor servo circuit of a recording/reproducing device, a synchronization separation circuit separates a first synchronization signal from the input video signal, a synchronization signal generation circuit internally generates a second synchronization signal, and a synchronization signal generation circuit that generates the first synchronization signal. an abnormality detection circuit that detects an abnormality when the first synchronization signal cannot be separated or is out of a predetermined frequency range; and an abnormality detection circuit that detects an abnormality when the first synchronization signal cannot be separated or when the first synchronization signal is out of a predetermined frequency range; and switching means for switching to use the second synchronization signal as the phase reference signal and use the first synchronization signal as the phase reference signal outside the period. 4. Recording and reproducing means for recording and reproducing input video signals on a recording medium, and motor control means for controlling a motor that rotationally drives the recording medium using a phase reference signal during recording and reproduction. In a motor servo circuit of a recording/reproducing device, a synchronization separation circuit separates a first synchronization signal from the input video signal, and a phase synchronization type circuit generates an internal second synchronization signal using the first synchronization signal as a reference input. an oscillation circuit, means for always supplying the second synchronization signal as the phase reference signal to the motor control means, and a response time constant of the phase synchronization type oscillation circuit that is relatively large during recording and relatively large during reproduction. 1. A motor servo circuit for a recording/reproducing device, comprising: time constant switching means for switching.