JPH01104030U - - Google Patents
Info
- Publication number
- JPH01104030U JPH01104030U JP1987197979U JP19797987U JPH01104030U JP H01104030 U JPH01104030 U JP H01104030U JP 1987197979 U JP1987197979 U JP 1987197979U JP 19797987 U JP19797987 U JP 19797987U JP H01104030 U JPH01104030 U JP H01104030U
- Authority
- JP
- Japan
- Prior art keywords
- hole
- conductive pattern
- base material
- semiconductor device
- semiconductor
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims description 7
- 239000000463 material Substances 0.000 claims description 3
- 239000008188 pellet Substances 0.000 claims description 3
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/50—Tape automated bonding [TAB] connectors, i.e. film carriers; Manufacturing methods related thereto
Landscapes
- Lead Frames For Integrated Circuits (AREA)
- Wire Bonding (AREA)
Description
第１図は本考案の実施例を示す断面図、第２図
は従来のＴＡＢ方式半導体装置の平面図、第３図
は従来のＴＡＢ方式の半導体装置の断面図である
。
１……基材、２……レジスト層、３……導電パ
ターン、５……透孔、６……搬送用透孔、９……
半導体ペレツト、１０……電極。
FIG. 1 is a sectional view showing an embodiment of the present invention, FIG. 2 is a plan view of a conventional TAB type semiconductor device, and FIG. 3 is a sectional view of a conventional TAB type semiconductor device. DESCRIPTION OF SYMBOLS 1... Base material, 2... Resist layer, 3... Conductive pattern, 5... Through hole, 6... Through hole for conveyance, 9...
Semiconductor pellet, 10...electrode.
Claims (1)
突出させて積層したフイルム状の基材の前記透孔
内に半導体ペレツトを配置し、半導体ペレツト上
の電極と導電パターンとを電気的に接続した半導
体装置において、上記透孔を除く基材上の導電パ
ターンにレジスト層を被覆形成したことを特徴と
する半導体装置。 A semiconductor pellet is placed in the through hole of a laminated film-like base material having a through hole with a part of the conductive pattern protruding into the through hole, and the electrode on the semiconductor pellet and the conductive pattern are electrically connected. 1. A semiconductor device connected to a semiconductor device, characterized in that a resist layer is formed to cover the conductive pattern on the base material except for the through hole.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987197979U JPH01104030U (en) | 1987-12-26 | 1987-12-26 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987197979U JPH01104030U (en) | 1987-12-26 | 1987-12-26 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPH01104030U true JPH01104030U (en) | 1989-07-13 |
Family
ID=31488507
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987197979U Pending JPH01104030U (en) | 1987-12-26 | 1987-12-26 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH01104030U (en) |
-
1987
- 1987-12-26 JP JP1987197979U patent/JPH01104030U/ja active Pending