JP7439867B2 - Wiring board and wiring board manufacturing method - Google Patents

Description

The present disclosure relates to a wiring board and a method for manufacturing a wiring board.

2. Description of the Related Art Techniques for manufacturing wiring boards including through electrodes using MEMS (Micro Electro Mechanical Systems) technology have been proposed in the past. Patent Document 1 discloses a through electrode substrate in which a stress buffer portion containing resin is provided inside the through electrode.

Japanese Patent Application Publication No. 2012-142414

In the technique described in Patent Document 1, the stress buffer section is a member for suppressing the occurrence of malfunctions due to stress. The stress buffer portion is a portion different from a portion intended to contribute to the transmission of electrical signals.

In contrast, one of the objectives of the embodiments of the present disclosure is to provide a wiring board in which a space region exists in a part of a through hole, or a method for manufacturing the same.

A wiring board that is one of the embodiments of the present disclosure includes a board including a through hole, a metal structure provided in the through hole, a first region in contact with a side surface of the through hole, and at least a metal structure provided in the through hole. a second region located on the opening surface of the hole and having a larger crystal grain size of the metal material than the first region, and a metal structure provided so that a hollow region exists in the through hole; has.

In the wiring board that is one of the embodiments of the present disclosure, the hollow region is surrounded by the second region.

In the wiring board that is one of the embodiments of the present disclosure, the second region closes the opening surface of the through hole.

In the wiring board that is one of the embodiments of the present disclosure, the hollow region includes a portion that is thicker than the metal structure in a direction intersecting an axial direction of the through hole.

In the wiring board that is one of the embodiments of the present disclosure, the hollow region includes a portion that is thicker than the metal structure in the axial direction of the through hole.

A method for manufacturing a wiring board, which is one of the embodiments of the present disclosure, includes forming a first metal layer at a first current density on the side surface of a through hole included in the board by electrolytic plating, and forming a first metal layer at a first current density. After forming, a second metal layer different from the first metal layer is formed by electrolytic plating at a second current density higher than the first current density.

In the method for manufacturing a wiring board that is one of the embodiments of the present disclosure, the second metal layer closes the opening surface of the through hole.

In the method for manufacturing a wiring board that is one of the embodiments of the present disclosure, before the first metal layer becomes thicker than the spatial region inside the through hole in a direction intersecting the axial direction of the through hole, The first current density is changed to the second current density.

FIG. 1 is a partial side sectional view showing the configuration of a wiring board according to a first embodiment of the present disclosure. FIG. 1 is a side sectional view showing the configuration of a metal structure according to a first embodiment of the present disclosure. 7 is a flowchart showing the steps of a method for manufacturing a wiring board according to a second embodiment of the present disclosure. FIG. 7 is a partial side sectional view illustrating a method for manufacturing a wiring board according to a second embodiment of the present disclosure. FIG. 7 is a partial side sectional view illustrating a method for manufacturing a wiring board according to a second embodiment of the present disclosure. FIG. 7 is a partial side sectional view illustrating a method for manufacturing a wiring board according to a second embodiment of the present disclosure. FIG. 7 is a partial side sectional view illustrating a method for manufacturing a wiring board according to a second embodiment of the present disclosure. It is a graph illustrating the relationship between current density and film thickness of a metal layer in an electrolytic plating method. FIG. 2 is a partial side cross-sectional view showing the configuration of a wiring board according to the prior art. FIG. 2 is a partial side cross-sectional view showing the configuration of a wiring board according to the prior art. FIG. 2 is a partial side cross-sectional view showing the configuration of a wiring board according to the prior art. FIG. 2 is a partial side cross-sectional view showing the configuration of a wiring board according to the prior art.

Hereinafter, each embodiment of the present disclosure will be described with reference to the drawings. However, the present disclosure can be implemented in various forms without departing from the gist thereof, and should not be construed as being limited to the contents described in the embodiments exemplified below.

In order to make the explanation more clear, the drawings may schematically represent the width, thickness, shape, etc. of each part compared to the actual aspect, but these are only examples and do not limit the interpretation of the present disclosure. It's not something you do. In the drawings referred to in this embodiment, identical parts or parts having similar functions are denoted by the same or similar symbols (numerals followed by the letters A, B, and C). , the repeated explanation may be omitted.

In this specification and the claims, when expressing an aspect in which a structure is placed on top of another structure, the expression "on top" means that unless otherwise specified, This includes both a case in which another structure is placed directly above (on the top surface) so as to be in contact with a certain structure, and a case in which another structure is placed above a certain structure via another structure.

In this specification and the claims, the expression that a certain structure overlaps with another structure means that these structures overlap at least in part when viewed in plan. In other words, it means that one of these structures is located above or below the other, and that at least a portion of these structures overlaps each other when viewed from the top or bottom. do.

[First embodiment]
FIG. 1 is a partial side sectional view showing the configuration of a wiring board 1 according to a first embodiment of the present disclosure. The wiring board 1 is a so-called through electrode board. The wiring board 1 may be a multilayer wiring board or a wiring board called an interposer. The wiring board 1 includes a substrate 10, a metal structure 20, and wiring 30.

Substrate 10 includes a first surface 102, a second surface 104, and a through hole 106. The wiring 30 is arranged on the first surface 102. The wiring 30 may constitute a part of an electronic component (for example, a transistor) arranged on the first surface 102, for example. The second surface 104 is a surface facing the first surface 102. The second surface 104 and the first surface 102 have a front and back relationship. Wiring may be arranged on the second surface 104. The through hole 106 is a hole that penetrates the first surface 102 and the second surface 104. Among the opening surfaces of the through hole 106 (substrate 10), the opening surface adjacent to the first surface 102 is referred to as the "opening surface 1064", and the opening surface adjacent to the second surface 104 is referred to as the "opening surface 1066". The through hole 106 has a cylindrical shape, for example, but may also have a rectangular parallelepiped shape, a triangular prism shape, or other shapes.

Hereinafter, each direction may be described by referring to one direction parallel to the first surface 102 or the second surface 104 as the "X direction" and the direction intersecting the X direction as the "Y direction." The X direction corresponds to the radial direction of the through hole 106. The Y direction corresponds to the axial direction of the through hole 106.

The thickness of the substrate 10 and the through hole 106 in the Y direction is, for example, 10 μm or more and 800 μm or less, but is not limited thereto. The diameter of the through hole 106 is, for example, 10 μm or more and 100 μm or less, but is not limited thereto. Although only one through hole 106 is shown in FIG. 1 for convenience of explanation, the substrate 10 may include two or more through holes 106.

The substrate 10 of this embodiment includes a silicon layer 108 and a silicon oxide layer 110 covering the silicon layer 108. The silicon oxide layer 110 is an insulating layer (insulating film) provided on the side surface (also referred to as an inner wall) 1062 of the through hole 106 and on the surface of the substrate 10. The thickness of the silicon oxide layer 110 is, for example, 0.1 or more and 2 μm or less, but is not limited thereto. Note that the substrate 10 is not limited to a substrate containing silicon. Substrate 10 may be a substrate containing glass, ceramic, insulating resin, or other materials.

The metal structure 20 is provided in the through hole 106 and electrically connects the first surface 102 and the second surface 104. The metal structure 20 is called a through electrode. The metal structure 20 may be electrically connected to the wiring 30. The metal structure 20 is formed using copper, for example, but may also be formed using one or more of platinum, gold, silver, nickel, rhodium, ruthenium, iridium, or other metals.

The metal structure 20 is provided such that a hollow region 22 exists in the through hole 106. That is, wiring board 1 includes hollow region 22 surrounded by metal structure 20 in through hole 106 . The hollow region 22 is a spatial region surrounded by a region of the metal structure 20 that is in contact with the side surface 1062 , a region that is in contact with the opening surface 1064 , and a region that is in contact with the opening surface 1066 . In FIG. 1, the cross-sectional shape of the hollow region 22 is schematically illustrated as a substantially rectangular shape with portions corresponding to apexes being slightly rounded. The hollow region 22 has, for example, a generally rectangular parallelepiped shape, but may have a spherical shape or other shapes.

The hollow region 22 is a spatial region with a different concept from a general void in a through electrode. A void is a region where air bubbles inside the metal layer remain, which are generated when the metal layer grows from the side surface of the through hole toward the central axis of the through hole and is integrated near the central axis.

FIG. 2 is a side sectional view showing the configuration of the metal structure 20. As shown in FIG. Metal structure 20 includes a first region 24 and a second region 26 . In FIG. 2, the first region 24 and the second region 26 are each shown to have a uniform thickness, but the thickness may be non-uniform.

The first region 24 is a region in contact with the side surface 1062. The first region 24 includes a region located on the side surface 1062 side when viewed from the position of the hollow region 22. The first region 24 corresponds to a cylindrical region of the metal structure 20 that is in contact with the side surface 1062.

The second region 26 is a region located at least on the opening surface 1064 and the opening surface 1066. The second region 26 includes regions located on the opening surface 1064 side and the opening surface 1066 side when viewed from the position of the hollow region 22. In this embodiment, the second region 26 is a region of the metal structure 20 that is different from the first region 24 .

In this embodiment, the hollow region 22 is a spatial region surrounded by the second region 26. Further, the second region 26 closes the opening surface 1064 and the opening surface 1066. However, the second region 26 does not necessarily need to seal the hollow region 22. For example, second region 26 may include a hole that communicates hollow region 22 to an external spatial region via at least one of opening surface 1064 and opening surface 1066.

Here, if the thickness (thickness) in the X direction of the region in contact with the side surface 1062 of the metal structure 20 is "DA", and the thickness of the hollow region 22 in the X direction is "DX", then DX> The relationship DA may be satisfied. In this embodiment, DA is the sum of the thickness of the first region 24 and the thickness of the second region 26. That is, the hollow region 22 may include a region thicker than the metal structure 20 in the X direction.

Further, in the second region 26, the thickness in the Y direction of the region on the opening surface 1064 side is defined as "DB", the thickness in the Y direction of the region on the opening surface 1066 side as "DC", and the thickness of the region on the opening surface 1064 side in the Y direction is "DC". When the thickness in the direction is "DY", at least one of the relationships DY>DB and DY>DC may be satisfied. That is, the hollow region 22 may include a region thicker than the metal structure 20 (in this embodiment, the second region 26) in the Y direction. DB and DC are, for example, several μm, but are not limited to this. Note that if the thickness in a predetermined direction of each of the first region 24 and the second region 26 is nonuniform, the thickness in that direction can be determined by an average value, a maximum value, a minimum value, or any other value. may be done.

The second region 26 is a region in which the crystal grain size of the metal material is larger than that in the first region 24 . The crystal grain size here is, for example, the average crystal grain size. The average crystal grain size of the metal material in the first region 24 is approximately 3 μm, and the average crystal grain size of the metal material in the second region 26 is approximately 5 μm. The average grain size is specified, for example, by ASTM D112-13 "Standard Test Methods for Determining Average Grain Size," but is not limited thereto. The crystal grain size of the metal material may not be specified by the average crystal grain size, but may be specified by, for example, the maximum crystal grain size or other crystal grain sizes.

The first region 24 may have higher mechanical strength than the second region 26 due to the difference in grain size of the metal materials. In other words, the second region 26 may have lower mechanical strength than the first region 24.

Due to the difference in crystal grain size of the metal materials, the second region 26 may have less electrical loss (current loss) than the first region 24. This can be expected to have the effect of reducing electrical loss in the entire metal structure 20, compared to the case where the crystal grain size of the metal material in the second region 26 is equal to or smaller than the crystal grain size in the first region 24. .

[Second embodiment]
A second embodiment of the present disclosure relates to a method for manufacturing a wiring board having the configuration described in the first embodiment.

FIG. 3 is a flowchart showing the steps of the method for manufacturing the wiring board 100. 4 to 7 are partial side cross-sectional views illustrating a method of manufacturing the wiring board 100.

In step S1, a through hole 106 is formed in the substrate 10, as shown in FIG. The through hole 106 is formed, for example, by placing a mask material on the first surface 102 and etching the substrate 10 from the first surface 102 side using the mask material as a mask. The etching is, for example, deep etching using a Bosch process or reactive ion etching.

In step S2, as shown in FIG. 5, an insulating layer is formed on the substrate 10 (step S2). Specifically, a silicon oxide layer 110 is formed on substrate 10 . The silicon oxide layer 110 is formed by, for example, a plasma CVD method, a thermal oxidation method, a thermal CVD method, a catalytic CVD method (Cat (Catalytic) CVD method, or a hot wire CVD method). Note that the process of step S2 may not be performed.

In step S3, a first metal layer 210 is formed in the through hole 106, as shown in FIG. The first metal layer 210 is formed by growing a metal layer from the side surface 1062 by electrolytic plating. In step S3, the first metal layer 210 is formed with a current having a first current density. The current may or may not be pulsed. Through the process in step S3, the first metal layer 210 grows toward the central axis of the through hole 106, as shown by arrow A in FIG. As shown in FIG. 6, the thickness of the first metal layer 210 (thickness in the Y direction) is approximately the same at each position in the Y direction. Therefore, the first metal layer 210 becomes a cylindrical metal layer corresponding to the shape of the through hole 106. As shown in FIG. 6, the thickness of the first metal layer 210 in the X direction is "da", and the thickness of the spatial region 1068 in the through hole 106 in the X direction is "dx". In the case shown in FIG. 6, dx>da.

In step S4, a second metal layer 220 is formed in the through hole 106, as shown in FIG. The second metal layer 220 is similar to the first metal layer 210 in that it is formed by growing a metal layer by electrolytic plating. On the other hand, the second metal layer 220 differs from the first metal layer 210 in that it is formed with a current having a second current density that is higher than the first current density. The current may or may not be pulsed. Through the process in step S4, the second metal layer 220 grows toward the central axis of the through hole 106, as shown by arrows B1 and B2 in FIG. For example, in steps S3 and S4, the first current density is changed to the second current density before the first metal layer 210 becomes thicker than the spatial region 1068 in the X direction, that is, within a period that satisfies the relationship dx>da. be done.

The process in step S4 is performed, for example, until the second metal layer 220 closes the opening surfaces 1064 and 1066. For example, the time to form the second metal layer 220 at the second current density is shorter than the time to form the first metal layer 210 at the first current density. When the process of step S4 is completed, the metal structure 200 including the first metal layer 210 and the second metal layer 220 inside the through hole 106 is completed. The metal structure 200 is formed such that a hollow region 230 exists in the through hole 106. In this embodiment, the hollow region 230 is a region surrounded by the second metal layer 220. Note that in reality, a part of the first metal layer 210 or the second metal layer 220 may protrude outside the through hole 106, but this illustration is omitted in FIGS. 6 and 7. After forming the second metal layer 220, the wiring board 1 is completed through polishing.

By the way, as shown in FIG. 7, the thickness of the second metal layer 220 in the X direction differs at each position in the Y direction. Specifically, in the second metal layer 220, in a region close to the opening surface 1064 and a region close to the opening surface 1066 (that is, near the surface of the substrate 10), a region between them (for example, in the Y direction The growth rate of the second metal layer 220 is higher than that of the second metal layer 220 (near the center of the through hole 106), and as a result, the thickness of the second metal layer 220 becomes larger. Furthermore, since the second metal layer 220 is formed with a higher current density than the first metal layer 210, the crystal grain size of the metal material is larger than that of the first metal layer 210.

Here, FIG. 8 is a graph illustrating the relationship between the current density and the thickness of the metal layer in electrolytic plating. In the graph of FIG. 8, the horizontal axis corresponds to the current density, and the vertical axis corresponds to the thickness of the metal layer. In a region where the current density is less than or equal to the threshold TH, the thickness of the metal layer near the surface and near the center increases linearly as the current density increases. Further, the difference in the thickness of the metal layer near the surface and near the center of the substrate 10 is small. Therefore, when the metal layer is formed at the first current density DK1 that is equal to or less than the threshold value TH, the difference in film thickness at each position on the side surface of the through hole is small.

On the other hand, in a region where the current density is greater than the threshold TH, the film thickness increases linearly with the increase in current density near the surface of the substrate 10. On the other hand, near the center, the increase in film thickness with respect to the increase in current density is small, and when the current density exceeds a predetermined value, the film thickness decreases. The reason why this phenomenon occurs is that in electrolytic plating, the metal material is concentrated near the opening surface of the through-hole where the electric field is relatively high, and the growth rate of the metal layer is slower than that near the center of the through-hole. This is because it becomes high. Therefore, when the metal layer is formed at the second current density DK2 that is higher than the threshold TH, the film thickness near the surface of the substrate becomes larger than the film thickness near the center. In the method for manufacturing the wiring board 100 according to the second embodiment of the present disclosure, the metal structure 200 is formed using the relationship between the current density and the thickness (growth rate) of the metal layer.

9 to 12 are partial side sectional views showing the configuration of a wiring board according to the prior art. As shown in FIG. 9, when the metal layer 40A is formed over the entire through hole 106 of the substrate 10, it may take a long time to form the metal layer 40A using electrolytic plating. On the other hand, in this embodiment, since the hollow region 230 in which no metal material exists exists inside the metal structure 200, the effect of shortening the time required to form the metal structure 200 can be expected.

As shown in FIG. 10, when the metal layer 40B in contact with the side surface of the through hole 106 is formed in a part of the through hole 106, a spatial region 1070 exists that allows the first surface 102 and the second surface 104 to communicate. The presence of the spatial region 1070 may make wafer processing difficult. For example, if the opening is not closed, the resist may wrap around the back surface or vacuum chuck may not be possible. In contrast, in this embodiment, the hollow region 230 does not communicate, or almost does not, communicate with an external spatial region. Therefore, the effect of facilitating wafer processing can be expected.

As shown in FIG. 11, when the resin layer 50 is formed in the spatial region 1070 inside the metal layer 40B, the resin layer 50 on the surface of the substrate 10 is removed when the resin layer 50 is no longer needed. For example, CMP (Chemical Mechanical Polishing) is used for this removal. During this removal, stress is applied to the substrate 10 and there is a possibility that the substrate 10 will be damaged. On the other hand, in this embodiment, since the step of removing the resin layer is not necessary, the effect of reducing the possibility of damage to the substrate 10 can be expected.

As shown in FIG. 12, when the photosensitive resin layer 60 is formed in the spatial region 1070 inside the metal layer 40B, the stress applied to the substrate 10 is reduced compared to when the resin layer 50 is formed. . However, a lithography process is required to form the resin layer 60. In this embodiment, the step of forming a photosensitive resin layer is not necessary.

It should be noted that even if there are other effects that are different from those brought about by each of the embodiments described above, those that are obvious from the description of this specification or that can be easily predicted by a person skilled in the art will naturally be included. It is understood that the present disclosure provides.

The wiring board of the present disclosure is used in a semiconductor device mounted on a notebook personal computer, a tablet terminal, a mobile phone, a smartphone, a digital video camera, a digital camera, or other electrical equipment. In addition to the electronic devices described above, the wiring board of the present disclosure can be widely used in semiconductor devices installed in LED lighting, digital signage, desktop personal computers, servers, car navigation systems, and other electronic devices.

1: Wiring board, 10: Substrate, 20: Metal structure, 22: Hollow region, 24: First region, 26: Second region, 30: Wiring, 40A: Metal layer, 40B: Metal layer, 50: Resin layer , 60: resin layer, 100: wiring board, 102: first surface, 104: second surface, 106: through hole, 108: silicon layer, 110: silicon oxide layer, 200: metal structure, 210: first metal layer, 220: second metal layer, 230: hollow region, 1062: side surface, 1064: opening surface, 1066: opening surface, 1068: spatial region, 1070: spatial region

Claims (5)

a substrate including a through hole;
A metal structure provided in the through hole, the metal structure including a first region in contact with a side surface of the through hole, and a second region located at least on an opening surface of the through hole, and a hollow region in the through hole. a metal structure provided so that there is a
has
The hollow region includes a portion thicker than the metal structure in a direction intersecting the axial direction of the through hole,
The second region is a wiring board that closes the opening surface of the through hole . The wiring board according to claim 1 , wherein the hollow region includes a portion thicker than the metal structure in the axial direction of the through hole. The wiring board according to claim 1 or 2, wherein the hollow region is surrounded by the second region. forming a first metal layer on the side surface of the through hole included in the substrate by electrolytic plating;
After forming the first metal layer, forming a second metal layer different from the first metal layer by electrolytic plating,
When forming the second metal layer, the growth rate near the center of the through hole is slower than the growth rate near the surface of the through hole, so that the second metal layer is formed inside the through hole. A method for manufacturing a wiring board that forms an enclosed hollow region. 5. The method of manufacturing a wiring board according to claim 4 , wherein the second metal layer closes an opening surface of the through hole.