JP7402009B2 - PWM control inverter - Google Patents

Description

The present disclosure relates to the control of pulse width modulation (PWM) controlled inverters.

Inverters are already used in a wide range of fields, but the scope of their use is expanding further, including in the field of EVs and other vehicles, other renewable energy fields, and distributed power supply systems. Against this background, when an inverter is used, there is a problem in that leakage current is generated through stray capacitance between the load to be driven (such as a motor) and the ground. Conventionally, due to the combination of an induction motor and a commercial power supply, the neutral point voltage of the motor was always equal to the ground voltage, but when using a PWM control inverter, the neutral point voltage constantly fluctuates, so it is Leakage current occurs. In particular, inverters generate leakage current that includes high-frequency components due to the carrier frequency, which can lead to quality problems such as earth leakage breaker malfunction and electric shock.Therefore, research into hardware and software countermeasures to counter leakage current is active. is being carried out.

In Patent Document 1, in three-phase modulation, at the time of zero voltage output when the amplitude of the modulated wave is zero, the three-phase output pulses are shifted respectively to prevent the on/off timings of the three-phase pulses from overlapping, and the motor This suppresses the increase in instantaneous leakage current from the However, looking at the neutral point potential fluctuation, it previously fluctuated from zero to the DC input voltage VDC, and the average leakage current remains large compared to two-phase modulation.

Patent Document 2 discloses that a three-phase voltage type inverter that obtains three-phase AC voltage from a DC power supply has two or more types of modulation methods, and a modulation method that reduces the maximum value of leakage current in a low speed range according to the rotation speed. Then, in the medium and high speed ranges, the system switches to a modulation method that ensures speed stability.

Patent No. 4873317 Patent No. 4492371

In this disclosure, we mainly consider countermeasures using PWM control. It also targets low modulation rates (near zero voltage output) where leakage current increases. Common countermeasures against leakage current include reducing the number of switching operations or suppressing rapid fluctuations in the motor neutral point potential. For this purpose, reduction of the carrier wave frequency and application of a two-phase modulation method are often performed. Furthermore, the pulse shift described in Patent Document 1 is also effective in suppressing rapid fluctuations in the neutral point potential Vc.

However, in either case, the effect of suppressing the maximum amount of change in neutral point potential (variation from reference potential GND) is not sufficient, and leakage current always occurs every time switching occurs, so the reduction effect is not sufficient. Ta. In addition, considering the application of switching pulse correction (corresponding to sections where current cannot be detected) in the one-shunt current detection method of DC mother ship current aimed at cost reduction, it is difficult to cope with it, and furthermore, it is difficult to suppress the increase in current ripple. The problem was that it was difficult.

The present invention simultaneously suppresses rapid fluctuations and maximum fluctuations (fluctuations from reference potential GND) in neutral point potential by combining pulse width control and pulse shift control.

According to one embodiment, the device includes three switching elements in the upper arm and three switching elements in the lower arm that are connected in a three-phase bridge, and converts input DC power into three-phase AC power and outputs the same. a main circuit; a voltage command signal generator that generates a three-phase voltage command signal; a carrier wave generator that generates a triangular or sawtooth carrier wave having a sufficiently higher frequency than the voltage command signal; a control circuit having a comparator that compares the magnitude with the carrier wave and generates a PWM (pulse width modulation) control signal for driving the main circuit; A PWM control inverter comprising zero-sequence voltage superimposition means for superimposing a zero-sequence voltage on the voltage command signal, and pulse shift means for shifting the PWM control signal within one cycle of the carrier wave so that the voltage command signal is shortened to a value equal to or less than the voltage command signal. The pulse shift means shifts at least two of the three phases of the PWM control signal so that three or two phases of the PWM control signal are not turned on simultaneously within one period of the carrier wave. A PWM control inverter is provided that shifts the PWM control signal so that rising edges and falling edges are close to each other.

According to one embodiment, the device includes three switching elements in the upper arm and three switching elements in the lower arm that are connected in a three-phase bridge, and converts input DC power into three-phase AC power and outputs the same. A main circuit, a voltage command signal generator that generates an underlined two-phase modulation signal that stops one of the three phases, and a carrier wave generator that generates a triangular or sawtooth carrier wave whose frequency is sufficiently higher than that of the voltage command signal. a control circuit having a comparator that compares the magnitude of the voltage command signal and the carrier wave and generates a PWM (pulse width modulation) control signal for driving the main circuit; A PWM control inverter comprising pulse shift means that shifts within one period of the carrier wave, the pulse shift means adjusting the voltage so that two phases that are not at rest within one period of the carrier wave are not turned on at the same time. The falling edge of the phase for which the magnitude of the command signal is the largest is close to the rising edge of the phase for which the magnitude of the voltage command signal is the smallest, or the rising edge of the phase for which the magnitude of the voltage command signal is the largest , a PWM control inverter is provided that shifts the PWM control signal so that the voltage command signal is close to a falling edge of a phase having a minimum magnitude.

According to one embodiment, the device includes three switching elements in the upper arm and three switching elements in the lower arm that are connected in a three-phase bridge, and converts input DC power into three-phase AC power and outputs the same. a main circuit, a voltage command signal generator that generates a three-phase voltage command signal, or a lower tension two-phase modulation signal or an upper tension two-phase modulation signal that stops one phase of the three phases; A carrier wave generator that generates a triangular or sawtooth carrier wave with a sufficiently high voltage, compares the voltage command signal with the carrier wave, and generates a PWM (pulse width modulation) control signal for driving the main circuit. a control circuit having a comparator for generating the PWM control signal; and a zero-phase voltage superimposition means for superimposing a zero-phase voltage on the voltage command signal so that the pulse width of each phase of the PWM control signal is shortened to a predetermined value or less. A PWM control inverter comprising: pulse shifting means for shifting the PWM control signal within one period of the carrier wave, (i) the PWM control of the phase in which the voltage command signal has the largest magnitude among the three phases; signal is on, the PWM control signal of the phase with the second largest magnitude and the smallest phase of the voltage command signal is off, and the period with which the magnitude of the voltage command signal is the largest among the three phases. At least one of the periods in which the PWM control signal of the phase and the second largest phase is on and the PWM control signal of the phase with the smallest magnitude of the voltage command signal is off is necessary for one shunt current detection. When the period is shorter than a predetermined minimum period, the pulse shift means shifts one of the three phases of the PWM control signal so that the three phases of the PWM control signal are not turned on simultaneously within one cycle of the carrier wave. (ii) the PWM control signal of the phase in which the magnitude of the voltage command signal is the largest among the three phases is shifted so that the rising edge and the falling edge of the two phases are close to each other; on, and the PWM control signal of the phase with the second largest magnitude of the voltage command signal and the phase with the smallest magnitude is OFF, and the phase and phase with the highest magnitude of the voltage command signal among the three phases. A period in which the PWM control signal of the second largest phase is on and the PWM control signal of the phase with the smallest magnitude of the voltage command signal is off is longer than a predetermined minimum period necessary for one shunt current detection. In this case, the pulse shift means shifts the voltage command signal to the falling edge of the phase having the maximum magnitude and the voltage command signal so that two phases that are not at rest within one period of the carrier wave are not turned on at the same time. The rising edge of the phase with the smallest magnitude of the voltage command signal is close to each other, or the rising edge of the phase with the largest magnitude of the voltage command signal is close to the falling edge of the phase with the smallest magnitude of the voltage command signal. A PWM control inverter is provided for shifting the PWM control signal to do so.

A PWM control inverter that can reduce leakage current and noise can be provided.

FIG. 2 is a block diagram of an electrical device. FIG. 3 is a diagram showing the structure of a controller. It is a graph showing a carrier wave, a U-phase gate signal, a V-phase gate signal, a W-phase gate signal, a UV line voltage, a VW line voltage, a WU line voltage, and a neutral point potential. FIG. 7 is a diagram showing specifications for creating a modified waveform in which a pulse shift has been performed from a three-phase modulated wave. FIG. 7 is a diagram showing specifications for creating a modified waveform in which a pulse shift has been performed from a three-phase modulated wave. FIG. 7 is a diagram showing specifications for creating a modified waveform in which a pulse shift has been performed from a three-phase modulated wave. It is a graph showing a carrier wave, a U-phase gate signal, a V-phase gate signal, a W-phase gate signal, and a neutral point potential. FIG. 7 is a diagram showing specifications for creating a modified waveform in which a pulse shift has been performed from a three-phase modulated wave. FIG. 7 is a diagram showing specifications for creating a modified waveform in which a pulse shift has been performed from a three-phase modulated wave. 1 is a diagram showing a preferable PWM control signal when applying shunt current detection; FIG. FIG. 6 is a diagram illustrating an example of changing the duty for a plurality of consecutive cycles of carrier waves. FIG. 3 is a diagram showing the occurrence of pulse shift and current FFT (fast Fourier transform). FIG. 2 is a block diagram showing the structure of a controller.

In the following description and drawings, corresponding parts are designated with the same reference numerals. The dimensions of elements in the drawings are not necessarily drawn to scale.

Overview FIG. 1 is a block diagram of an electrical device 10. Electrical equipment 10 includes an inverter 100, a DC power supply 110, and a load 120. The electrical device 10 is, for example, a washing machine or a refrigerator that includes a motor. In this case, load 120 is a motor, but is not limited to this, and may be any suitable load.

Inverter 100 receives DC power from DC power supply 110 and outputs it to load 120 as three-phase AC power. The DC power supply 110 may generate DC by rectifying alternating current from an AC power supply. For example, DC power supply 110 may supply DC power to inverter 100 by rectifying and then smoothing 100 volts AC obtained from a household power outlet.

Inverter 100 includes a main circuit 101 and a controller 106. Main circuit 101 includes an upper arm 102 and a lower arm 104. Upper arm 102 includes three switching elements 102a to 102c. Lower arm 104 includes three switching elements 104a to 104c. Switching elements 102a to 102c and 104a to 104c are connected in a three-phase bridge, convert DC power input from DC power supply 110 into three-phase AC power, and output it to load 120. The switching elements 102a-102c and 104a-104c are typically power switching elements IGBT (insulated gate bipolar transistors), but are not limited thereto and may be any suitable semiconductor switching elements. Flywheel diodes are connected in antiparallel to the switching elements 102a to 102c and 104a to 104c.

The controller 106 controls the power that the main circuit 101 outputs to the load 120 by applying appropriate control voltages to the gates, which are control terminals, of the switching elements 102a to 102c and 104a to 104c. The controller 106 controls the switching timing of the switching elements 102a to 102c and 104a to 104c depending on the power consumed by the load 120, for example.

A resistor 130 having a resistance value r is a shunt resistor for measuring the current i. Using a sensor that measures voltage v, current i can be determined according to the formula i=v/r. Current detection using only one resistor 130 in this manner is called one-shunt current detection.

FIG. 2 is a diagram showing the structure of the controller 106. Each signal line drawn as a single line in FIG. 2 represents three phases (U phase, V phase, and W phase). The controller 106 includes a voltage command signal generator 210, a zero-phase voltage superimposition means 220, a carrier wave generator 230, a comparator 240, and a pulse shift means 250. The voltage command signal generator 210 receives the voltage v and the phase ph of the rotor of the motor, which is the load 120, as input, generates three-phase voltage command signals based on these, and outputs them to the zero-phase voltage superimposition means 220. .

The zero-sequence voltage superimposition means 220 superimposes a zero-sequence voltage, which will be described later, on the voltage command signal, and outputs it to the comparator 240, so that the pulse width of each phase of the PWM control signal, which will be described later, is shortened to a predetermined value or less. . Carrier wave generator 230 generates a PWM-controlled carrier wave and outputs it to comparator 240 . This carrier wave is a triangular wave whose frequency is sufficiently higher than that of the voltage command signal. In some embodiments, a sawtooth wave may be used instead of a triangular wave. The comparator 240 compares the magnitude of the voltage command signal on which the zero-phase voltage is superimposed with the carrier wave, generates a PWM control signal for controlling and driving the main circuit 101, and outputs it to the pulse shift means 250. . The pulse shift means 250 generates a signal for controlling each switching element of the main circuit 101 by shifting the received PWM control signal within one period of the carrier wave, and outputs the signal to the main circuit 101.

Embodiment 1 Three-phase modulation Zero-phase superposition In the first embodiment, zero-phase voltage superposition and pulse shift are realized by using the controller 106 including the zero-phase voltage superposition means 220 and the pulse shift means 250.

FIG. 3 is a graph showing the carrier wave, U-phase gate signal, V-phase gate signal, W-phase gate signal, UV line voltage, VW line voltage, WU line voltage, and neutral point potential. Plot 310 shows the waveform of the above signal group corresponding to the voltage command signal output by voltage command signal generator 210. A plot 320 shows the waveform of the signal group corresponding to the voltage command signal output by the zero-phase voltage superimposition means 220. Plot 330 shows the waveform of the above signal group corresponding to the PWM control signal output by pulse shift means 250.

Embodiment 1 can suppress rapid fluctuations in neutral point potential during low voltage output and reduce leakage current (suppress neutral point voltage fluctuations to 2/3). Specifically, the minimum duty for one shunt current detection can be ensured at low modulation rates including zero voltage. Further, the waveform in FIG. 3 is shifted (zero vector superposition) so that it becomes equivalent to the average line voltage in one carrier wave. In this specification, "modulation rate" refers to the ratio of the output voltage at a certain point in time to the maximum output voltage. For example, when the modulation factor is 1.0, the output voltage at that point is equal to the maximum output voltage.

Pulse Shift The pulse shift means 250 shifts the rising edge and falling edge of any two of the three phases of the PWM control signal so that the three phases of the PWM control signal do not turn on simultaneously within one cycle of the carrier wave. The PWM control signal is shifted so that the two are close to each other. According to the embodiment shown in the plot 330, the pulse shifting means 250 shifts the PWM control signal such that two phases of the PWM control signal are simultaneously in the on state within one period of the carrier wave.

According to the first embodiment, when outputting a low voltage, a zero-phase voltage is superimposed on the three-phase modulation signal, and the pulse width is adjusted to be short within a range that can ensure the minimum on-period. Here, the duty at the time of low voltage output close to zero voltage before zero-phase voltage superimposition is about 50%. Each pulse is shifted so that the falling (or rising) edge of the pulse output of the phase with the maximum modulation rate and the rising (or falling) edge of the pulse output of the phase with the minimum modulation rate are close to each other. As a result, leakage currents of opposite polarities can be canceled out, making it possible to reduce the leakage current caused by switching for one phase apparently. Although it is a three-phase modulation method, it is similar to two-phase modulation. Fluctuations in neutral point potential can be suppressed to 2Vdc/3 (Vdc is input DC voltage). Furthermore, by expanding the variation interval of the neutral point potential, an increase in leakage current due to overlapping is suppressed. In addition, the leakage current i _L is expressed as i _L =C・d/dt((v _u +v _v +v _w )/3)=C・dv _c /dt, and the neutral point potential v _c increases in proportion to the amount of change (slope). Furthermore, since the pulse shift is based on the premise of ensuring a minimum on-period for one-shunt current detection, it is also possible to adapt to one-shunt current detection systems (for example, refrigerators, air conditioners, etc.).

Pulse Shift Specifications FIGS. 4A and 4B are diagrams showing specifications for creating a pulse-shifted modified waveform from a three-phase modulated wave. In the pulse shift, the value of the voltage command signal to be compared with the triangular carrier wave is adjusted at the rise and fall of the triangular wave.

The vertical axis in FIG. 4A indicates voltage in the range from -Vdc/2 to +Vdc/2, and the horizontal axis indicates time in the range of one cycle of the carrier wave. In FIG. 4A, Max indicates the phase with the largest voltage command signal (U phase), Mid indicates the phase with the second largest voltage command signal (V phase), and Min indicates the voltage Indicates the phase (W phase) with the smallest command signal magnitude. In FIG. 4A, Au indicates the state of the upper switching element of the U phase, Ad indicates the state of the lower switching element of the U phase, Bu indicates the state of the upper switching element of the V phase, and Bd indicates the state of the lower switching element of the V phase. Cu indicates the state of the upper switching element of the W phase, and Cd indicates the state of the lower switching element of the W phase. The horizontal portion where the Max, Mid, and Min plots in FIG. 4A are cut off by the carrier wave indicates the section in which the switching elements of each phase are on.

FIG. 4B is a table showing line voltages in periods A and B in FIG. 4A. The line voltage Max->Mid is the voltage between the UV phases, the line voltage Max->Min is the voltage between the UW phases, and the line voltage Mid->Min is the voltage between the VW phases.

The pulse shift means 250 shifts the falling edge of the PWM control signal of the phase with the largest voltage command signal and the voltage command signal so that the three phases of the PWM control signal do not turn on at the same time within one period of the carrier wave. The rising edge of the PWM control signal of the phase whose magnitude is the smallest is close to the rising edge of the PWM control signal of the phase whose voltage command signal is the largest, or the rising edge of the PWM control signal of the phase whose voltage command signal is the largest The PWM control signal is shifted so that the falling edge of the PWM control signal is close to the falling edge of the PWM control signal. An example of this pulse shift is the transformation from plot 410 to plot 420.

The pulse shift means 250 adjusts the pulse width of the PWM control signal so that the output line voltage is the same before and after the shift (between the plots 410 and 420). In order to achieve this, it is sufficient that the output line voltage applied to one period of the carrier wave be the same between the plots 410 and 420. The output line voltages for one period of the carrier wave in the plots 410 and 420 can be expressed as a relationship 415 and a relationship 425, respectively. If C is a constant here, D and E can be found from A and B.

By adjusting the pulse width of the PWM control signal so that the output line voltage is the same before and after the shift, the output line voltage becomes the same before and after the shift. That is, according to such control, there is no change in the voltage applied to the motor. Therefore, there is an effect that the voltage for driving the motor does not change.

FIG. 4C is a diagram showing specifications for creating a pulse-shifted modified waveform from a three-phase modulated wave. In an embodiment, the pulse shift means 250 changes the rising edge of the PWM control signal of the phase in which the voltage command signal has the largest magnitude so that two phases of the PWM control signal are not turned on simultaneously within one period of the carrier wave. The falling edge and the rising edge of the PWM control signal of the phase whose voltage command signal has the second largest magnitude are close to each other, and the falling edge of the PWM control signal of the phase whose voltage command signal has the second largest magnitude; The PWM control signal is shifted so that the voltage command signal is close to the rising edge of the PWM control signal of the phase with the smallest magnitude. An example of this pulse shift is the transformation from plot 410 to plot 430.

Embodiment 2 Two-phase modulation In Embodiment 2, pulse shifting is performed without performing zero-phase voltage superimposition. Therefore, in the controller 106 of the first embodiment, the zero-phase voltage superimposition means 220 is not used. In describing the second embodiment, underlay two-phase modulation will be taken as an example, but the present invention is not limited to this, and in the second embodiment, overlay two-phase modulation may also be used.

FIG. 5 is a graph showing a carrier wave, a U-phase gate signal, a V-phase gate signal, a W-phase gate signal, and a neutral point potential. Plot 510 shows the waveform of the above signal group corresponding to the voltage command signal output by voltage command signal generator 210. Plot 520 shows the waveform of the above signal group corresponding to the PWM control signal output by pulse shift means 250.

Embodiment 2 utilizes two-phase modulation and can suppress rapid fluctuations in neutral point potential and reduce leakage current (suppress neutral point voltage fluctuations to ⅓). Specifically, the minimum duty for one shunt current detection can be ensured at low modulation rates including zero voltage.

The PWM control inverter according to the second embodiment includes a voltage command signal generator 210 that generates an underlined two-phase modulation signal that stops one of the three phases, and a triangular carrier wave whose frequency is sufficiently higher than that of the voltage command signal. and a comparator 240 that compares the voltage command signal with the carrier wave and generates a PWM control signal for driving the main circuit 101. The PWM control inverter according to the second embodiment also includes pulse shifting means 250 that shifts the PWM control signal within one cycle of the carrier wave.

According to the second embodiment, by using underlay two-phase modulation as the modulation method, the pulse width can be shortened and the neutral point potential fluctuation can be suppressed to Vdc/3. Specifically, each pulse is shifted so that the falling (or rising) edge of the pulse output of the phase with the maximum modulation rate and the rising (or falling) edge of the pulse output of the intermediate phase are close to each other. As a result, leakage currents with opposite polarities can be canceled out, making it possible to reduce the leakage current caused by switching for one phase apparently, and even though it is a two-phase modulation method, the neutral point potential fluctuates. can be suppressed to Vdc/3. Furthermore, if the pulse width is set on the premise of securing the minimum on-period for one-shunt current detection, it is possible to adapt to one-shunt current detection systems (for example, refrigerators, air conditioners, etc.). Therefore, the second embodiment can be implemented in combination with the first embodiment, and can also be used as control during thinning of current control.

Specifications of Pulse Shift FIG. 6A is a diagram showing specifications for creating a modified waveform in which a pulse shift has been performed from a three-phase modulated wave. In the pulse shift, the value of the voltage command signal to be compared with the triangular carrier wave is adjusted at the rise and fall of the triangular wave.

The vertical axis in FIG. 6A indicates voltage in the range from −Vdc/2 to +Vdc/2, and the horizontal axis indicates time in the range of one cycle of the carrier wave. In FIG. 6A, Max indicates the phase with the largest voltage command signal (U phase), Mid indicates the phase with the second largest voltage command signal (V phase), and Min indicates the voltage Indicates the phase (W phase) with the smallest command signal magnitude. In FIG. 6A, Au indicates the state of the upper switching element of the U phase, Ad indicates the state of the lower switching element of the U phase, Bu indicates the state of the upper switching element of the V phase, and Bd indicates the state of the lower switching element of the V phase. Cu indicates the state of the upper switching element of the W phase, and Cd indicates the state of the lower switching element of the W phase. The horizontal portion where the Max, Mid, and Min plots in FIG. 6A are cut out by the carrier wave indicates the section in which the switching elements of each phase are on.

FIG. 6B is a table showing line voltages in periods A and B in FIG. 6A. The line voltage Max->Mid is the voltage between the UV phases, the line voltage Max->Min is the voltage between the UW phases, and the line voltage Mid->Min is the voltage between the VW phases.

The pulse shift means 250 shifts the falling edge of the phase whose voltage command signal has the maximum magnitude and the phase whose voltage command signal has the minimum magnitude so that two phases that are not at rest within one cycle of the carrier wave do not turn on at the same time. The PWM control signal is controlled so that the rising edge of the phase is close to each other, or the rising edge of the phase with the largest voltage command signal is close to the falling edge of the phase with the smallest voltage command signal. shift. An example of this pulse shift is the transformation from plot 510 to plot 520.

The pulse shift means 250 adjusts the pulse width of the PWM control signal so that the output line voltage is the same before and after the shift (between the plots 510 and 520). In order to realize this, the output line voltage applied to one period of the carrier wave should be the same between the plots 510 and 520. The output line voltages for one period of the carrier wave in plots 510 and 520 can be expressed as relationship 515 and relationship 525, respectively. If C is a constant here, D and E can be found from A and B.

1-Shunt Current Detection FIG. 7 is a diagram showing a preferable PWM control signal when applying 1-shunt current detection in the first embodiment. During period p1, the PWM control signal of the phase with the largest voltage command signal (for example, U phase) among the three phases is on, and the PWM control signal of the phase with the second largest voltage command signal (for example, V phase) is on. and a period during which the PWM control signal of the minimum phase (for example, W phase) is off. During period p2, the PWM control signals of the phase with the largest voltage command signal (for example, U phase) and the second largest phase (for example, V phase) are on, and the magnitude of the voltage command signal is on. indicates the period during which the PWM control signal of the minimum phase (for example, W phase) is off. When applying one-shunt current detection in the first embodiment, it is preferable that periods p1 and p2 are longer than a predetermined minimum period required for one-shunt current detection. Therefore, when applying one-shunt current detection in the first embodiment, if the zero-sequence voltage superimposition means 220 superimposes the zero-sequence voltage and the pulse shift means 250 adjusts the pulse shift amount so as to satisfy such a relationship, The minimum duty required for current detection (for example, the constant portion of C in FIG. 4A) can be ensured.

Change in Duty in Multiple Cycles of Carrier Wave FIG. 8 is a diagram showing an example of changing the duty in multiple consecutive cycles in the carrier wave. Plot 810 is the basic three-phase modulation waveform. Plot 820 is a two-phase modulation waveform with the same voltage output as plot 810 and the same duty in two consecutive periods of the carrier wave. Plot 830 is a two-phase modulation waveform with the same voltage output as plot 810, but with different duties in two consecutive periods of the carrier wave.

According to an embodiment, the pulse shift means 250 performs PWM control of the phase with the largest magnitude of the voltage command signal and the phase with the second largest magnitude in n consecutive cycles of the carrier wave (n is an integer of 2 or more). Adjust the on-period so that the sum of the on-periods of the signal does not change. Specifically, as shown in plot 830, adjustment is made to provide a relatively long duty and a relatively short duty while keeping the sum of output voltages unchanged. This makes it easier to detect current in a cycle with a long duty (the first cycle of plot 830). As a result, opportunities for current detection can be increased without changing the average voltage. According to the example of FIG. 8, in a one-shunt system, the lower limit of the modulation factor that can ensure the minimum duty required for current detection can be lowered.

Improving Current Detection Accuracy According to an embodiment, the controller 106 performs one-shunt current sensing, performs current sensing for each of n consecutive periods of the carrier wave (n is an integer greater than or equal to 2), and detects n currents. The average value of the values is used for control as the current detection value. Thereby, the accuracy of current detection can be improved.

Random Omission of Pulse Shifts According to an embodiment, the pulse shifting means 250 randomly omit shifts of pulses. Thereby, noise can be reduced.

FIG. 9 is a diagram showing the occurrence of pulse shift and current FFT (fast Fourier transform). Plot 910 shows the frequency of occurrence of pulse shifts when this embodiment is not used, and plot 915 is the current FFT in that case. Plot 910 shows that pulse shifting is performed at regular intervals, and many harmonic components of (period * n times) occur in plot 915, which appear as low-order harmonics in the current FFT, Affects noise. Plot 920 shows the frequency of occurrence of pulse shifts when using this embodiment, and plot 925 is the current FFT in that case. Here, pulse shifts are omitted at random. Since the pulses are omitted at random, the low-order harmonics as described above are not generated, that is, the noise can be reduced by controlling the pulse shifts so that they occur irregularly.

Combination of Modulation Methods of Embodiments 1 and 2 According to an embodiment, the control of Embodiment 1 (3-phase) is performed when the modulation rate is small, and the control of Embodiment 2 (2-phase) is performed when the modulation rate is large. I do. In the second embodiment, if the pulse width after pulse shift becomes a value smaller than the minimum duty of current detection, reliable current detection cannot be performed, and it is difficult to take effective measures against this. Effective here means that the current cannot be detected for each period of the carrier wave with shifted pulses. Although it is possible to take measures such as thinning out the current detection itself, it is not ideal. On the other hand, in the configuration of the first embodiment, the minimum duty of current detection can be ensured no matter how small the duty is. Therefore, it is preferable to switch between the control of the first embodiment and the control of the second embodiment based on the modulation rate. For example, when the modulation rate exceeds 50%, pulse shifting is not performed (neither Embodiment 1 nor Embodiment 2 is performed). When the modulation rate is 10 to 50%, the pulse shift of the second embodiment is performed. When the modulation rate is less than 10%, the pulse shift of the first embodiment is performed. In this configuration, by combining the control of Embodiment 1 that allows current detection and the control of Embodiment 2 that reduces leakage current, current detection can be performed reliably and leakage current can also be minimized. .

Combination of Pulse Shift and Two-Phase Modulation According to an embodiment, the control of the first embodiment in which current detection is possible is combined with conventional control using two-phase modulation. Specifically, when the pulse shift is omitted, the voltage command signal generator 210 generates an underlay two-phase modulation signal or an overlay two-phase modulation signal that pauses one of the three phases. If the conventional two-phase modulation waveform is used only when the modulation factor is small and current detection is not performed, the current ripple will be reduced in that case. By combining Embodiment 1 and conventional two-phase modulation, it is possible to reduce leakage current and improve control stability.

Using Pulse Shifting Based on Modulation Rate According to an embodiment, the pulse shifting means 250 shifts the PWM control signal only if it is less than a predetermined modulation rate. Specifically, when the modulation rate for positioning, forced commutation, etc. is small, the modulation methods according to Embodiments 1 and 2 and their modifications are used. When conventional three-phase modulation or two-phase modulation is used when the modulation rate is small, leakage current tends to increase. However, in such cases, leakage current can be reduced by using various embodiments according to the present disclosure. Further, by shortening the pulse width, the noise component can be moved to the harmonic side, and the noise of the carrier fundamental wave component can be reduced. This has the effect of reducing noise during positioning. When the modulation rate is medium to large, the influence on noise is small, so normal two-phase modulation or three-phase modulation can be used.

Hardware FIG. 10 is a block diagram showing the structure of the controller 106. Controller 106 includes a processor 1010, a memory 1020, and an input/output unit 1030. Processor 1010 generates a voltage command signal and a carrier wave, generates a PWM control signal based on a comparison thereof, and outputs it to switching elements 102a to 102c and 104a to 104c of main circuit 101, respectively. Memory 1020 stores instructions and parameters used in processing performed by processor 1010. The input/output unit 1030 generates a control signal based on the output of the processor 1010 and outputs it to the upper arm 102 and lower arm 104 of the main circuit 101. The input/output unit 1030 may be incorporated into the processor 1010.

Each of the various functions in this disclosure may be implemented with a single element or with multiple elements. Conversely, multiple functions may be realized by a single element. Each function may be realized by hardware, software, or a combination of hardware and software. A flow in this disclosure includes multiple blocks. Processing of these blocks may be done serially or in parallel. Further, the order of some blocks may be changed.

The main body of the device, system, or method in the present disclosure includes a computer. When this computer executes the program, the main functions of the device, system, or method of the present disclosure are realized. A computer includes, as its main hardware configuration, a processor that operates according to a program. The type of processor does not matter as long as it can implement a function by executing a program. A processor is composed of one or more electronic circuits including a semiconductor integrated circuit (IC) or a large scale integration (LSI). Here, they are called IC or LSI, but the name changes depending on the degree of integration, and may also be called system LSI, VLSI (very large scale integration), or ULSI (ultra large scale integration). Field programmable gate arrays (FPGAs), which are programmed after the LSI is manufactured, or reconfigurable logic devices that can reconfigure the interconnections within the LSI or set up circuit sections within the LSI, may also be used for the same purpose. I can do it. A plurality of electronic circuits may be integrated on one chip or may be provided on a plurality of chips. A plurality of chips may be integrated into one device, or may be provided in a plurality of devices. The program is recorded on a computer-readable non-transitory storage medium such as a ROM, optical disk, or hard disk drive. The program may be stored in the recording medium in advance, or may be supplied to the recording medium via a wide area communication network including the Internet.

106 Controller 210 Voltage command signal generator 220 Zero-phase voltage superimposition means 230 Carrier wave generator 240 Comparator 250 Pulse shift means

Claims (14)

A main circuit comprising three switching elements in the upper arm and three switching elements in the lower arm connected in a three-phase bridge, converting input DC power into three-phase AC power and outputting it;
a voltage command signal generator that generates a three-phase voltage command signal; a carrier wave generator that generates a triangular or sawtooth carrier wave having a frequency sufficiently higher than that of the voltage command signal; a control circuit having a comparator that compares the magnitude and generates a PWM (pulse width modulation) control signal for driving the main circuit;
zero-phase voltage superimposition means for superimposing a zero-phase voltage on the voltage command signal so that the pulse width of each phase of the PWM control signal is shortened to a predetermined value or less;
A PWM control inverter comprising pulse shifting means for shifting the PWM control signal within one period of the carrier wave,
The pulse shift means is configured to control the rising edges of at least two of the three phases of the PWM control signal so that three or two phases of the PWM control signal are not turned on at the same time within one period of the carrier wave; A PWM control inverter that shifts the PWM control signal so that its falling edge is close to the PWM control signal. 2. The PWM control inverter according to claim 1, wherein the pulse shift means shifts the PWM control signal so that two phases of the PWM control signal are simultaneously turned on within one period of the carrier wave. 2. The PWM control inverter according to claim 1, wherein the pulse shift means adjusts the pulse width of the PWM control signal so that the output line voltage is the same before and after the shift. The pulse shift means prevents three phases of the PWM control signal from being on at the same time within one period of the carrier wave.
The falling edge of the PWM control signal of the phase in which the magnitude of the voltage command signal is the largest is close to the rising edge of the PWM control signal of the phase in which the magnitude of the voltage command signal is the smallest, or the voltage command Shifting the PWM control signal so that the rising edge of the PWM control signal of the phase with the largest signal magnitude and the falling edge of the PWM control signal of the phase with the smallest magnitude of the voltage command signal are close to each other. The PWM control inverter according to claim 1. Among the three phases, the PWM control signal of the phase with the largest magnitude of the voltage command signal is on, and the PWM control signals of the phase with the second largest magnitude of the voltage command signal and the phase with the smallest magnitude are off. and the PWM control signal of the phase with the largest magnitude of the voltage command signal and the second largest phase among the three phases is on, and the PWM control signal of the phase with the smallest magnitude of the voltage command signal is on. The zero-phase voltage superimposition means superimposes the zero-phase voltage so that the period during which the PWM control signal is off is longer than a predetermined minimum period required for one shunt current detection, and the pulse shift means adjusts the pulse shift amount. The PWM control inverter according to any one of claims 1 to 4. A main circuit comprising three switching elements in the upper arm and three switching elements in the lower arm connected in a three-phase bridge, converting input DC power into three-phase AC power and outputting it;
a voltage command signal generator that generates an underlay two-phase modulation signal that pauses one of the three phases; a carrier wave generator that generates a triangular or sawtooth carrier wave having a sufficiently higher frequency than the voltage command signal; a control circuit having a comparator that compares the voltage command signal with the carrier wave and generates a PWM (pulse width modulation) control signal for driving the main circuit;
A PWM control inverter comprising pulse shifting means for shifting the PWM control signal within one period of the carrier wave,
The pulse shift means prevents two phases that are not at rest within one cycle of the carrier wave from being turned on at the same time.
The falling edge of the phase for which the voltage command signal has the largest magnitude is close to the rising edge of the phase for which the voltage command signal has the smallest magnitude, or the rising edge of the phase for which the voltage command signal has the largest magnitude so that the edge and the falling edge of the phase with the minimum magnitude of the voltage command signal are close to each other,
A PWM control inverter that shifts the PWM control signal. 7. The PWM control inverter according to claim 6, wherein the pulse shift means adjusts the pulse width of the PWM control signal so that the output line voltage is the same before and after the shift. The pulse shift means includes:
So that the sum of the on-periods of the PWM control signal in the phase where the voltage command signal is the largest and the second largest in the n consecutive cycles of the carrier wave (n is an integer of 2 or more) does not change. The PWM control inverter according to claim 6 or 7, wherein the on-period is adjusted. The control circuit performs one-shunt current detection, performs current detection for each of n consecutive periods of the carrier wave (n is an integer of 2 or more), and uses the average value of n current values as a current detection value for control. The PWM control inverter according to any one of claims 6 to 8. The PWM control inverter according to any one of claims 1 to 9, wherein the pulse shifting means randomly omits shifting of pulses. A main circuit comprising three switching elements in the upper arm and three switching elements in the lower arm connected in a three-phase bridge, converting input DC power into three-phase AC power and outputting it;
a voltage command signal generator that generates a three-phase voltage command signal or a lower tension two-phase modulation signal or an upper tension two-phase modulation signal that stops one of the three phases; and a voltage command signal generator having a frequency sufficiently higher than that of the voltage command signal. a carrier wave generator that generates a triangular or sawtooth carrier wave, and a comparator that compares the voltage command signal and the carrier wave to generate a PWM (pulse width modulation) control signal for driving the main circuit. a control circuit having;
zero-phase voltage superimposition means for superimposing a zero-phase voltage on the voltage command signal so that the pulse width of each phase of the PWM control signal is shortened to a predetermined value or less;
A PWM control inverter comprising pulse shifting means for shifting the PWM control signal within one period of the carrier wave,
(i)
Among the three phases, the PWM control signal of the phase with the largest magnitude of the voltage command signal is on, and the PWM control signals of the phase with the second largest magnitude of the voltage command signal and the phase with the smallest magnitude are off. and the PWM control signal of the phase with the largest magnitude of the voltage command signal and the second largest phase among the three phases is on, and the PWM control signal of the phase with the smallest magnitude of the voltage command signal is on. When at least one of the periods during which the PWM control signal is off is less than a predetermined minimum period required for one shunt current detection;
The pulse shift means shifts the rising edge and falling edge of any two of the three phases of the PWM control signal so that the three phases of the PWM control signal do not turn on simultaneously within one cycle of the carrier wave. Shifting the PWM control signal so that the edge is close to the
(ii)
Among the three phases, the PWM control signal of the phase with the largest magnitude of the voltage command signal is on, and the PWM control signals of the phase with the second largest magnitude of the voltage command signal and the phase with the smallest magnitude are off. and the PWM control signal of the phase with the largest magnitude of the voltage command signal and the second largest phase among the three phases is on, and the PWM control signal of the phase with the smallest magnitude of the voltage command signal is on. When the period during which the PWM control signal is off is greater than the predetermined minimum period required for one shunt current detection,
The pulse shift means prevents two phases that are not at rest within one cycle of the carrier wave from being turned on at the same time.
The falling edge of the phase for which the voltage command signal has the largest magnitude is close to the rising edge of the phase for which the voltage command signal has the smallest magnitude, or the rising edge of the phase for which the voltage command signal has the largest magnitude so that the edge and the falling edge of the phase with the minimum magnitude of the voltage command signal are close to each other,
A PWM control inverter that shifts the PWM control signal. 12. The PWM control inverter according to claim 11, wherein the pulse shift means adjusts the pulse width of the PWM control signal so that the output line voltage is the same before and after the shift. Any one of claims 1 to 12, wherein the voltage command signal generator generates a lower tension two-phase modulation signal or an upper tension two-phase modulation signal that pauses one of the three phases when the pulse shift is omitted. PWM control inverter described in section. The PWM control inverter according to any one of claims 1 to 13, wherein the pulse shifting means shifts the PWM control signal only when the modulation rate is smaller than a predetermined modulation rate.

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