JP7380071B2 - 半導体装置 - Google Patents
半導体装置 Download PDFInfo
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- JP7380071B2 JP7380071B2 JP2019191912A JP2019191912A JP7380071B2 JP 7380071 B2 JP7380071 B2 JP 7380071B2 JP 2019191912 A JP2019191912 A JP 2019191912A JP 2019191912 A JP2019191912 A JP 2019191912A JP 7380071 B2 JP7380071 B2 JP 7380071B2
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- HBMJWWWQQXIZIP-UHFFFAOYSA-N silicon carbide Chemical compound [Si+]#[C-] HBMJWWWQQXIZIP-UHFFFAOYSA-N 0.000 claims description 4
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- 238000010586 diagram Methods 0.000 description 18
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- PXHVJJICTQNCMI-UHFFFAOYSA-N Nickel Chemical compound [Ni] PXHVJJICTQNCMI-UHFFFAOYSA-N 0.000 description 12
- 230000020169 heat generation Effects 0.000 description 11
- 229910052751 metal Inorganic materials 0.000 description 11
- 239000002184 metal Substances 0.000 description 11
- XEEYBQQBJWHFJM-UHFFFAOYSA-N Iron Chemical compound [Fe] XEEYBQQBJWHFJM-UHFFFAOYSA-N 0.000 description 10
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- 239000010949 copper Substances 0.000 description 9
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- 229910000679 solder Inorganic materials 0.000 description 8
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- 229910052742 iron Inorganic materials 0.000 description 5
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- 229910000521 B alloy Inorganic materials 0.000 description 3
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- QDWJUBJKEHXSMT-UHFFFAOYSA-N boranylidynenickel Chemical compound [Ni]#B QDWJUBJKEHXSMT-UHFFFAOYSA-N 0.000 description 3
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- 238000005260 corrosion Methods 0.000 description 3
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 description 3
- 229910052737 gold Inorganic materials 0.000 description 3
- 239000010931 gold Substances 0.000 description 3
- OFNHPGDEEMZPFG-UHFFFAOYSA-N phosphanylidynenickel Chemical compound [P].[Ni] OFNHPGDEEMZPFG-UHFFFAOYSA-N 0.000 description 3
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- 238000001816 cooling Methods 0.000 description 2
- 230000017525 heat dissipation Effects 0.000 description 2
- 150000002739 metals Chemical class 0.000 description 2
- 229910052710 silicon Inorganic materials 0.000 description 2
- 239000010703 silicon Substances 0.000 description 2
- 230000008646 thermal stress Effects 0.000 description 2
- 229910000881 Cu alloy Inorganic materials 0.000 description 1
- 229910052581 Si3N4 Inorganic materials 0.000 description 1
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- 230000001070 adhesive effect Effects 0.000 description 1
- 230000004888 barrier function Effects 0.000 description 1
- 238000006243 chemical reaction Methods 0.000 description 1
- PMHQVHHXPFUNSP-UHFFFAOYSA-M copper(1+);methylsulfanylmethane;bromide Chemical compound Br[Cu].CSC PMHQVHHXPFUNSP-UHFFFAOYSA-M 0.000 description 1
- 230000006378 damage Effects 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 230000005669 field effect Effects 0.000 description 1
- 230000014509 gene expression Effects 0.000 description 1
- 230000005484 gravity Effects 0.000 description 1
- 229910044991 metal oxide Inorganic materials 0.000 description 1
- 150000004706 metal oxides Chemical class 0.000 description 1
- TWNQGVIAIRXVLR-UHFFFAOYSA-N oxo(oxoalumanyloxy)alumane Chemical compound O=[Al]O[Al]=O TWNQGVIAIRXVLR-UHFFFAOYSA-N 0.000 description 1
- 230000002093 peripheral effect Effects 0.000 description 1
- 229920001296 polysiloxane Polymers 0.000 description 1
- HQVNEWCFYHHQES-UHFFFAOYSA-N silicon nitride Chemical compound N12[Si]34N5[Si]62N3[Si]51N64 HQVNEWCFYHHQES-UHFFFAOYSA-N 0.000 description 1
- 229920005992 thermoplastic resin Polymers 0.000 description 1
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 description 1
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- H01L2924/13—Discrete devices, e.g. 3 terminal devices
- H01L2924/1304—Transistor
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/19—Details of hybrid assemblies other than the semiconductor or other solid state devices to be connected
- H01L2924/191—Disposition
- H01L2924/19101—Disposition of discrete passive components
- H01L2924/19107—Disposition of discrete passive components off-chip wires
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/35—Mechanical effects
- H01L2924/351—Thermal stress
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/30—Technical effects
- H01L2924/36—Material effects
- H01L2924/365—Metallurgical effects
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Physics & Mathematics (AREA)
- Ceramic Engineering (AREA)
- Chemical & Material Sciences (AREA)
- Dispersion Chemistry (AREA)
- Materials Engineering (AREA)
- Wire Bonding (AREA)
- Cooling Or The Like Of Semiconductors Or Solid State Devices (AREA)
Description
20a,20b セラミック回路基板
21a,21b 絶縁板
22a1~22a3,22b1~22b3 導電パターン
23a,23b 金属板
30,30a,30b,40a,40b 半導体チップ
31 ゲート
32 活性領域
32a,32b 電極領域
33 ゲートランナ
35 接合領域
36 被接合領域
37 接合禁止領域
50,55a,55b ワイヤ
60 放熱板
70 ケース部
71,72,73 配線部材
71a,72a,73a 端子
74 蓋部
75 封止部材
80,80a 温度分布画像
Claims (13)
- おもて面に第1主電極を備える半導体チップと、
前記第1主電極にそれぞれ接合される4本以上の複数のワイヤと、
を備え、
前記複数のワイヤがそれぞれ接合される前記第1主電極の複数の被接合領域は、平面視で前記半導体チップの一辺と平行な第1方向と前記第1方向に直交する第2方向とにおいて、それぞれ重複しないように配置される、
半導体装置。 - 前記半導体チップは裏面に第2主電極をさらに備え、
前記半導体チップの前記第2主電極が接合部材を介して接続される導電板をさらに有する、
請求項1に記載の半導体装置。 - おもて面に第1主電極を備える半導体チップと、
前記第1主電極にそれぞれ接合される複数のワイヤと、
を備え、
前記複数のワイヤがそれぞれ接合される前記第1主電極の偶数個の複数の被接合領域は、平面視で前記半導体チップの一辺と平行な第1方向と前記第1方向に直交する第2方向とにおいて、それぞれ重複しないように配置され、
前記複数の被接合領域から選択される2つで一組の被接合領域は、前記おもて面の中心点に対して点対称となるように全組が配置され、
前記複数の被接合領域が前記おもて面の外縁部に4つ配置される、
半導体装置。 - 前記複数の被接合領域は、前記おもて面の中央部以外に配置される、
請求項1または3に記載の半導体装置。 - 前記複数の被接合領域は、前記おもて面の外縁部に配置される、
請求項1または3に記載の半導体装置。 - 前記おもて面に前記複数の被接合領域が偶数個、配置される、
請求項1に記載の半導体装置。 - 前記複数の被接合領域から選択される2つで一組の被接合領域は、前記おもて面の中心点に対して点対称となるように全組が配置される、
請求項6に記載の半導体装置。 - 前記複数の被接合領域が前記おもて面の外縁部に4つ配置される、
請求項7に記載の半導体装置。 - 前記複数の被接合領域は、前記一組の被接合領域を結ぶ直線と別の一組の被接合領域を結ぶ直線とが略直交するように配置される、
請求項3または8に記載の半導体装置。 - さらに、前記複数の被接合領域は、前記おもて面の前記中心点を通過する直線に対して線対称となるように配置されている、
請求項3または7に記載の半導体装置。 - 前記半導体チップは、一辺の長さが7mm以下である、
請求項1または3に記載の半導体装置。 - 前記半導体チップは、ダイオードまたはスイッチング素子を含む、
請求項1または3に記載の半導体装置。 - 半導体チップは、炭化シリコンから構成される、
請求項1または3に記載の半導体装置。
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Citations (5)
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JP2005026294A (ja) | 2003-06-30 | 2005-01-27 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP2006066704A (ja) | 2004-08-27 | 2006-03-09 | Toyota Motor Corp | 半導体装置 |
JP2007311829A (ja) | 2007-08-24 | 2007-11-29 | Renesas Technology Corp | 半導体装置 |
JP2014170801A (ja) | 2013-03-01 | 2014-09-18 | Sumitomo Electric Ind Ltd | 半導体装置 |
JP2016162960A (ja) | 2015-03-04 | 2016-09-05 | エスアイアイ・セミコンダクタ株式会社 | 半導体素子および半導体装置 |
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US6486548B1 (en) * | 1997-10-20 | 2002-11-26 | Hitachi, Ltd. | Semiconductor module and power converting apparatus using the module |
US20130201316A1 (en) * | 2012-01-09 | 2013-08-08 | May Patents Ltd. | System and method for server based control |
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JP2005026294A (ja) | 2003-06-30 | 2005-01-27 | Renesas Technology Corp | 半導体装置およびその製造方法 |
JP2006066704A (ja) | 2004-08-27 | 2006-03-09 | Toyota Motor Corp | 半導体装置 |
JP2007311829A (ja) | 2007-08-24 | 2007-11-29 | Renesas Technology Corp | 半導体装置 |
JP2014170801A (ja) | 2013-03-01 | 2014-09-18 | Sumitomo Electric Ind Ltd | 半導体装置 |
JP2016162960A (ja) | 2015-03-04 | 2016-09-05 | エスアイアイ・セミコンダクタ株式会社 | 半導体素子および半導体装置 |
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