JP7368693B2 - Inductor built-in board - Google Patents

Inductor built-in board Download PDF

Info

Publication number
JP7368693B2
JP7368693B2 JP2019081007A JP2019081007A JP7368693B2 JP 7368693 B2 JP7368693 B2 JP 7368693B2 JP 2019081007 A JP2019081007 A JP 2019081007A JP 2019081007 A JP2019081007 A JP 2019081007A JP 7368693 B2 JP7368693 B2 JP 7368693B2
Authority
JP
Japan
Prior art keywords
hole
layer
conductor
resin
plated film
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Active
Application number
JP2019081007A
Other languages
Japanese (ja)
Other versions
JP2020178096A (en
Inventor
博明 児玉
千朗 西脇
和彦 倉信
浩彰 宇野
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Ibiden Co Ltd
Original Assignee
Ibiden Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ibiden Co Ltd filed Critical Ibiden Co Ltd
Priority to JP2019081007A priority Critical patent/JP7368693B2/en
Publication of JP2020178096A publication Critical patent/JP2020178096A/en
Application granted granted Critical
Publication of JP7368693B2 publication Critical patent/JP7368693B2/en
Active legal-status Critical Current
Anticipated expiration legal-status Critical

Links

Images

Landscapes

  • Parts Printed On Printed Circuit Boards (AREA)
  • Production Of Multi-Layered Print Wiring Board (AREA)

Description

本発明は、インダクタを内蔵するインダクタ内蔵基板に関する。 The present invention relates to an inductor-embedded substrate containing an inductor.

特許文献１は、配線基板に内蔵されるインダクタ部品の製造方法を開示している。特許文献１では、樹脂層内に磁性体を収容し、樹脂層内にスルーホール導体を設け、スルーホール導体と磁性体とが接触しないようにしている。 Patent Document 1 discloses a method for manufacturing an inductor component built into a wiring board. In Patent Document 1, a magnetic material is housed in a resin layer, a through-hole conductor is provided in the resin layer, and the through-hole conductor and the magnetic material are prevented from coming into contact with each other.

特開２０１６－１９７６２４JP2016-197624

特許文献１では、樹脂層にスルーホール導体を配置するため、インダクタ部品の大きさに対して磁性体の割合が低くなり、インダクタンスを大きくすることが難しいと考えられる。一方、スルーホール導体と磁性体とを接触させた場合、スルーホール導体の信頼性が低下すると考えられる。 In Patent Document 1, since the through-hole conductor is arranged in the resin layer, the ratio of the magnetic material to the size of the inductor component is low, making it difficult to increase the inductance. On the other hand, when a through-hole conductor and a magnetic material are brought into contact, it is thought that the reliability of the through-hole conductor decreases.

本発明の目的は、スルーホール導体の信頼性の高いインダクタ内蔵基板を提供することである。 An object of the present invention is to provide an inductor-embedded substrate with highly reliable through-hole conductors.

本発明に係るインダクタ内蔵基板は、開口が形成されたコア基板と、前記開口内に充填され、第１貫通孔を有する磁性体樹脂と、前記第１貫通孔に形成された金属膜から成る第１スルーホール導体と、を有する。前記磁性体樹脂は６０重量％以上の酸化鉄フィラーを含有し、前記第１貫通孔の表面に平均厚みが０．０１μｍ以上、１μｍ以下の樹脂残渣層が形成され、さらに、前記コア基板に形成された第２貫通孔と、前記第２貫通孔に形成された金属膜から成る第２スルーホール導体を有し、前記第２貫通孔の表面に樹脂残渣層が形成され、前記第１貫通孔の前記樹脂残渣層の厚みは、前記第２貫通孔の前記樹脂残渣層の厚みよりも厚い。
The inductor-embedded substrate according to the present invention includes a core substrate in which an opening is formed, a magnetic resin filled in the opening and having a first through hole, and a first through hole made of a metal film formed in the first through hole. 1 through-hole conductor. The magnetic resin contains 60% by weight or more of iron oxide filler, and a resin residue layer having an average thickness of 0.01 μm or more and 1 μm or less is formed on the surface of the first through hole , and is further formed on the core substrate. a second through-hole conductor made of a metal film formed in the second through-hole, a resin residue layer is formed on the surface of the second through-hole, and a resin residue layer is formed on the surface of the second through-hole; The thickness of the resin residue layer is thicker than the thickness of the resin residue layer of the second through hole.

本発明のインダクタ内蔵基板は、磁性体樹脂の第１貫通孔に直接金属膜からなる第１スルーホール導体を形成するため、インダクタ部品の磁性体樹脂の体積を大きくし、インダクタンスを大きくすることができる。磁性体樹脂は６０重量％以上の酸化鉄フィラーを含有するため、伝熱性が高く、インダクタ内蔵基板の放熱性が高まる。第１貫通孔の表面の樹脂残渣層は、平均厚みが０．０１μｍ以上、１μｍ以下であるため、第１貫通孔の表面から露出する酸化鉄フィラーが第１スルーホール導体を形成する金属膜と接し、第１スルーホール導体の信頼性が高くなる。 In the inductor-embedded substrate of the present invention, since the first through-hole conductor made of a metal film is directly formed in the first through-hole of the magnetic resin, it is possible to increase the volume of the magnetic resin of the inductor component and increase the inductance. can. Since the magnetic resin contains 60% by weight or more of iron oxide filler, it has high heat conductivity and improves the heat dissipation of the inductor-embedded substrate. Since the resin residue layer on the surface of the first through hole has an average thickness of 0.01 μm or more and 1 μm or less, the iron oxide filler exposed from the surface of the first through hole is connected to the metal film forming the first through hole conductor. This increases the reliability of the first through-hole conductor.

図１（Ａ）は実施形態のインダクタ内蔵基板の断面図であり、図１（Ｂ）はスルーホールランドの平面図であり、図１（Ｃ）はインダクタ内蔵基板のコア基板の拡大図である。FIG. 1(A) is a cross-sectional view of the inductor built-in board of the embodiment, FIG. 1(B) is a plan view of a through-hole land, and FIG. 1(C) is an enlarged view of the core board of the inductor built-in board. . 実施形態に係るインダクタ内蔵基板の製造方法を示す工程図。FIG. 3 is a process diagram showing a method for manufacturing an inductor-embedded substrate according to an embodiment. 実施形態に係るインダクタ内蔵基板の製造方法を示す工程図。FIG. 3 is a process diagram showing a method for manufacturing an inductor-embedded substrate according to an embodiment. 実施形態に係るインダクタ内蔵基板の製造方法を示す工程図。FIG. 3 is a process diagram showing a method for manufacturing an inductor-embedded substrate according to an embodiment. 実施形態に係るインダクタ内蔵基板の第１スルーホール導体の断面顕微鏡写真。1 is a cross-sectional micrograph of a first through-hole conductor of an inductor-embedded board according to an embodiment. 実施形態に係るインダクタ内蔵基板の第１スルーホール導体の中央部の断面顕微鏡写真。FIG. 3 is a cross-sectional micrograph of the center portion of the first through-hole conductor of the inductor-embedded board according to the embodiment. 参考例に係るインダクタ内蔵基板の第１スルーホール導体の断面顕微鏡写真。A cross-sectional micrograph of a first through-hole conductor of an inductor-embedded board according to a reference example. 参考例に係るインダクタ内蔵基板の第１スルーホール導体の中央部の断面顕微鏡写真。FIG. 3 is a cross-sectional micrograph of the center portion of the first through-hole conductor of the inductor-embedded board according to the reference example.

図１（Ａ）は、実施形態のインダクタを内蔵するインダクタ内蔵基板１０の断面図を示す。インダクタ内蔵基板１０は、第１面Ｆと第１面Ｆと反対側の第２面Ｓを有する絶縁性基材２０と、絶縁性基材２０の第１面Ｆ上の第１導体層（導体回路）５８Ｆと、絶縁性基材２０の第２面Ｓ上の第２導体層５８Ｓと、第１導体層５８Ｆと第２導体層５８Ｓを接続しているスルーホール導体３６とで形成されているコア基板３０を有する。コア基板３０は第１面Ｆと第１面Ｆと反対側の第２面Ｓを有する。コア基板３０の第１面Ｆと絶縁性基材２０の第１面Ｆは同じ面であり、コア基板３０の第２面Ｓと絶縁性基材２０の第２面Ｓは同じ面である。絶縁性基材２０は、エポキシなどの樹脂と補強用のガラスクロス等の芯材１４で形成されている。絶縁性基材２０は、さらに、シリカ等の無機粒子を有しても良い。 FIG. 1A shows a cross-sectional view of an inductor-embedded substrate 10 that incorporates an inductor according to an embodiment. The inductor-embedded substrate 10 includes an insulating base material 20 having a first surface F and a second surface S opposite to the first surface F, and a first conductor layer (conductor layer) on the first surface F of the insulating base material 20. circuit) 58F, a second conductor layer 58S on the second surface S of the insulating base material 20, and a through-hole conductor 36 connecting the first conductor layer 58F and the second conductor layer 58S. It has a core substrate 30. The core substrate 30 has a first surface F and a second surface S opposite to the first surface F. The first surface F of the core substrate 30 and the first surface F of the insulating base material 20 are the same surface, and the second surface S of the core substrate 30 and the second surface S of the insulating base material 20 are the same surface. The insulating base material 20 is formed of a resin such as epoxy and a reinforcing core material 14 such as glass cloth. The insulating base material 20 may further include inorganic particles such as silica.

インダクタ内蔵基板１０は、さらに、コア基板３０の第１面Ｆ上に上側のビルドアップ層４５０Ｆを有する。上側のビルドアップ層４５０Ｆはコア基板３０の第１面Ｆ上に形成されている絶縁層４５０Ａと絶縁層４５０Ａ上の導体層４５８Ａと絶縁層４５０Ａを貫通し第１導体層５８Ｆと導体層４５８Ａを接続しているビア導体４６０Ａとを有する。上側のビルドアップ層４５０Ｆはさらに絶縁層４５０Ａと導体層４５８Ａ上の絶縁層４５０Ｃと絶縁層４５０Ｃ上の導体層４５８Ｃと絶縁層４５０Ｃを貫通し導体層４５８Ａやビア導体４６０Ａと導体層４５８Ｃとを接続するビア導体４６０Ｃを有する。 The inductor-embedded substrate 10 further includes an upper buildup layer 450F on the first surface F of the core substrate 30. The upper buildup layer 450F penetrates the insulating layer 450A formed on the first surface F of the core substrate 30, the conductor layer 458A on the insulating layer 450A, and the insulating layer 450A, and connects the first conductor layer 58F and the conductor layer 458A. It has a connected via conductor 460A. The upper buildup layer 450F further penetrates the insulating layer 450A, the insulating layer 450C on the conductor layer 458A, the conductor layer 458C on the insulating layer 450C, and the insulating layer 450C to connect the conductor layer 458A, the via conductor 460A, and the conductor layer 458C. It has a via conductor 460C.

インダクタ内蔵基板１０は、さらに、コア基板３０の第２面Ｓ上に下側のビルドアップ層４５０Ｓを有する。下側のビルドアップ層４５０Ｓはコア基板３０の第２面Ｓ上に形成されている絶縁層４５０Ｂと絶縁層４５０Ｂ上の導体層４５８Ｂと絶縁層４５０Ｂを貫通し第２導体層５８Ｓと導体層４５８Ｂを接続しているビア導体４６０Ｂとを有する。下側のビルドアップ層４５０Ｓはさらに絶縁層４５０Ｂと導体層４５８Ｂ上の絶縁層４５０Ｄと絶縁層４５０Ｄ上の導体層４５８Ｄと絶縁層４５０Ｄを貫通し導体層４５８Ｂやビア導体４６０Ｂと導体層４５８Ｄとを接続するビア導体４６０Ｄを有する。 The inductor-embedded substrate 10 further includes a lower buildup layer 450S on the second surface S of the core substrate 30. The lower buildup layer 450S penetrates the insulating layer 450B formed on the second surface S of the core substrate 30, the conductor layer 458B on the insulating layer 450B, and the insulating layer 450B, and passes through the second conductor layer 58S and the conductor layer 458B. and a via conductor 460B that connects the via conductor 460B. The lower buildup layer 450S further penetrates the insulating layer 450B, the insulating layer 450D on the conductor layer 458B, the conductor layer 458D on the insulating layer 450D, and the insulating layer 450D, and connects the conductor layer 458B, the via conductor 460B, and the conductor layer 458D. It has a via conductor 460D for connection.

実施形態のインダクタ内蔵基板は、さらに、上側のビルドアップ層４５０Ｆ上に開口４７１Ｆを有するソルダーレジスト層４７０Ｆと下側のビルドアップ層４５０Ｓ上に開口４７１Ｓを有するソルダーレジスト層４７０Ｓを有する。 The inductor built-in substrate of the embodiment further includes a solder resist layer 470F having an opening 471F on the upper buildup layer 450F, and a solder resist layer 470S having an opening 471S on the lower buildup layer 450S.

ソルダーレジスト層４７０Ｆ、４７０Ｓの開口４７１Ｆ、４７１Ｓにより露出している導体層４５８Ｃ、４５８Ｄやビア導体４６０Ｃ、４６０Ｄの上面はパッドとして機能する。パッド上に、Ｎｉ／ＡｕやＮｉ／Ｐｄ／Ａｕ、Ｐｄ／Ａｕ、ＯＳＰから成る保護膜４７２が形成されている。その保護膜上に半田バンプ４７６Ｆ、４７６Ｓが形成されている。上側のビルドアップ層４５０Ｆ上に形成されている半田バンプ４７６Ｆを介して図示しないＩＣチップがインダクタ内蔵基板１０に搭載される。下側のビルドアップ層４５０Ｓ上に形成されている半田バンプ４７６Ｓを介してインダクタ内蔵基板１０はマザーボードに搭載される。 The upper surfaces of conductor layers 458C and 458D and via conductors 460C and 460D exposed through openings 471F and 471S of solder resist layers 470F and 470S function as pads. A protective film 472 made of Ni/Au, Ni/Pd/Au, Pd/Au, or OSP is formed on the pad. Solder bumps 476F and 476S are formed on the protective film. An IC chip (not shown) is mounted on the inductor-embedded substrate 10 via solder bumps 476F formed on the upper buildup layer 450F. The inductor built-in board 10 is mounted on the motherboard via solder bumps 476S formed on the lower buildup layer 450S.

図１（Ｃ）は図１（Ａ）中のコア基板３０の一部を拡大して示す。コア基板３０では、第１導体層５８Ｆと第２導体層５８Ｓとを接続するスルーホール導体３６は、コア基板３０を貫通する第２貫通孔２０ａに形成された第２スルーホール導体３６Ａと、コア基板３０の開口２０ｂ内に充填された磁性体樹脂１８の第１貫通孔１８ｂに形成された第１スルーホール導体３６Ｂとから成る。第２貫通孔２０ａの直径ｄａと第１貫通孔１８ｂの直径ｄｂとはほぼ等しい。第２スルーホール導体３６Ａ、第１スルーホール導体３６Ｂ内には樹脂充填剤１６が充填され、スルーホールランド５８ＦＲは蓋めっきから成る。スルーホールランド５８ＦＲは、第２スルーホール導体３６Ａに形成された第２スルーホールランド５８ＦＲＡと第１スルーホール導体３６Ｂに形成された第１スルーホールランド５８ＦＲＢとから成る。 FIG. 1(C) shows an enlarged portion of the core substrate 30 in FIG. 1(A). In the core board 30, the through-hole conductor 36 connecting the first conductor layer 58F and the second conductor layer 58S is connected to the second through-hole conductor 36A formed in the second through-hole 20a penetrating the core board 30, and the core The first through-hole conductor 36B is formed in the first through-hole 18b of the magnetic resin 18 filled in the opening 20b of the substrate 30. The diameter da of the second through hole 20a and the diameter db of the first through hole 18b are approximately equal. The second through-hole conductor 36A and the first through-hole conductor 36B are filled with a resin filler 16, and the through-hole land 58FR is made of lid plating. The through-hole land 58FR includes a second through-hole land 58FRA formed on the second through-hole conductor 36A and a first through-hole land 58FRB formed on the first through-hole conductor 36B.

図１（Ｂ）は、第２スルーホール導体３６Ａに形成された第２スルーホールランド５８ＦＲＡと第１スルーホール導体３６Ｂに形成された第１スルーホールランド５８ＦＲＢとの平面図である。第２スルーホールランド５８ＦＲＡは、第２スルーホール導体３６Ａと同心円状に形成され、第１スルーホールランド５８ＦＲＢは、第１スルーホール導体３６Ｂと同心円状に形成されている。第２スルーホールランド５８ＦＲＡの直径Ｄａと第１スルーホールランド５８ＦＲＢの直径Ｄｂとはほぼ等しい。第２スルーホールランド５８ＦＲＡと第１スルーホールランド５８ＦＲＢとは第１導体層（回路パターン）５８Ｆにより接続されている。第１スルーホールランド５８ＦＲＢの直径Ｄｂは、磁性体樹脂１８の充填された開口２０ｂの直径ＤＢよりも小径に形成されている。即ち、第１スルーホールランド５８ＦＲＢは、磁性体樹脂１８上から絶縁性基材２０まで広がることが無い。 FIG. 1(B) is a plan view of a second through-hole land 58FRA formed on the second through-hole conductor 36A and a first through-hole land 58FRB formed on the first through-hole conductor 36B. The second through-hole land 58FRA is formed concentrically with the second through-hole conductor 36A, and the first through-hole land 58FRB is formed concentrically with the first through-hole conductor 36B. The diameter Da of the second through-hole land 58FRA and the diameter Db of the first through-hole land 58FRB are approximately equal. The second through-hole land 58FRA and the first through-hole land 58FRB are connected by a first conductor layer (circuit pattern) 58F. The diameter Db of the first through-hole land 58FRB is smaller than the diameter DB of the opening 20b filled with the magnetic resin 18. That is, the first through-hole land 58FRB does not extend from above the magnetic resin 18 to the insulating base material 20.

磁性体樹脂１８は、酸化鉄フィラー（磁性粒子）とエポキシ等の樹脂を含む。磁性粒子として、酸化鉄（III）等の酸化鉄フィラーが挙げられる。磁性体樹脂中の酸化鉄フィラーの含有量は６０重量％～９０重量％であることが好ましい。酸化鉄フィラーの粒子径は均一で無い方が、重量％を高め、透磁率及び伝熱性を高くできるため望ましい。 The magnetic resin 18 includes an iron oxide filler (magnetic particles) and a resin such as epoxy. Examples of magnetic particles include iron oxide fillers such as iron (III) oxide. The content of iron oxide filler in the magnetic resin is preferably 60% to 90% by weight. It is preferable that the particle size of the iron oxide filler is not uniform because the weight percentage can be increased and the magnetic permeability and heat conductivity can be increased.

図１（Ｃ）に示されるように、コア基板３０を貫通する第２貫通孔２０ａに形成された第２スルーホール導体３６Ａは、第２貫通孔２０ａに接触する。第２スルーホール導体３６Ａは、第２貫通孔２０ａ上の第２無電解めっき膜３２と、該第２無電解めっき膜３２上の第２電解めっき膜３４とから成る。磁性体樹脂１８を貫通する第１貫通孔１８ｂに形成された第１スルーホール導体３６Ｂは、第１貫通孔１８ｂに接触する。第１スルーホール導体３６Ｂは、第１貫通孔１８ｂ上の第２無電解めっき膜３２と、該第２無電解めっき膜３２上の第２電解めっき膜３４とから成る。第２スルーホール導体３６Ａを構成する第２無電解めっき膜３２と第２電解めっき膜３４との厚みｔａは、第１スルーホール導体３６Ｂを構成する第２無電解めっき膜３２と第２電解めっき膜３４との厚みｔｂよりも厚い。伝熱性の低い絶縁性基材２０の第２貫通孔２０ａに形成された第２スルーホール導体３６Ａの厚みｔａは、熱伝導性の高い磁性体樹脂１８の第１貫通孔１８ｂに形成された第１スルーホール導体３６Ｂの厚みｔｂよりも厚くされることで、第２スルーホール導体３６Ａと第１スルーホール導体３６Ｂとの放熱バランスが調整されている。 As shown in FIG. 1C, the second through-hole conductor 36A formed in the second through-hole 20a that penetrates the core substrate 30 contacts the second through-hole 20a. The second through-hole conductor 36A includes a second electroless plated film 32 on the second through hole 20a, and a second electrolytic plated film 34 on the second electroless plated film 32. The first through-hole conductor 36B formed in the first through-hole 18b that penetrates the magnetic resin 18 contacts the first through-hole 18b. The first through-hole conductor 36B includes a second electroless plated film 32 on the first through hole 18b and a second electrolytic plated film 34 on the second electroless plated film 32. The thickness ta of the second electroless plated film 32 and the second electrolytic plated film 34 forming the second through-hole conductor 36A is the same as the thickness ta of the second electroless plated film 32 and the second electrolytic plated film 34 forming the first through-hole conductor 36B. It is thicker than the thickness tb with the film 34. The thickness ta of the second through-hole conductor 36A formed in the second through-hole 20a of the insulating base material 20 with low thermal conductivity is the same as that of the second through-hole conductor 36A formed in the first through-hole 18b of the magnetic resin 18 with high thermal conductivity. By making the thickness thicker than the thickness tb of the first through-hole conductor 36B, the heat radiation balance between the second through-hole conductor 36A and the first through-hole conductor 36B is adjusted.

図５は、実施形態の第１スルーホール導体３６Ｂの断面顕微鏡写真である。
中央のＩ字状の部分が第１スルーホール導体３６Ｂ（第２無電解めっき膜３２、第２電解めっき膜３４）である。Ｉ字状の第１スルーホール導体３６Ｂの左側が、磁性体樹脂１８である。磁性体樹脂１８に設けられた第１貫通孔１８ｂ上に第１スルーホール導体３６Ｂが形成されている。Ｉ字状の第１スルーホール導体３６Ｂの右側が樹脂充填剤１６である。磁性体樹脂１８中の丸い粒子は酸化鉄フィラー１７である。樹脂充填剤１６中の丸い粒子は無機フィラー２１である。磁性体樹脂１８の左側が絶縁性基材２０で、磁性体樹脂１８と絶縁性基材２０との境が開口２０ｂである。 FIG. 5 is a cross-sectional micrograph of the first through-hole conductor 36B of the embodiment.
The central I-shaped portion is the first through-hole conductor 36B (second electroless plated film 32, second electrolytic plated film 34). The left side of the I-shaped first through-hole conductor 36B is the magnetic resin 18. A first through-hole conductor 36B is formed above the first through-hole 18b provided in the magnetic resin 18. The resin filler 16 is on the right side of the I-shaped first through-hole conductor 36B. The round particles in the magnetic resin 18 are iron oxide filler 17. The round particles in the resin filler 16 are inorganic fillers 21. The left side of the magnetic resin 18 is an insulating base material 20, and the boundary between the magnetic resin 18 and the insulating base material 20 is an opening 20b.

図６は、図５中の矢印Ａで指示した第１スルーホール導体３６Ｂの中央部分の倍率を上げた断面顕微鏡写真である。第１スルーホール導体３６Ｂと磁性体樹脂１８との界面に存在する黒い部分が樹脂残渣層１９である。樹脂残渣層１９は、磁性体樹脂１８に第１貫通孔１８ｂをドリルで形成する際に、磁性体樹脂から分離した樹脂成分が、再度、磁性体樹脂側に付着した樹脂残渣である。一旦、分離して再付着しているため、磁性体樹脂から剥がれ易い。実施形態の第１スルーホール導体３６Ｂでは、第１貫通孔１８ｂの表面の樹脂残渣層１９は、平均厚みが０．０１μｍ以上、１μｍ以下である。樹脂残渣層１９は、平均厚みが１μｍ以下であるため、樹脂残渣層１９の切れ目が存在する。樹脂残渣層１９の切れ目において第１貫通孔１８ｂの表面から露出する酸化鉄フィラー１７が第１スルーホール導体３６Ｂを形成する金属膜と接し、第１スルーホール導体の信頼性が高くなる。なお、樹脂リッチ層の平均厚みが１μｍを超えると、樹脂リッチ層がほぼ切れ目無く第１貫通孔の全面を覆うことになる。第１スルーホール導体の信頼性が低くなる。 FIG. 6 is a cross-sectional micrograph with increased magnification of the central portion of the first through-hole conductor 36B indicated by arrow A in FIG. The black portion existing at the interface between the first through-hole conductor 36B and the magnetic resin 18 is the resin residue layer 19. The resin residue layer 19 is a resin residue in which a resin component separated from the magnetic resin when forming the first through hole 18b in the magnetic resin 18 with a drill is reattached to the magnetic resin side. Since it is once separated and reattached, it is easy to peel off from the magnetic resin. In the first through-hole conductor 36B of the embodiment, the resin residue layer 19 on the surface of the first through-hole 18b has an average thickness of 0.01 μm or more and 1 μm or less. Since the resin residue layer 19 has an average thickness of 1 μm or less, breaks in the resin residue layer 19 exist. The iron oxide filler 17 exposed from the surface of the first through-hole 18b at the break in the resin residue layer 19 comes into contact with the metal film forming the first through-hole conductor 36B, increasing the reliability of the first through-hole conductor. Note that when the average thickness of the resin-rich layer exceeds 1 μm, the resin-rich layer covers the entire surface of the first through hole almost seamlessly. The reliability of the first through-hole conductor becomes low.

図７は、参考例の第１スルーホール導体３６Ｂの断面顕微鏡写真である。
中央のＩ字状の部分が第１スルーホール導体３６Ｂである。Ｉ字状の第１スルーホール導体３６Ｂの右側が、磁性体樹脂１８である。磁性体樹脂１８に設けられた第１貫通孔１８ｂ上に第１スルーホール導体３６Ｂが形成されている。Ｉ字状の第１スルーホール導体３６Ｂの左側が樹脂充填剤１６である。磁性体樹脂１８中の丸い粒子は酸化鉄フィラー１７である。樹脂充填剤１６中の丸い粒子は無機フィラー２１である。磁性体樹脂１８の右側が絶縁性基材２０で、磁性体樹脂１８と絶縁性基材２０との境が開口２０ｂである。 FIG. 7 is a cross-sectional micrograph of the first through-hole conductor 36B of the reference example.
The central I-shaped portion is the first through-hole conductor 36B. The right side of the I-shaped first through-hole conductor 36B is the magnetic resin 18. A first through-hole conductor 36B is formed above the first through-hole 18b provided in the magnetic resin 18. The left side of the I-shaped first through-hole conductor 36B is the resin filler 16. The round particles in the magnetic resin 18 are iron oxide filler 17. The round particles in the resin filler 16 are inorganic fillers 21. The right side of the magnetic resin 18 is an insulating base material 20, and the boundary between the magnetic resin 18 and the insulating base material 20 is an opening 20b.

図８は、図７中の矢印Ｂで指示した第１スルーホール導体３６Ｂの中央部分の倍率を上げた断面顕微鏡写真である。第１スルーホール導体３６Ｂと磁性体樹脂１８との界面に存在する黒い部分が樹脂残渣層１９である。参考例の第１スルーホール導体３６Ｂでは、第１貫通孔１８ｂの表面の樹脂残渣層１９は、平均厚みが１μｍ以上である。樹脂残渣層１９は、平均厚みが１μｍ以上であるため、第１貫通孔１８ｂの表面から露出する酸化鉄フィラー１７と第１スルーホール導体３６Ｂを形成する金属膜との間に切れ目無く樹脂残渣層１９が介在する。参考例では、第１貫通孔１８ｂから露出する酸化鉄フィラー１７から樹脂残渣層１９と共に第１スルーホール導体３６Ｂを形成する金属膜が剥がれ易く、第１スルーホール導体の信頼性が低い。 FIG. 8 is a cross-sectional micrograph with increased magnification of the central portion of the first through-hole conductor 36B indicated by arrow B in FIG. The black portion existing at the interface between the first through-hole conductor 36B and the magnetic resin 18 is the resin residue layer 19. In the first through-hole conductor 36B of the reference example, the resin residue layer 19 on the surface of the first through-hole 18b has an average thickness of 1 μm or more. Since the resin residue layer 19 has an average thickness of 1 μm or more, the resin residue layer is formed seamlessly between the iron oxide filler 17 exposed from the surface of the first through hole 18b and the metal film forming the first through hole conductor 36B. 19 intervenes. In the reference example, the metal film forming the first through-hole conductor 36B together with the resin residue layer 19 is likely to peel off from the iron oxide filler 17 exposed from the first through-hole 18b, and the reliability of the first through-hole conductor is low.

図１（Ｃ）に示されるように、第２スルーホールランド５８ＦＲＡ及び絶縁性基材２０上の第１導体層５８Ｆは、最下層の銅箔２２と、該銅箔２２上の第１無電解めっき膜２４ｍと、第１無電解めっき膜２４ｍ上の第１電解めっき膜２４ｄと、第１電解めっき膜２４ｄ上の第２無電解めっき膜３２と、第２無電解めっき膜３２上の第２電解めっき膜３４と、該第２電解めっき膜３４上の第３無電解めっき膜３５と、該第３無電解めっき膜３５上の第３電解めっき膜３７とから成る。第１スルーホールランド５８ＦＲＢ及び磁性体樹脂１８上の第１導体層５８Ｆは、最下層の第１無電解めっき膜２４ｍと、第１無電解めっき膜２４ｍ上の第１電解めっき膜２４ｄと、第１電解めっき膜２４ｄ上の第２無電解めっき膜３２と、第２無電解めっき膜３２上の第２電解めっき膜３４と、該第２電解めっき膜３４上の第３無電解めっき膜３５と、該第３無電解めっき膜３５上の第３電解めっき膜３７とから成る。第１無電解めっき膜２４ｍと第１電解めっき膜２４ｄとはシールド層２４を構成する。第２スルーホールランド５８ＦＲＡ及び絶縁性基材２０上の第１導体層５８Ｆの厚みｔＡは、第１スルーホールランド５８ＦＲＢ及び磁性体樹脂１８上の第１導体層５８Ｆの厚みｔＢよりも、銅箔２２の厚み分厚い。伝熱性の低い絶縁性基材２０上に形成された第２スルーホールランド５８ＦＲＡの厚みｔＡは、熱伝導性の高い磁性体樹脂１８上に形成された第１スルーホールランド５８ＦＲＢの厚みｔＢよりも熱伝導率の高い銅箔２２分厚くされることで、第２スルーホール導体３６Ａと第１スルーホール導体３６Ｂとの放熱バランスが調整されている。 As shown in FIG. 1(C), the second through-hole land 58FRA and the first conductor layer 58F on the insulating base material 20 are connected to the bottom copper foil 22 and the first electroless layer on the copper foil 22. The plating film 24m, the first electrolytic plating film 24d on the first electroless plating film 24m, the second electroless plating film 32 on the first electrolytic plating film 24d, and the second electroless plating film 32 on the second electroless plating film 32. It consists of an electrolytic plated film 34, a third electroless plated film 35 on the second electrolytic plated film 34, and a third electrolytic plated film 37 on the third electroless plated film 35. The first conductor layer 58F on the first through-hole land 58FRB and the magnetic resin 18 includes the first electroless plated film 24m at the bottom layer, the first electrolytic plated film 24d on the first electroless plated film 24m, and the first electroless plated film 24d on the first electroless plated film 24m. A second electroless plating film 32 on the first electrolytic plating film 24d, a second electrolytic plating film 34 on the second electroless plating film 32, and a third electroless plating film 35 on the second electrolytic plating film 34. , and a third electrolytic plated film 37 on the third electroless plated film 35. The first electroless plated film 24m and the first electrolytic plated film 24d constitute the shield layer 24. The thickness tA of the first conductor layer 58F on the second through-hole land 58FRA and the insulating base material 20 is thicker than the thickness tB of the first conductor layer 58F on the first through-hole land 58FRB and the magnetic resin 18. 22 thick. The thickness tA of the second through-hole land 58FRA formed on the insulating base material 20 with low thermal conductivity is greater than the thickness tB of the first through-hole land 58FRB formed on the magnetic resin 18 with high thermal conductivity. By making the copper foil 22 with high thermal conductivity thick, the heat radiation balance between the second through-hole conductor 36A and the first through-hole conductor 36B is adjusted.

実施形態のコア基板３０は、図１（Ａ）中に示される磁性体樹脂１８に形成された第１スルーホール導体３６Ｂを介して接続される第１導体層５８Ｆ（接続パターン５８ＦＬ）、第２導体層５８Ｓ（接続パターン５８ＳＬ）とは、ヘリカル状（コア基板の表裏面に対して平行方向の軸線上に沿って螺旋状）に配置され、第１スルーホール導体３６Ｂと共にインダクタ５９を形成する。 The core board 30 of the embodiment includes a first conductor layer 58F (connection pattern 58FL) connected via a first through-hole conductor 36B formed in the magnetic resin 18 shown in FIG. The conductor layer 58S (connection pattern 58SL) is arranged in a helical shape (spiral along an axis parallel to the front and back surfaces of the core substrate), and forms an inductor 59 together with the first through-hole conductor 36B.

実施形態のインダクタ内蔵基板１０は、コア基板３０の表面に第１導体層５８Ｆと第２導体層５８Ｓとが形成され、第１導体層５８Ｆと第２導体層５８Ｓとを接続する第１スルーホール導体３６Ｂは、磁性体樹脂１８を貫通する第１貫通孔１８ｂに直接形成されている。このため、インダクタ内蔵基板１０中の磁性体の割合が大きくなり、インダクタンスを大きくすることができる。 In the inductor-embedded board 10 of the embodiment, a first conductor layer 58F and a second conductor layer 58S are formed on the surface of the core board 30, and a first through hole connects the first conductor layer 58F and the second conductor layer 58S. The conductor 36B is formed directly in the first through hole 18b that penetrates the magnetic resin 18. Therefore, the proportion of magnetic material in the inductor built-in substrate 10 increases, and the inductance can be increased.

[実施形態のインダクタ内蔵基板の製造方法]
図２～図４に実施形態のインダクタ内蔵基板の製造方法が示される。
絶縁性基材２０の両面に銅箔２２の積層された銅張り積層板から成る基板２０ｚが準備される（図２（Ａ））。絶縁性基材２０に磁性体樹脂充填用の開口２０ｂが形成される（図２（Ｂ））。開口２０ｂ内に６０重量％～９０重量％の酸化鉄フィラー（磁性粒子）とエポキシ樹脂からなる樹脂ペーストが真空印刷される。樹脂ペーストが、樹脂ペーストの粘度が常温の２倍以下となる温度で仮硬化（半硬化）され仮硬化磁性体樹脂１８βが形成される（図２（Ｃ））。 [Method for manufacturing the inductor built-in board of the embodiment]
2 to 4 show a method of manufacturing an inductor-embedded substrate according to an embodiment.
A substrate 20z made of a copper-clad laminate in which copper foil 22 is laminated on both sides of an insulating base material 20 is prepared (FIG. 2(A)). An opening 20b for filling with magnetic resin is formed in the insulating base material 20 (FIG. 2(B)). A resin paste consisting of 60% to 90% by weight iron oxide filler (magnetic particles) and epoxy resin is vacuum printed in the opening 20b. The resin paste is temporarily hardened (semi-hardened) at a temperature at which the viscosity of the resin paste is less than twice that of room temperature to form a temporarily hardened magnetic resin 18β (FIG. 2(C)).

絶縁性基材２０の表面、開口２０ｂから露出する仮硬化磁性体樹脂１８βの表面に無電解めっき処理で第１無電解めっき膜２４ｍと、電解めっき処理で第１電解めっき膜２４ｄが形成される（図２（Ｄ））。第１無電解めっき膜２４ｍと第１電解めっき膜２４ｄとはシールド層２４を構成する。 A first electroless plated film 24m is formed by electroless plating on the surface of the insulating base material 20 and the surface of the temporarily hardened magnetic resin 18β exposed from the opening 20b, and a first electrolytic plated film 24d is formed by electrolytic plating. (Figure 2(D)). The first electroless plated film 24m and the first electrolytic plated film 24d constitute the shield layer 24.

絶縁性基材２０にドリル加工で第２貫通孔２０ａが形成される（図２（Ｅ））。この後、薬液により第２貫通孔２０ａがデスミア処理され、第２貫通孔２０ａの側壁に付着した樹脂残渣から成る樹脂リッチ層が除去される。樹脂リッチ層の平均厚みが０．５μｍ以下にされる。デスミア処理の際に、第１無電解めっき膜２４ｍと第１電解めっき膜２４ｄとから成るシールド層２４で覆われた仮硬化磁性体樹脂１８βは、薬液の影響を受けない。仮硬化磁性体樹脂１８βの表面の酸化鉄フィラーは、デスミア処理の影響を受けない。 A second through hole 20a is formed in the insulating base material 20 by drilling (FIG. 2(E)). Thereafter, the second through hole 20a is desmeared using a chemical solution, and the resin rich layer made of resin residue adhering to the side wall of the second through hole 20a is removed. The average thickness of the resin-rich layer is set to 0.5 μm or less. During the desmear process, the temporarily hardened magnetic resin 18β covered with the shield layer 24 made up of the first electroless plated film 24m and the first electrolytic plated film 24d is not affected by the chemical solution. The iron oxide filler on the surface of the temporarily hardened magnetic resin 18β is not affected by the desmear treatment.

仮硬化磁性体樹脂１８βにドリル加工で第１貫通孔１８ｂが形成される。ドリル加工には、絶縁性基材２０に第２貫通孔２０ａを形成した同じドリルが用いられる。ドリル回転数を下げることで、第１貫通孔１８ｂの表面に付着する樹脂リッチ層（樹脂残渣）の平均厚みが薄くされる。この実施形態では、６０重量％～９０重量％の酸化鉄フィラーを含むため、本硬化後の孔開けは容易ではないが、本硬化前に形成するため、貫通孔を容易に形成することができる。仮硬化状態の仮硬化磁性基材の磁性材層を加熱して含まれる樹脂を架橋させ、本硬化状態にして磁性体樹脂１８が形成される（図３（Ａ））。ここでは、１５０゜Ｃ～１９０゜Ｃで１時間加熱する。高圧水洗により、孔開け時の加工スミアが取り除かれる（図３（Ｂ））。通常、デスミアはアルカリ性薬剤で行われるが、アルカリ性薬剤は樹脂を膨潤・剥離する過程で磁性体樹脂１８に含まれる酸化鉄フィラーを脱落させる恐れがあるため、ここでは高圧水洗が行われる。更に、Ｏ2プラズマを用いるドライデスミアで、図６に示されたように第１貫通孔１８ｂの表面の樹脂残渣層１９は、平均厚み１μｍ以下にされる。ここで、ドライデスミアを用いても、樹脂残渣層１９の平均厚みを０．０１μｍ未満にすることはできない。第１貫通孔１８ｂの表面の樹脂残渣層１９の平均厚みは、薬液処理で樹脂リッチ層が除去される第２貫通孔２０ａの表面の樹脂リッチ層の平均厚みよりも厚い。絶縁性基材２０、磁性体樹脂１８の表面の第１電解めっき膜２４ｄ上、第２貫通孔２０ａ、第１貫通孔１８ｂの表面に、無電解めっき処理で第２無電解めっき膜３２と、電解めっき処理で第２電解めっき膜３４が形成される。第２無電解めっき膜３２と第２電解めっき膜３４とで、第２貫通孔２０ａに第２スルーホール導体３６Ａが、第１貫通孔１８ｂに第１スルーホール導体３６Ｂが形成される（図３（Ｃ））。 A first through hole 18b is formed in the temporarily hardened magnetic resin 18β by drilling. For drilling, the same drill that formed the second through hole 20a in the insulating base material 20 is used. By lowering the drill rotation speed, the average thickness of the resin-rich layer (resin residue) adhering to the surface of the first through hole 18b is reduced. In this embodiment, since the iron oxide filler is contained in an amount of 60% to 90% by weight, it is not easy to make holes after the main curing, but since the holes are formed before the main curing, the through holes can be easily formed. . The magnetic material layer of the temporarily hardened magnetic base material in a temporarily hardened state is heated to crosslink the resin contained therein, and brought into a fully hardened state to form the magnetic resin 18 (FIG. 3(A)). Here, it is heated at 150°C to 190°C for 1 hour. Processing smear from drilling is removed by high-pressure water washing (Figure 3(B)). Desmearing is usually performed using an alkaline chemical, but since the alkaline chemical may cause the iron oxide filler contained in the magnetic resin 18 to fall off during the process of swelling and peeling off the resin, high-pressure water washing is performed here. Further, by dry desmearing using O2 plasma, the resin residue layer 19 on the surface of the first through hole 18b is reduced to an average thickness of 1 μm or less, as shown in FIG. Here, even if dry desmear is used, the average thickness of the resin residue layer 19 cannot be made less than 0.01 μm. The average thickness of the resin residue layer 19 on the surface of the first through hole 18b is thicker than the average thickness of the resin rich layer on the surface of the second through hole 20a from which the resin rich layer is removed by chemical treatment. On the first electrolytic plated film 24d on the surface of the insulating base material 20 and the magnetic resin 18, and on the surfaces of the second through hole 20a and the first through hole 18b, a second electroless plated film 32 is formed by electroless plating treatment, A second electrolytic plated film 34 is formed by electrolytic plating. A second through-hole conductor 36A is formed in the second through-hole 20a and a first through-hole conductor 36B is formed in the first through-hole 18b by the second electroless plating film 32 and the second electrolytic plating film 34 (FIG. 3). (C)).

第２貫通孔２０ａに形成された第２スルーホール導体３６Ａ内、第１貫通孔１８ｂに形成された第１スルーホール導体３６Ｂ内に樹脂充填剤１６が充填され、絶縁性基材２０の表面が研磨される（図３（Ｄ））。第２電解めっき膜３４上、及び、樹脂充填剤１６の露出面に無電解めっきにより第３無電解めっき膜３５が形成され、第３無電解めっき膜３５上に第３電解めっき膜３７が形成される（図４（Ａ））。第３電解めっき膜３７上に所定パターンのエッチングレジスト５４が形成される（図４（Ｂ））。 The resin filler 16 is filled in the second through-hole conductor 36A formed in the second through-hole 20a and the first through-hole conductor 36B formed in the first through-hole 18b, so that the surface of the insulating base material 20 is Polished (FIG. 3(D)). A third electroless plating film 35 is formed on the second electrolytic plating film 34 and the exposed surface of the resin filler 16 by electroless plating, and a third electrolytic plating film 37 is formed on the third electroless plating film 35. (Fig. 4(A)). An etching resist 54 having a predetermined pattern is formed on the third electrolytic plated film 37 (FIG. 4(B)).

エッチングレジスト５４から露出する第３電解めっき膜３７、第３無電解めっき膜３５、第２電解めっき膜３４、第２無電解めっき膜３２、第１電解めっき膜２４ｄ、第１無電解めっき膜２４ｍ、銅箔２２が除去された後、エッチングレジストが除去され、第１導体層５８Ｆ、第２導体層５８Ｓが形成され、コア基板３０が完成する（図４（Ｃ））。絶縁性基材２０上の第１導体層５８Ｆ、第２導体層５８Ｓ、第２スルーホール導体３６Ａの第１面Ｆ側の第２スルーホールランド５８ＦＲＡ及び第２面Ｓ側の第２スルーホールランド５８ＳＲＡは、最下層の銅箔２２と、該銅箔２２上の第１無電解めっき膜２４ｍと、第１無電解めっき膜２４ｍ上の第１電解めっき膜２４ｄと、第１電解めっき膜２４ｄ上の第２無電解めっき膜３２と、第２無電解めっき膜３２上の第２電解めっき膜３４と、該第２電解めっき膜３４上の第３無電解めっき膜３５と、該第３無電解めっき膜３５上の第３電解めっき膜３７とから成る。磁性体樹脂１８上の第１導体層５８Ｆ、第２導体層５８Ｓ、第１スルーホール導体３６Ｂの第１面Ｆ側の第１スルーホールランド５８ＦＲＢ及び第２面Ｓ側の第１スルーホールランド５８ＳＲＢは、第１無電解めっき膜２４ｍと、第１無電解めっき膜２４ｍ上の第１電解めっき膜２４ｄと、第１電解めっき膜２４ｄ上の第２無電解めっき膜３２と、第２無電解めっき膜３２上の第２電解めっき膜３４と、該第２電解めっき膜３４上の第３無電解めっき膜３５と、該第３無電解めっき膜３５上の第３電解めっき膜３７とから成る。 The third electrolytic plated film 37, the third electroless plated film 35, the second electrolytic plated film 34, the second electroless plated film 32, the first electrolytic plated film 24d, and the first electroless plated film 24m exposed from the etching resist 54 After the copper foil 22 is removed, the etching resist is removed, and a first conductor layer 58F and a second conductor layer 58S are formed, completing the core substrate 30 (FIG. 4(C)). The first conductor layer 58F, the second conductor layer 58S, and the second through-hole land 58FRA on the first surface F side and the second through-hole land on the second surface S side of the second through-hole conductor 36A on the insulating base material 20 58SRA includes the lowest layer copper foil 22, the first electroless plating film 24m on the copper foil 22, the first electrolytic plating film 24d on the first electroless plating film 24m, and the first electrolytic plating film 24d on the first electroless plating film 24m. a second electroless plated film 32, a second electrolytic plated film 34 on the second electroless plated film 32, a third electroless plated film 35 on the second electrolytic plated film 34, and a second electroless plated film 34 on the second electroless plated film 32; It consists of a third electrolytic plated film 37 on a plated film 35. The first conductor layer 58F, the second conductor layer 58S, and the first through-hole land 58FRB on the first surface F side and the first through-hole land 58SRB on the second surface S side of the first through-hole conductor 36B on the magnetic resin 18. are the first electroless plating film 24m, the first electrolytic plating film 24d on the first electroless plating film 24m, the second electroless plating film 32 on the first electrolytic plating film 24d, and the second electroless plating film 24m. It consists of a second electrolytic plated film 34 on the membrane 32, a third electroless plated film 35 on the second electrolytic plated film 34, and a third electrolytic plated film 37 on the third electroless plated film 35.

コア基板３０上に公知の製造方法により、上側のビルドアップ層４５０Ｆ、下側のビルドアップ層４５０Ｓ、ソルダーレジスト層４７０Ｆ、４７０Ｓ、半田バンプ４７６Ｆ、４７６Ｓが形成される（図１（Ａ））。 An upper buildup layer 450F, a lower buildup layer 450S, solder resist layers 470F, 470S, and solder bumps 476F, 476S are formed on the core substrate 30 by a known manufacturing method (FIG. 1(A)).

実施形態のインダクタ内蔵基板の製造方法では、磁性体樹脂１８の第１貫通孔１８ｂに第２無電解めっき膜３２、第２電解めっき膜３４からなる第１スルーホール導体３６Ｂを形成するため、インダクタ内蔵基板１０の磁性体樹脂１８の体積を大きくし、インダクタンスを大きくすることができる。磁性体樹脂１８上に第１スルーホール導体３６Ｂが直接設けられるが、樹脂リッチ層の平均厚みが１μｍ以下であるため、第１スルーホール導体の信頼性が低下しない。 In the method for manufacturing an inductor-embedded substrate according to the embodiment, in order to form the first through-hole conductor 36B made of the second electroless plating film 32 and the second electrolytic plating film 34 in the first through hole 18b of the magnetic resin 18, the inductor The volume of the magnetic resin 18 of the built-in board 10 can be increased, and the inductance can be increased. Although the first through-hole conductor 36B is provided directly on the magnetic resin 18, since the average thickness of the resin-rich layer is 1 μm or less, the reliability of the first through-hole conductor does not decrease.

１０ インダクタ内蔵基板
１８ 磁性体樹脂
１８ｂ 第１貫通孔
１９ 樹脂残渣層
２０ コア基板
２０ａ 第１貫通孔
２０ａ 開口
２２ 銅箔
３０ コア基板
３６Ａ 第２スルーホール導体
３６Ｂ 第１スルーホール導体 10 Inductor built-in board 18 Magnetic resin 18b First through hole 19 Resin residue layer 20 Core board 20a First through hole 20a Opening 22 Copper foil 30 Core board 36A Second through hole conductor 36B First through hole conductor

Claims (2)

開口が形成されたコア基板と、
前記開口内に充填され、第１貫通孔を有する磁性体樹脂と、
前記第１貫通孔に形成された金属膜から成る第１スルーホール導体と、を有するインダクタ内蔵基板であって、
前記磁性体樹脂は６０重量％以上の酸化鉄フィラーを含有し、
前記第１貫通孔の表面に平均厚みが０．０１μｍ以上、１μｍ以下の樹脂残渣層が形成され、
さらに、前記コア基板に形成された第２貫通孔と、前記第２貫通孔に形成された金属膜から成る第２スルーホール導体を有し、
前記第２貫通孔の表面に樹脂残渣層が形成され、
前記第１貫通孔の前記樹脂残渣層の厚みは、前記第２貫通孔の前記樹脂残渣層の厚みよりも厚い。 a core substrate with an opening formed therein;
a magnetic resin filled in the opening and having a first through hole;
An inductor-embedded substrate having a first through-hole conductor made of a metal film formed in the first through-hole,
The magnetic resin contains 60% by weight or more of iron oxide filler,
A resin residue layer having an average thickness of 0.01 μm or more and 1 μm or less is formed on the surface of the first through hole,
further comprising a second through hole formed in the core substrate and a second through hole conductor made of a metal film formed in the second through hole;
A resin residue layer is formed on the surface of the second through hole,
The thickness of the resin residue layer in the first through hole is thicker than the thickness of the resin residue layer in the second through hole. 請求項１のインダクタ内蔵基板であって、
前記第１貫通孔の表面の前記樹脂残渣層の切れ目から露出する酸化鉄フィラーは、前記第１貫通孔に形成される金属膜と接している。 The inductor built-in substrate according to claim 1 ,
The iron oxide filler exposed through the cut in the resin residue layer on the surface of the first through hole is in contact with the metal film formed in the first through hole.
JP2019081007A 2019-04-22 2019-04-22 Inductor built-in board Active JP7368693B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP2019081007A JP7368693B2 (en) 2019-04-22 2019-04-22 Inductor built-in board

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2019081007A JP7368693B2 (en) 2019-04-22 2019-04-22 Inductor built-in board

Publications (2)

Publication Number Publication Date
JP2020178096A JP2020178096A (en) 2020-10-29
JP7368693B2 true JP7368693B2 (en) 2023-10-25

Family

ID=72936218

Family Applications (1)

Application Number Title Priority Date Filing Date
JP2019081007A Active JP7368693B2 (en) 2019-04-22 2019-04-22 Inductor built-in board

Country Status (1)

Country Link
JP (1) JP7368693B2 (en)

Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007129526A1 (en) 2006-05-08 2007-11-15 Ibiden Co., Ltd. Inductor and electric power source using same
WO2018194099A1 (en) 2017-04-19 2018-10-25 味の素株式会社 Resin composition

Patent Citations (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2007129526A1 (en) 2006-05-08 2007-11-15 Ibiden Co., Ltd. Inductor and electric power source using same
WO2018194099A1 (en) 2017-04-19 2018-10-25 味の素株式会社 Resin composition

Also Published As

Publication number Publication date
JP2020178096A (en) 2020-10-29

Similar Documents

Publication Publication Date Title
CN111834093B (en) Inductor built-in substrate
US20220181064A1 (en) Inductor built-in substrate and method for manufacturing the same
US20130081866A1 (en) Printed wiring board
JP2021086856A (en) Inductor built-in board and manufacturing method thereof
JP5505433B2 (en) Printed wiring board
US11856699B2 (en) Inductor built-in substrate
US20210183562A1 (en) Inductor built-in substrate
US11291118B2 (en) Inductor built-in substrate
US11521786B2 (en) Inductor built-in substrate
JP7368693B2 (en) Inductor built-in board
JP4315580B2 (en) Printed wiring board and printed wiring board manufacturing method
US11749444B2 (en) Inductor built-in substrate
US11322301B2 (en) Method for manufacturing inductor built-in substrate
JP2020178095A (en) Inductor built-in substrate and manufacturing method thereof
JP2005123547A (en) Interposer and multilayer printed wiring board
JP2021097130A (en) Inductor built-in substrate and manufacturing method thereof
JP2022108350A (en) Manufacturing method of inductor built-in substrate
JPH10173296A (en) Manufacture of printed wiring board
JP4437361B2 (en) Printed wiring board and printed wiring board manufacturing method
JP2020178097A (en) Manufacturing method of inductor built-in substrate
JP2021150435A (en) Inductor built-in substrate
JP2020150094A (en) Printed wiring board and manufacturing method thereof
JP2021097128A (en) Inductor built-in substrate
JP2019129278A (en) Manufacturing method of inductor component, the inductor component, and wiring board with built-in component
JP2021150436A (en) Inductor built-in substrate

Legal Events

Date Code Title Description
A621 Written request for application examination

Free format text: JAPANESE INTERMEDIATE CODE: A621

Effective date: 20220323

A977 Report on retrieval

Free format text: JAPANESE INTERMEDIATE CODE: A971007

Effective date: 20230216

A131 Notification of reasons for refusal

Free format text: JAPANESE INTERMEDIATE CODE: A131

Effective date: 20230307

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230407

A02 Decision of refusal

Free format text: JAPANESE INTERMEDIATE CODE: A02

Effective date: 20230711

A521 Request for written amendment filed

Free format text: JAPANESE INTERMEDIATE CODE: A523

Effective date: 20230713

A911 Transfer to examiner for re-examination before appeal (zenchi)

Free format text: JAPANESE INTERMEDIATE CODE: A911

Effective date: 20230724

TRDD Decision of grant or rejection written
A01 Written decision to grant a patent or to grant a registration (utility model)

Free format text: JAPANESE INTERMEDIATE CODE: A01

Effective date: 20230912

A61 First payment of annual fees (during grant procedure)

Free format text: JAPANESE INTERMEDIATE CODE: A61

Effective date: 20230925

R150 Certificate of patent or registration of utility model

Ref document number: 7368693

Country of ref document: JP

Free format text: JAPANESE INTERMEDIATE CODE: R150