JP7292455B1 - Aggregate substrate and manufacturing method - Google Patents

Abstract

An object of the present invention is to obtain an aggregate substrate and a manufacturing method that can improve the recognizability of an image of a target mark with a simple structure. A base material (11) for collectively forming a plurality of bases, an insulating layer material (13) provided on the base material (11), and a plurality of circuit patterns (17) provided on the insulating layer material (13) are assembled. A set circuit pattern 15, a colored protective film 19 provided on the circuit pattern 17 with a colored protective material, a target mark 23 for image recognition provided on the insulating layer material 13, and a colored protective material on the target mark 23. A colored film 9 having a color tone that enables image recognition with respect to the insulating layer material 13 is provided. [Selection drawing] Fig. 2

Description

TECHNICAL FIELD The present invention relates to an aggregate board in which a plurality of circuit boards having circuit patterns on bases with insulating layers interposed therebetween and a method for manufacturing the same.

As a conventional aggregate substrate, there is a metal base substrate described in Patent Document 1. This metal base board is formed by assembling a plurality of circuit boards and has a V-shaped groove for dividing the circuit boards.

The V-shaped grooves are formed, for example, by V-cutting from both sides of the metal base board so that the circuit board can be easily folded and separated from the metal base board by hand.

It is essential to accurately form this V-groove in order to obtain a high-quality circuit board. For this reason, the collective substrate may have a target mark for detecting the formation position of the V-shaped groove by image recognition.

By recognizing the image of the target mark, it is possible to detect the forming position of the V-shaped groove and form the V-shaped groove accurately.

However, since the target marks are provided on the insulating layer in the discarded board portion of the collective substrate, there is a problem that the image recognizability with respect to the insulating layer deteriorates depending on the color tone.

Such problems may also occur in other target marks provided on the insulating layer.

JP-A-2016-63201

The problem to be solved is that the image recognizability of the target marks on the insulating layer is degraded.

The present invention relates to an assembly board in which a plurality of circuit boards are assembled, each of which has a circuit pattern on a base with an insulating layer interposed therebetween and the surface of the circuit pattern is plated with a white color , the plurality of circuit boards. a plate-like base material that constitutes the base of; a white insulating layer material that is provided on the base material and constitutes the insulating layers of the plurality of circuit boards; and a plurality of the insulating layer materials that are provided on the insulating layer material A colored protective film formed of a set circuit pattern in which a plurality of the circuit patterns of the circuit board are assembled, and a colored protective material provided on the circuit pattern and having a color tone that enables image recognition with respect to the insulating layer by binarization. and a target mark for image recognition provided on the insulating layer material with the same conductive material as the circuit pattern , and a target mark provided on the target mark and formed with the colored protective material against the insulating layer material and a colored film having a color tone that enables image recognition by using an aggregate substrate.

The present invention provides a manufacturing method for manufacturing the aggregate substrate, which comprises a colored film forming step of forming a colored protective film for the circuit pattern and a colored film for the target marks with the colored protective material. A manufacturing method is provided.

The aggregate substrate of the present invention can improve the image recognizability of the target marks on the white insulating layer material that constitutes the insulating layer with the colored film. Moreover, since the colored film is made of the same colored protective material as the colored protective film of the circuit pattern, the structure can be simplified.

According to the method for manufacturing an aggregate substrate of the present invention, a colored film can be easily formed on a target mark using a colored protective material made of the same material as the colored protective film of the circuit pattern. Moreover, it is possible to recognize the deviation of the colored protective film formed together with the circuit pattern from the deviation of the colored film with respect to the target mark.

FIG. 1 is a plan view of an aggregate substrate according to Example 1 of the present invention. FIG. 2 is a schematic cross-sectional view showing an enlarged part of the collective substrate of FIG. FIG. 3A is a schematic plan view showing an enlarged target mark of the collective substrate of FIG. 1, and FIG. 3B is a schematic plan view showing an enlarged target mark of the collective substrate according to a comparative example. . FIG. 4 is a schematic cross-sectional view of a circuit board according to an example. FIG. 5 is a flow chart showing the manufacturing process of the aggregate substrate according to the embodiment. FIG. 6 is a flow chart of the manufacturing process of the collective substrate following FIG. 7A to 7E are schematic cross-sectional views showing the manufacturing process of FIG. 5, showing pattern formation, etching, alkali peeling, solder resist formation, and silk printing, respectively.

According to the present invention, image recognition of target marks on an insulating layer is realized by an aggregate substrate having a simple structure.

The collective board 1 is a collection of a plurality of circuit boards 5 each having a circuit pattern 17 on a base 11a with an insulating layer 13a interposed therebetween. This aggregate substrate 1 includes a base material 11 , an insulating layer material 13 , an aggregate circuit pattern 17 , a colored protective film 19 , target marks 23 and a colored film 9 .

The base material 11 constitutes the bases 11 a of the plurality of circuit boards 5 . The insulating layer material 13 is provided on the base material 11 and constitutes the insulating layers 13 a of the plurality of circuit boards 5 . The aggregate circuit pattern 17 is provided on the insulating layer material 13 and is an aggregate of a plurality of circuit patterns 17 of a plurality of circuit boards 5 . The colored protective film 19 is provided on the circuit pattern 17 and made of a colored protective material. The target mark 23 is for image recognition provided on the insulating layer material 13 . The colored film 9 is provided on the target mark 23 and formed of a colored protective material, and has a color tone that enables image recognition with respect to the insulating layer material 13 .

The target mark 23 may be made of the same conductive material as the circuit pattern 17 .

The colored film 9 is provided on the surface of the target mark 23 and may have the same planar shape as this surface.

The colored protective material may be a solder resist.

The manufacturing method of the collective substrate 1 includes a colored film forming step of forming the colored protective film 19 of the circuit pattern 17 and the colored film 9 of the target mark 23 with a colored protective material.

Further, the method for manufacturing the aggregate substrate 1 may include a circuit forming step of forming the aggregate circuit pattern 17 and the plurality of target marks 23 on the base material 11 with the insulating layer material 13 interposed therebetween.

[Collective board]
FIG. 1 is a plan view of an aggregate substrate according to an embodiment of the present invention. FIG. 2 is a schematic cross-sectional view showing an enlarged part of the collective substrate of FIG. FIG. 3A is a schematic plan view showing an enlarged target mark of the collective substrate of FIG. 1, and FIG. 3B is a schematic plan view showing an enlarged target mark of the collective substrate according to a comparative example. . FIG. 4 is a schematic cross-sectional view of a circuit board according to an example.

In the following description, the layer direction means the stacking direction of the collective substrate. A layer crossing direction means a direction (surface direction) along the surface of the aggregate substrate. "Up" means above the direction of gravity when the collective substrate is placed horizontally. Below means below in the direction of gravity when the collective substrate is placed horizontally.

As shown in FIGS. 1 and 2, the board assembly 1 includes a plurality of circuit boards 5 assembled inside a surrounding discarded board portion Wa. The circuit board 5 of the collective board 1 is partitioned into a lattice by dividing lines 3 formed of V-shaped grooves, and can be divided by manually bending along the dividing lines 3 or the like.

In this embodiment, two collective substrates 1 are formed on one work W. As shown in FIG. However, the number of collective substrates 1 formed for the work W is arbitrary. The plurality of circuit boards 5 in the collective board 1 may be of the same type or of different types.

The dividing line 3 may be formed by a groove having a different cross-sectional shape, a V-shaped groove provided intermittently, or a slit for partially separating the adjacent circuit board 5, as long as it can divide the circuit board 5. It is possible.

Each aggregate substrate 1 is constructed by laminating an aggregate circuit pattern 15 on a base material 11 with an insulating layer material 13 interposed therebetween.

The base material 11 is for forming the bases 11a of the plurality of circuit boards 5, and has a size corresponding to the number of the bases 11a and a size including the discarded board portion Wa. The base material 11 of this embodiment has a size corresponding to the number of the bases 11a of the two collective substrates 1 in the work W and the total size of the scrap plate portion Wa.

The planar shape of the base member 11 is rectangular in accordance with the workpiece W. As shown in FIG. However, the planar shapes of the work W and the base member 11 may be other shapes such as a circle.

The base material 11 can be made of metal, resin, or the like. When the base material 11 is made of metal, for example, aluminum, iron, copper, an aluminum alloy, stainless steel, or the like can be used. In this case, the base material 11 may further contain a non-metal such as carbon. Also, the base material 11 may be a clad material or the like.

The thickness of the base material 11 in the layer direction is set within a range of 1.0 to 3.0 mm, for example.

The insulating layer material 13 is provided on the base material 11 by being laminated on the surface of the base material 11 . The planar shape of the insulating layer material 13 is the same as that of the base material 11 . The insulating layer material 13 constitutes the insulating layers 13 a of the plurality of circuit boards 5 . In the aggregate substrate 1, the insulating layer material 13 serves to electrically insulate the aggregate circuit pattern 15 from the base material 11, and also serves as an adhesive to bond them together.

The thickness of the insulating layer material 13 in the layer direction is set to 100 to 150 μm, for example. The insulating layer material 13 is made of resin and has white color in this embodiment. However, depending on the material, the insulating layer material 13 may have other color tones. The resin constituting the insulating layer material 13 can be composed of an epoxy resin, a cyanate resin, or the like.

Epoxy resins are combined with, for example, amine-based curing agents, phenol-based curing agents, acid anhydride-based curing agents, and imidazole-based curing agents. The cyanate resin is combined with, for example, dicyandiamide or phenol resin as a curing agent. Alternatively, the insulating layer material 13 may be made of liquid crystal polymer such as wholly aromatic polyester, which is a thermoplastic resin, or other thermoplastic resin.

Moreover, it is preferable that the insulating layer material 13 further contains an inorganic filler. The inorganic filler preferably has excellent electrical insulation and high thermal conductivity, and examples thereof include alumina, silica, aluminum nitride, boron nitride, silicon nitride, and magnesium oxide. A seed or two or more are used.

The filling rate of the inorganic filler in the insulating layer material 13 can be appropriately set according to the type of the inorganic filler. For example, based on the total volume of the matrix resin contained in the insulating layer material 13, it is preferably 85% by volume or less, more preferably 30 to 85% by volume.

The insulating layer material 13 may further contain, for example, a coupling agent, a dispersant, etc., in addition to the matrix resin and the inorganic filler described above.

The material and the like of the insulating layer material 13 can be set according to the specifications of the circuit board 5, and a semi-cured insulating sheet can also be used.

The assembly circuit pattern 15 is provided on the insulating layer material 13, and is formed by gathering circuit patterns 17 for a plurality of circuit boards 5, which will be described later, in a grid pattern. Each circuit pattern 17 is formed on the surface of the insulating layer material 13 .

The circuit pattern 17 has a pattern of a plurality of circuit conductors 17a made of a conductive material. The conductive material may be any material for circuits such as copper foil. The pattern configuration of the plurality of circuit conductors 17 a of each circuit pattern 17 can be set according to the specifications of the circuit board 5 .

The thickness of the circuit conductor 17a in the layer direction is selected within a range of 1.0 to 3.0 mm, for example. However, the thickness, material, etc. of the circuit conductor 17a in the layer direction can be selected outside the above range depending on the specifications of the circuit board 5. FIG.

The surface of the circuit pattern 17 is plated with whitish Ni, and has a color tone that makes image processing of the insulating layer material 13 difficult. This circuit pattern 17 is provided with a colored protective film 19 .

The colored protective film 25 is formed of a colored protective material on the circuit pattern 17 . The colored protective film 25 made of the solder resist is a green insulating film and protects the circuit pattern 17 .

In other words, the colored protective film 25 protects the circuit pattern 17 to maintain insulation, protects the circuit pattern 17 from dust, heat, moisture, etc., and prevents solder from sticking to unnecessary parts and short-circuiting when electronic components are mounted. It functions as a preventive measure.

The colored protective film 25 may have another color tone such as black, and may be formed of other resins than the solder resist.

A silk print 20 is applied to the colored protective film 19 . The silk print 20 displays information such as the model name, manufacturer name, and the position of electronic components.

As shown in FIG. 1, the circuit boards 5 for each circuit pattern 17 are partitioned in a grid pattern by the partition lines 3 on the collective substrate 1 as described above.

When the division lines 3 are formed in a grid pattern, a plurality of X division lines 3a along one direction (hereinafter referred to as "X direction") and the other direction orthogonal to the one direction (hereinafter referred to as "Y direction") ) has a plurality of Y dividing lines 3b. The plurality of X dividing lines 3a are linearly formed and parallel to each other, and the plurality of Y dividing lines 3b are linearly formed and parallel to each other.

A processing mark 21 is provided corresponding to the position of the end of the dividing line 3 . Note that the processing marks 21 may be omitted.

The position of the end of the division line 3 is the position that is serially adjacent to the end of the X division line 3a in the X direction. In the Y direction, the position is serially adjacent to the end of the Y dividing line 3b. This position is a position in contact with the Y dividing line 3b at the end of the X dividing line 3a and the X dividing line 3a at the end of the Y dividing line 3b, or a position with a slight gap.

The processing marks 21 are formed on the surface of the insulating layer material 13 on the waste board portion Wa of the work W. As shown in FIG. This processing mark 21 is indicated by two short parallel lines, and a V-shaped groove is processed so that the straight dividing line 3 is positioned between the parallel lines. The processing marks 21 are for recognizing the positions of the dividing lines 3, and enable confirmation of displacement of the processed dividing lines 3 and the like.

Target marks 23 for image recognition are provided corresponding to the processing marks 21, respectively. A target mark 23 is provided on the insulating layer material 13 . In this embodiment, the target mark 23 is positioned on the scrap plate portion Wa of the work W. As shown in FIG. However, the target mark 23 can also be positioned on a predetermined circuit board 5 .

The target mark 23 is formed on the surface of the insulating layer material 13 of the plate portion Wa with a conductive material having the same material and thickness as the circuit pattern 17 . However, the surface of the target mark 23 is not Ni-plated. Also, the target mark 23 may be made of a different material from that of the circuit pattern 17 and have a different thickness.

Such target marks 23 serve as a reference for determining the positions for forming the dividing lines 3 by image recognition when the collective substrate 1 is manufactured. Although the planar shape of the target mark 23 is circular, any shape may be used as long as it serves as a reference when forming the dividing line 3 by image recognition. As far as this is concerned, the shape and size of the target mark 23 can be set arbitrarily.

The position of the target mark 23 can also be arbitrarily set, but is determined relative to the position where the division line 3 is formed, the processing mark 21, and the like. This target mark 23 is preferably arranged near the processing mark 21 . A position near the processing mark 21 is a region adjacent to the end of the dividing line 3 .

On the target mark 23, as shown in FIG. 3A, a colored film 9 made of a colored protective material and having a color tone that enables image recognition with respect to the insulating layer material 13 is provided. FIG. 3B is a comparative example, in which the target mark 23 is plated with Ni in the same manner as the circuit pattern 17 and does not have a colored film.

The colored film 9 is formed together with a colored protective film 19 of solder resist on the circuit board 5 . That is, the colored film 9 is made of the same colored protective material as the colored protective film 19 and is formed together with the colored protective film 19 . As a result, the colored film 9 colors the surface of the target mark 23 with the same green color tone as the colored protective film 19 .

The colored film 9 may have any color tone as long as it enables image recognition of the target marks 23 with respect to the insulating layer material 13, and the color tone can be set arbitrarily. In this embodiment, it is preferable that the insulating layer material 13 and the target marks 23 have color tones that are different in lightness because the target marks 23 are subjected to image recognition by binarization processing.

Also, the colored film 9 is provided on the entire surface of the target mark 23 . That is, the colored film 9 is provided on the surface of the target mark 23 and has the same planar shape as this surface. However, the colored film 9 only needs to distinguish the target mark 23 from the surface of the insulating layer material 13 by image recognition. It is also possible to make a shape or the like that is located only in the central part of the . Also, the planar shape of the colored film 9 is the same circular shape as the target mark 23, but may be another geometric shape.

In this embodiment, spare marks 7 for such target marks 23 are set on the surface of the insulating layer material 13 . The spare mark 7 is used when the target mark 23 cannot be recognized. The spare marks 7 are formed separately from the target marks 23 and can be formed by silk printing 20, for example.

In addition, various marks such as a division mark 24 for dividing the collective substrates 1 and a Δ mark 25 indicating the insertion direction are formed on the scrap plate portion Wa.

The work W can be divided on the basis of the division marks 24 to obtain the respective collective substrates 1 . The assembly board 1 can be obtained by bending the base material 11 and the insulating layer material 13 along the dividing lines 3 as described above to obtain the divided circuit boards 5 .

As shown in FIG. 4, the divided circuit board 5 has a circuit pattern 17 on a base 11a made of a divided base material 11 and an insulating layer 13a made of a divided insulating layer material 13 interposed therebetween.

[Manufacturing method of aggregate substrate]
FIG. 5 is a flow chart showing the manufacturing process of the aggregate substrate according to the embodiment. FIG. 6 is a flow chart of the manufacturing process of the collective substrate following FIG. 7A to 7E are schematic cross-sectional views showing the manufacturing process of FIG. 5, showing pattern formation, etching, alkali peeling, solder resist formation, and silk printing, respectively.

The assembly board 1 is manufactured through a laminate manufacturing process S1, a circuit forming process S2, a forming process S3, and an inspection process S4 shown in FIGS.

In the laminated board manufacturing step S1, a conductive material 27 such as copper foil is laminated on a base material 11 with an insulating layer material 13 interposed therebetween, and the base material 11, the insulating layer material 13 and the conductive material 27 are integrated by hot pressing.

In the circuit forming step S2, the aggregate circuit pattern 15 and the plurality of target marks 23 are formed on the base material 11 with the insulating layer material 13 interposed therebetween, using a circuit copper material as the conductive material 27 . In the circuit formation step S2 of this embodiment, pattern formation S21, etching S22, alkali stripping S23, circuit inspection S24, solder resist formation S25, and silk printing S26 are performed. Among these steps, the solder resist forming step S25 constitutes a colored film forming step.

In the colored film forming step, the colored protective film 19 of the assembly circuit pattern 15 and the colored film 9 of the target mark 23 are formed from a colored protective material.

In pattern formation S21, the workpiece W received from the laminate manufacturing step S1 is passed through a roller or the like, and the dry film 29 is attached to the conductive material 27 shown in FIG. 7(A). Note that the dry film 29 in FIG. 7A is in a state after exposure and development, and covers the circuit pattern 17 and the corresponding portions of the target marks 23 .

In the etching S22, the exposed conductive material 27 other than the portions corresponding to the circuit pattern 17 and the target marks 23 in FIG. 7A is removed by a chemical or the like as shown in FIG. 7B.

In alkali stripping S23, the dry film 29 on the circuit pattern 17 in FIG. 7B is removed with an alkaline chemical as shown in FIG. 7C. After this alkali stripping, the circuit pattern 17 and the conductive material 27 remaining as the target marks 23 are polished.

In the circuit inspection S24, the circuit of the work W is inspected for short circuits, open circuits, scratches, stains, etc. by automatic optical inspection (AOI).

In the solder resist formation S25, the colored film 9 is formed together with the colored protective film 19 using a green solder resist ink which is a colored protective material. That is, after the solder resist ink is applied to the entire surface of the work W, it is cured by exposure, and the unnecessary portions are developed and removed. Accordingly, the colored film 9 is formed with the same ink material as the colored protective film 19 as shown in FIG. 7(D).

At this time, since the circuit pattern 17 and the target marks 23 have a sufficient color tone for image recognition with respect to the insulating layer material 13, the colored protective film 19 can be accurately formed through image recognition or the like.

However, the colored protective film 19 may be misaligned due to image recognition accuracy, exposure accuracy, formation accuracy of the target marks 23, and the like. The deviation of the colored protective film 19 can be visually recognized by the operator by the deviation of the colored film 9 from the surface of the target mark 23 .

As described above, since the colored film 9 is provided by the solder resist, which is a colored protective material made of the same material as the colored protective film 19 of the circuit pattern 17, the number of man-hours for forming the colored film 9 is reduced, and the productivity is greatly improved. and the structure becomes simple.

In other words, the target marks 23 can be formed together with the assembly circuit pattern 15, and the colored film 9 can be formed together with the colored protective film 1. Thus, the insulating layer material 13 can be formed using the original color tone of the solder resist without providing a special process. A colored film 9 having a color different from that can be easily formed.

In the silk printing S26, information such as the model name is printed on the portion covered with the colored protective film 19 of the solder resist as shown in FIG. 7(E).

In the forming step S3 of FIG. 6, a circuit plating process S31, a V-cut S32, a shape inspection S33, and a division S34 are performed.

In the circuit plating process S31, the circuit pattern 17 is plated with Ni or the like. This treatment prevents oxidation of the circuit pattern 17 and enhances solder wettability.

In the V-cut S32, dividing lines 3 are formed in a matrix like the workpiece W in FIGS. At this time, the division line 3 can be accurately formed by recognizing the image of the target mark 23 . In particular, as shown in FIG. 3A, the target mark 23 has a green colored film 9 on its surface that is clearly distinguishable from the white insulating layer material 13 .

Therefore, the target mark 23 has improved image recognizability. In this embodiment, in image recognition by binarizing the target mark 23, the contrast with respect to the insulating layer material 13 can be clarified. Therefore, the target marks 23 can be reliably recognized, and the division lines 3 can be accurately formed. Note that image recognition is not limited to binarization, and other image recognition is also possible.

On the other hand, as in the comparative example of FIG. 3B, when the target marks 23 are Ni-plated, the target marks 23 and the insulating layer material 13 are similar in color tone. As a result, it becomes difficult to recognize the target mark 23 in binarization, and the division line 3 cannot be formed.

In the shape inspection S33, it is inspected whether the circuit board 5 of the workpiece W has an abnormality such as a through hole or not, and whether the surface and appearance of the circuit board 1 are scratched or stained, and the abnormal workpiece W is removed.
At this time, deviation of the division line 3 and the like are also inspected. The deviation of the dividing line 3 can be recognized by the processing marks 21 .

In the division S34, the work W is cut at the division marks 24 to be divided into the collective substrates 1. As shown in FIG.

In the inspection step S4, an electrical test such as a circuit continuity test and a withstand voltage test is performed, and an appearance test is performed to inspect the front surface and the back surface of the collective board 1 . After the appearance inspection, a shipping inspection is performed and the product is shipped.

1 Collective substrate 3 V-shaped groove 5 Circuit board 9 Colored film 11 Metal plate material 11a Metal base 13 Insulating layer material 13a for collective substrate Insulating layer 15 for circuit substrate Collective circuit pattern 17 Circuit pattern 19 Colored protective film 23 Target mark S2 Circuit formation process S21 Pattern formation (circuit formation step)
S22 etching (circuit formation process)
S23 Alkaline stripping (circuit forming step)
S25 Solder resist formation (colored film formation process, circuit formation process)
S26 Silk printing (circuit formation process)

Claims (5)

An assembly board in which a plurality of circuit boards are assembled, each of which has a circuit pattern on a base with an insulating layer interposed therebetween and the surface of the circuit pattern is plated with a white color ,
a plate-shaped base material constituting the bases of the plurality of circuit boards;
a white insulating layer material provided on the base material and constituting the insulating layers of the plurality of circuit boards;
a set circuit pattern provided on the insulating layer material and in which a plurality of the circuit patterns of the plurality of circuit boards are assembled;
a colored protective film provided on the circuit pattern and formed of a colored protective material having a color tone that allows image recognition with respect to the insulating layer by binarization ;
a target mark for image recognition provided on the insulating layer material with the same conductive material as the circuit pattern ;
a colored film provided on the target mark and formed of the colored protective material and having a color tone that enables image recognition with respect to the insulating layer material;
An aggregate board with The aggregate substrate of claim 1,
The colored film is provided on the surface of the target mark and has the same planar shape as the surface.
aggregate board. The aggregate substrate according to claim 1 or 2,
The colored protective material is a solder resist,
aggregate board. A manufacturing method for manufacturing an aggregate substrate according to any one of claims 1 to 3,
a colored film forming step of forming a colored protective film for the circuit pattern and a colored film for the target mark together with the colored protective material;
A method of manufacturing an aggregate substrate. A manufacturing method for manufacturing the aggregate substrate of claim 4 ,
A circuit forming step of forming the collective circuit pattern and the plurality of target marks on the metal plate through the insulating layer using a conductive material;
A method of manufacturing an aggregate substrate.

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