JP7236059B2 - Through electrode substrate, mounting substrate provided with through electrode substrate, and method for manufacturing through electrode substrate - Google Patents

Description

An embodiment of the present disclosure relates to a through electrode substrate including through electrodes. The present disclosure also relates to a mounting substrate including the through electrode substrate and a method for manufacturing the through electrode substrate.

A member including a substrate including a first surface and a second surface, a plurality of through holes provided in the substrate, and a through electrode positioned inside the through hole, a so-called through electrode substrate, is used in various applications. ing. For example, a through electrode substrate is used as an interposer interposed between two LSI chips when stacking a plurality of LSI chips in order to increase the mounting density of LSIs. Also, the through electrode substrate may be interposed between an element such as an LSI chip and a mounting substrate such as a motherboard.

So-called filled vias and conformal vias are known examples of through electrodes. In the case of filled vias, the through electrode includes a conductive material such as copper that fills the inside of the through hole. For conformal vias, the through electrode includes a sidewall conductive layer extending along the sidewalls of the hole.

As a method for forming the through electrode, for example, as disclosed in Patent Document 1, first, a seed layer is formed on the side wall of the through hole, and then a plated layer is formed on the seed layer by electroplating. method is known.

JP-A-6-89831

When the seed layer is formed on the sidewall of the through hole by a physical film forming method such as sputtering or vapor deposition, the thickness of the seed layer may vary depending on the position. For example, when the physical film forming method is performed from the first surface side of the substrate, the thickness of the seed layer on the side wall of the through hole may decrease as the distance from the first surface increases. As a result, there may be a portion where the thickness of the plating layer on the seed layer is insufficient.

An object of the embodiments of the present disclosure is to provide a through electrode substrate that can effectively solve such problems.

An embodiment of the present disclosure includes a substrate including a first surface and a second surface located opposite to the first surface and provided with a through hole; a through electrode located in the through hole of the substrate; wherein the through electrode has an intermediate layer located on the side wall of the through hole and including at least a first layer containing copper or nickel, and a body layer located on the intermediate layer and containing copper; It is a through electrode substrate.
A thickness of the through electrode may be smaller than a width of the through hole.

In the through electrode substrate according to one embodiment of the present disclosure, the first layer may at least partially extend over the first surface or the second surface.

In the through electrode substrate according to one embodiment of the present disclosure, the first layer may contain 80% by mass or more of copper and have a thickness of 0.01 μm or more and 2.0 μm or less.

In the through electrode substrate according to one embodiment of the present disclosure, the first layer may contain 80% by mass or more of nickel and have a thickness of 0.01 μm or more and 2.0 μm or less.

In the through electrode substrate according to one embodiment of the present disclosure, the intermediate layer is located between the first layer and the main layer, contains 80% by mass or more of copper, and has a thickness of 0.01 μm or more and 2 μm or less. You may further comprise a second layer having

In the through electrode substrate according to one embodiment of the present disclosure, the first layer may be in contact with the sidewall of the through hole.

In the through electrode substrate according to one embodiment of the present disclosure, the through electrode may further include a catalyst containing palladium, located between the side wall of the through hole and the first layer.

In the through electrode substrate according to an embodiment of the present disclosure, the through electrode may further include a conductive base layer located between the side wall of the through hole and the first layer.

In the through electrode substrate according to one embodiment of the present disclosure, the through electrode may further include a catalyst containing palladium located between the base layer and the first layer.

In the through electrode substrate according to one embodiment of the present disclosure, the through hole at least partially has a shape whose width decreases from the first surface toward the second surface of the substrate,
When a portion of the through electrode corresponding to the first surface of the substrate is referred to as a first portion, and a portion corresponding to the position where the width of the through hole is the smallest is referred to as a second portion, the following relational expression (1) and (2) may be established.
(X2/Y2)<(X1/Y1) (1)
(X2/Z2)<(X1/Z1) (2)
X1 represents the thickness of the underlying layer in the first portion.
Y1 represents the thickness of the intermediate layer in the first portion.
Z1 represents the thickness of the body layer in the first portion.
X2 represents the thickness of the underlying layer in the second portion.
Y2 represents the thickness of the intermediate layer in the second portion.
Z2 represents the thickness of the body layer in the second portion.

In the through electrode substrate according to one embodiment of the present disclosure, the width of the through hole may be the smallest at the central portion in the thickness direction of the substrate.

In the through electrode substrate according to one embodiment of the present disclosure, the width of the through hole may be minimized at a portion corresponding to the second surface of the substrate.

In the through electrode substrate according to an embodiment of the present disclosure, the body layer may have a thickness of 5 μm or more and 20 μm or less.

In the through electrode substrate according to one embodiment of the present disclosure, the substrate may contain glass.

A through electrode substrate according to an embodiment of the present disclosure includes a first conductive layer electrically connected to the through electrode; A capacitor having a layer and a second conductive layer overlying the first inorganic layer may also be included.

A through electrode substrate according to an embodiment of the present disclosure includes the through electrode, a conductive layer electrically connected to the through electrode and located on the first surface side, and electrically connected to the through electrode. and a conductive layer located on the second surface side.

An embodiment of the present disclosure is a mounting substrate including the through electrode substrate described above and an element mounted on the through electrode substrate.

An embodiment of the present disclosure is the above-described method for manufacturing a through electrode substrate, comprising: a step of preparing the substrate; and a through electrode forming step of forming the through electrode in the through hole of the substrate. and forming the first layer by electroless plating; and forming the body layer on the intermediate layer including the first layer by electroplating. It is a manufacturing method of a through electrode substrate.

The method for manufacturing a through electrode substrate according to an embodiment of the present disclosure may further include forming a second layer containing copper on the first layer by electroplating.

In the method for manufacturing a through electrode substrate according to an embodiment of the present disclosure, the substrate may contain glass.

According to the embodiments of the present disclosure, it is possible to suppress the occurrence of portions where the thickness of the through electrode is insufficient.

1 is a cross-sectional view showing a through electrode substrate according to one embodiment; FIG. FIG. 4 is a cross-sectional view showing an enlarged through electrode of the through electrode substrate; FIG. 3 is a cross-sectional view showing a further enlarged through electrode of FIG. 2 ; It is a top view which shows the 1st surface 1st conductive layer of a penetration electrode substrate. It is a top view which shows the 1st surface 1st inorganic layer and the 1st surface 2nd conductive layer of a penetration electrode board|substrate. FIG. 5 is a cross-sectional view showing a modified example of a through-hole of a through-electrode substrate; It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a cross-sectional view showing a through electrode substrate according to a modified example. It is a figure which shows the 1st modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 1st modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 1st modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 1st modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 2nd modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 2nd modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 2nd modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 2nd modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 2nd modification of the manufacturing process of a penetration electrode substrate. FIG. 2 is a cross-sectional view showing an example of a mounting substrate including a through electrode substrate and an element; FIG. 4 is a diagram showing an example of a product on which a through electrode substrate is mounted;

Hereinafter, the configuration of the through electrode substrate and the manufacturing method thereof according to the embodiment of the present disclosure will be described in detail with reference to the drawings. The embodiments shown below are examples of the embodiments of the present disclosure, and the present disclosure should not be construed as being limited to these embodiments. Also, in this specification, terms such as "substrate", "base material", "sheet" and "film" are not to be distinguished from each other based only on the difference in designation. For example, "substrate" and "base material" are concepts that include members that can be called sheets and films. Furthermore, terms used herein to specify shapes and geometric conditions and their degrees, such as terms such as "parallel" and "perpendicular", length and angle values, etc., are bound by strict meanings. However, it is interpreted to include the extent to which similar functions can be expected. In addition, in the drawings referred to in this embodiment, the same reference numerals or similar reference numerals may be assigned to the same portions or portions having similar functions, and repeated description thereof may be omitted. Also, the dimensional ratios in the drawings may differ from the actual ratios for convenience of explanation, and some of the configurations may be omitted from the drawings.

Through Silicon Via Substrate An embodiment of the present disclosure will be described below. First, the configuration of the through electrode substrate 10 according to the present embodiment will be described. FIG. 1 is a cross-sectional view showing a through electrode substrate 10. FIG.

The through electrode substrate 10 includes a substrate 12 , a through electrode 22 , a first wiring structure portion 30 and a second wiring structure portion 40 . Each component of the through electrode substrate 10 will be described below.

(substrate)
Substrate 12 includes a first side 13 and a second side 14 opposite first side 13 . Further, the substrate 12 is provided with a plurality of through holes 20 extending from the first surface 13 to the second surface 14 .

Substrate 12 includes an inorganic material having a certain insulating property. For example, the substrate 12 may be a glass substrate, a quartz substrate, a sapphire substrate, a resin substrate, a silicon substrate, a silicon carbide substrate, an alumina (Al ₂ O ₃ ) substrate, an aluminum nitride (AlN) substrate, a zirconia oxide (ZrO ₂ ) substrate, etc. Alternatively, these substrates are laminated. The substrate 12 may partially include a substrate made of a conductive material such as an aluminum substrate or a stainless steel substrate.

Examples of the glass used for the substrate 12 include alkali-free glass. Alkali-free glass is glass that does not contain alkaline components such as sodium and potassium. Alkali-free glass includes, for example, boric acid instead of an alkaline component. Alkali-free glass also contains, for example, alkaline earth metal oxides such as calcium oxide and barium oxide. Examples of alkali-free glass include EN-A1 manufactured by Asahi Glass and Eagle XG manufactured by Corning. When the substrate 12 contains glass, the thickness T of the substrate 12 is, for example, 0.25 mm or more and 0.45 mm or less. By including glass in the substrate 12, the insulating properties of the substrate 12 can be enhanced. As a result, when the capacitor 15 is formed by part of the first wiring structure portion 30 as will be described later, the withstand voltage characteristic of the capacitor 15 can be improved.

In FIG. 1 , symbol S1 represents the width of through hole 20 at the position where through hole 20 is connected to first surface 13 . The width S1 is, for example, 40 μm or more and 150 μm or less. Also, the ratio of the length of the through-hole 20 to the width S1 of the through-hole 20, that is, the aspect ratio of the through-hole 20 is, for example, 4 or more and 10 or less.

The through hole 20 formed in the substrate 12 may at least partially have a shape whose width decreases from the first surface 13 toward the second surface 14 of the substrate 12 . In the example shown in FIG. 1 , the through-hole 20 has a shape whose width decreases from the first surface 13 and the second surface 14 of the substrate 12 toward the central portion in the thickness direction of the substrate 12 . As a result, the width of the through-hole 20 is minimized at the central portion in the thickness direction of the substrate 12, as indicated by symbol S2 in FIG. Note that the "central portion" refers to an intermediate position in the thickness direction of the substrate 12, a range from the intermediate position to the first surface 13 side of 0.1×T, and 0.1 from the intermediate position to the second surface 14 side. Including the range up to ×T. Symbol T represents the thickness of substrate 12 as described above.

(through electrode)
The through electrode 22 is a member positioned inside the through hole 20 and having conductivity. In the present embodiment, the thickness of the through electrode 22 is smaller than the width of the through hole 20, so that there is a space inside the through hole 20 where the through electrode 22 does not exist. That is, the through electrode 22 is a so-called conformal via. The thickness of the through electrode 22 is, for example, 5.1 μm or more and 22 μm or less.

FIG. 2 is an enlarged sectional view showing the through electrode 22 provided in the through hole 20. As shown in FIG. The through electrode 22 has at least an underlying layer 23 , an intermediate layer 24 and a main layer 25 .

The underlying layer 23 is a layer that is at least partially located on the side wall 21 of the through hole 20 and has conductivity. The underlayer 23 is formed on the side wall 21 by a physical film forming method such as a sputtering method or a vapor deposition method, a sol-gel method, or the like. Preferably, the underlayer 23 is formed on the sidewalls 21 by a sputtering method. As a result, the base layer 23 can be firmly adhered to the side wall 21 . Although not shown, the side wall 21 may have a portion where the underlying layer 23 is not formed. For example, the base layer 23 may not be formed in the central portion of the through-hole 20 in the thickness direction, or the material forming the base layer 23 may be scattered. The thickness of the underlying layer 23 is, for example, 0.05 μm or more and 1.0 μm or less.

When the underlayer 23 is formed by a physical film forming method, the material constituting the underlayer 23 may be metal such as titanium, chromium, or copper, an alloy using these metals, or a laminate of these. can. Further, when the underlayer 23 is formed by the sol-gel method, zinc oxide or the like can be used as the material constituting the underlayer 23 . In addition to the sol-gel layer formed by the sol-gel method, the underlayer 23 may further have an electroless plated layer containing copper formed on the sol-gel layer by an electroless plating method.

The intermediate layer 24 is a conductive layer formed by using an electroless plating method, an electrolytic plating method, or by using both an electroless plating method and an electrolytic plating method. The intermediate layer 24 functions as a seed layer when forming the body layer 25 by electroplating. Intermediate layer 24 includes at least first layer 241 . The first layer 241 is located on the underlying layer 23 and is a conductive layer. The first layer 241 contains copper as a main component. For example, the first layer 241 contains 80% by mass or more of copper. The first layer 241 is formed on the underlying layer 23 by electroless plating. As a method for analyzing the composition of the first layer 241, for example, TEM (transmission electron microscope) or EDS (energy dispersive X-ray spectroscope) can be adopted. When the first layer 241 contains 80% by mass or more of copper, the thickness of the first layer 241 is, for example, 0.01 μm or more and 2 μm or less.

Although not shown, part of the first layer 241 may be in direct contact with the sidewall 21 of the through hole 20 . For example, when the underlying layer 23 is formed by a physical film forming method, the conductive material constituting the underlying layer 23 cannot reach a part of the side wall 21 of the through hole 20, so the underlying layer 23 does not exist. parts can occur. In this case, part of the first layer 241 may contact the sidewall 21 of the through-hole 20 in a portion of the sidewall 21 where the underlying layer 23 does not exist.

Although not shown, the through electrode 22 may have a catalyst positioned between the base layer 23 and the first layer 241 . The catalyst is for promoting deposition of the first layer 241 onto the underlying layer 23 . Catalysts include, for example, palladium.

Body layer 25 is an electrically conductive layer located on intermediate layer 24 . The body layer 25 contains, for example, copper as a main component, and more specifically contains 80% by mass or more of copper. The body layer 25 is formed on the intermediate layer 24 by electroplating. As a method for analyzing the composition of the body layer 25, for example, TEM (transmission electron microscope) or EDS (energy dispersive X-ray spectrometer) can be adopted. The thickness of the body layer 25 is, for example, 5 μm or more and 20 μm or less. Note that another conductive layer such as a seed layer 27 to be described later may be provided between the intermediate layer 24 and the main layer 25 .

Next, the thickness of each conductive layer forming the through electrode 22 will be described in more detail. FIG. 3 is a further enlarged view of the through electrode 22 of FIG.

In FIG. 3 , reference R1 denotes a first portion of the through electrode 22 corresponding to the first surface 13 of the substrate 12 . The first portion R<b>1 is a portion of the through electrode 22 located within a range of 0.2×T from the first surface 13 toward the second surface 14 in the thickness direction of the substrate 12 . Further, in FIG. 3 , reference symbol R2 represents a second portion R2 corresponding to a position of the through-electrode 22 where the width of the through-hole 20 is the smallest. The second portion R2 extends from the minimum width position where the width of the through hole 20 is the minimum width S2, the range from the minimum width position to the first surface 13 side to 0.2×T, and the range from the minimum width position to the second It is a portion of the through electrode 22 located in the range up to 0.2×T toward the surface 14 side.

When the base layer 23 is formed on the side wall 21 of the through hole 20 by the physical film forming method from the first surface 13 side, the thickness of the base layer 23 formed on the side wall 21 of the through hole 20 is farther from the first surface 13. becomes smaller as For example, the thickness X2 of the base layer 23 in the second portion R2 is smaller than the thickness X1 of the base layer 23 in the first portion R1. In this case, if the body layer 25 is formed on the underlying layer 23 by electroplating, the thickness of the body layer 25 formed on the underlying layer 23 of the second portion R2 is also reduced, and the conductivity of the second portion R2 becomes non-conductive. may be suitable. In other words, the thickness of the main body layer 25 and the thickness of the entire through electrode 22 may be insufficient in the second portion R2. By providing the intermediate layer 24, it is possible to solve the problems that may arise due to the insufficient thickness of the underlying layer 23 as described above.

In FIG. 3, symbol Y1 represents the thickness of the intermediate layer 24 in the first portion R1, and symbol Z1 represents the thickness of the main layer 25 in the first portion R1. Reference Y2 represents the thickness of the intermediate layer 24 in the second portion R2, and reference Z2 represents the thickness of the main layer 25 in the second portion R2. In this embodiment, the thickness of intermediate layer 24 is equal to the thickness of first layer 241 . Preferably, the following relational expression (1) holds between the first portion R1 and the second portion R2.
(X2/Y2)<(X1/Y1) (1)
Relational expression (1) can be rewritten as Y2>(X2/X1)*Y1. By forming the intermediate layer 24 so that the relational expression (1) holds, the intermediate layer 24 can compensate for the insufficient thickness of the underlying layer 23 in the second portion R2. Thereby, the main body layer 25 can be formed so that the following relational expression (2) is established.
(X2/Z2)<(X1/Z1) (2)
Relational expression (2) can be rewritten as Z2>(X2/X1)*Z1.

(First wiring structure part)
Next, the first wiring structure portion 30 will be described. The first wiring structure portion 30 has layers such as a conductive layer and an insulating layer provided on the first surface 13 side of the substrate 12 so as to configure an electrical circuit on the first surface 13 side of the substrate 12 . As will be described later, part of the first wiring structure portion 30 constitutes the capacitor 15 . A part of the first wiring structure 30 constitutes a part of the inductor 16 . In the present embodiment, the first wiring structure portion 30 includes a first surface first conductive layer 31, a first surface first inorganic layer 32, a first surface second conductive layer 33, a first surface first organic layer 34, It has a first surface third conductive layer 35 and a first surface second organic layer 36 .

[First surface first conductive layer]
The first surface first conductive layer 31 is a conductive layer located on the first surface 13 of the substrate 12 . The first surface first conductive layer 31 may be electrically connected to the through electrode 22 . In addition, the first surface first conductive layer 31 may be composed of a single layer having conductivity, or may include a plurality of layers having conductivity. For example, the first-surface first conductive layer 31 may include an underlying layer 23 , an intermediate layer 24 and a body layer 25 that are sequentially laminated on the first surface 13 of the substrate 12 , like the through-electrodes 22 . Also, the first surface first conductive layer 31 may include only a part of the conductive layers among the underlying layer 23 , the intermediate layer 24 and the main layer 25 . In these cases, the underlying layer 23, the first layer 241 of the intermediate layer 24, the body layer 25, etc. may at least partially extend continuously from the sidewall 21 of the through-hole 20 to the first surface 13. good. The material forming the first surface first conductive layer 31 is the same as the material forming the through electrode 22 . The thickness of the first surface first conductive layer 31 is, for example, 100 nm or more and 20 μm or less.

By forming the base layer 23 on at least the first surface 13 and the first portion R1, the adhesion of the first surface first conductive layer 31 to the first surface 13 and the first portion R1 is improved. As a result, for example, in etching for removing an unnecessary portion of the underlying layer 23, the first surface 13 and the first portion R1 are more strongly exposed to the etchant than the underlying layer 23 located in the central portion of the through-hole 20. It is possible to suppress peeling of the base layer 23 located at .

FIG. 4 is a plan view showing the penetrating electrode 22 of the penetrating electrode substrate 10 and a first surface first conductive layer 31, which will be described later, viewed from the first surface 13 side. The first surface first conductive layer 31 is provided on the first surface 13 side of the substrate 12 so as to constitute at least a capacitor 15 and an inductor 16 which will be described later. In FIG. 4, layers such as a first surface first inorganic layer 32, which will be described later, laminated on the first surface first conductive layer 31 are omitted. Also, FIG. 1 corresponds to a cross-sectional view of the through electrode substrate 10 shown in FIG. 4 and FIG. 5, which will be described later, cut along the line AA.

[First surface first inorganic layer]
The first surface first inorganic layer 32 is a layer that is located at least partially on the first surface first conductive layer 31 and the first surface 13 of the substrate 12, contains an inorganic material, and has insulating properties. Silicon nitride such as SiN can be used as the inorganic material for the first surface first inorganic layer 32 . In addition, examples of inorganic materials for the first surface first inorganic layer 32 include silicon oxide, aluminum oxide, and tantalum pentoxide. The dielectric constant of the inorganic material of the first surface first inorganic layer 32 is, for example, 3 or more and 50 or less. Also, the thickness of the first surface first inorganic layer 32 is, for example, 50 nm or more and 400 nm or less. The first surface first inorganic layer 32 may be composed of a single layer or may include a plurality of layers.

The first surface first inorganic layer 32 may partially cover the first surface first conductive layer 31 . For example, the first surface first inorganic layer 32 may cover the end portion 31 e of the first surface first conductive layer 31 constituting the capacitor 15 . As a result, it is possible to prevent the first surface first conductive layer 31 from being damaged by the chemical used in the step of forming the first surface second conductive layer 33, the first surface first organic layer 34, and the like. Note that "covering" means that when the through electrode substrate 10 is viewed along the normal direction of the first surface 13 of the substrate 12 as shown in FIG. and the first surface first inorganic layer 32 overlap each other.

[First surface second conductive layer]
The first surface second conductive layer 33 is a conductive layer located on the first surface first inorganic layer 32 . As shown in FIG. 1 , the end portion 33 e of the first surface second conductive layer 33 is located on the first surface first inorganic layer 32 . The above-described first surface first conductive layer 31, the above-described first surface first inorganic layer 32 located on the first surface first conductive layer 31, and the first surface first inorganic layer 32 located on the first surface first inorganic layer 32 A capacitor 15 is configured by the surface second conductive layer 33 .

The first-surface second conductive layer 33 may include a plurality of conductive layers stacked in order on the first-surface first inorganic layer 32, similar to the through electrodes 22 and the first-surface first conductive layer 31. . The material forming the first surface second conductive layer 33 is the same as the material forming the through electrode 22 and the first surface first conductive layer 31 . The thickness of the first surface second conductive layer 33 is, for example, 100 nm or more and 20 μm or less.

FIG. 5 is a plan view showing the first surface first conductive layer 31, the first surface first inorganic layer 32, and the first surface second conductive layer 33 of the through electrode substrate 10 as viewed from the first surface 13 side. be. In FIG. 5, layers such as a first surface first organic layer 34 and a first surface third conductive layer 35, which are laminated on the first surface second conductive layer 33, are omitted. In addition, in FIG. 5, the components covered with the first surface first inorganic layer 32 are represented by dotted lines.

As shown in FIG. 5, the first surface first inorganic layer 32 covers a wide area of the first surface 13 of the substrate 12 and the first surface first conductive layer 31 . For example, the first surface first inorganic layer 32 covers at least the end portion 31 e of the first surface first conductive layer 31 constituting the capacitor 15 . Since the first surface first inorganic layer 32 covers the first surface 13 of the substrate 12 and the first surface first conductive layer 31 over a wide area, the first surface 13 and the first surface of the substrate 12 can be Damage to the surface first conductive layer 31 can be suppressed.

As shown in FIG. 5, openings 32a are formed in the first inorganic layer 32 on the first surface. The openings 32 a are formed at limited positions such as the position of the through hole 20 and the connection position between the first surface first conductive layer 31 and the first surface third conductive layer 35 .

[First surface first organic layer]
The first surface first organic layer 34 is a layer that is located on the first surface first inorganic layer 32 and on the first surface second conductive layer 33, contains an organic material, and has insulating properties. As the organic material of the first surface first organic layer 34, polyimide, epoxy, or the like can be used. The organic material of the first surface first organic layer 34 preferably has a dielectric loss tangent of 0.03 or less, more preferably 0.02 or less, and even more preferably 0.01 or less. By forming the first surface first organic layer 34 using an organic material having a small dielectric loss tangent, it is possible to suppress the electric signal that should pass through the capacitor 15 and the inductor 16 from passing through the first surface first organic layer 34. be able to. As a result, the band of the through electrode substrate 10 including the capacitor 15 and the inductor 16 can be widened to the high frequency side.

[First surface, third conductive layer]
The first surface third conductive layer 35 is a conductive layer located on the first surface first conductive layer 31 or the first surface second conductive layer 33 . In the example shown in FIG. 1, the first-surface third conductive layer 35 includes a portion connected to the first-surface first conductive layer 31, which is one electrode of the capacitor 15, and a portion connected to the first-surface first conductive layer 31, which is the other electrode of the capacitor 15. One surface includes a portion connected to the second conductive layer 33 .

The first surface third conductive layer 35 may include a plurality of sequentially laminated conductive layers, similar to the through electrodes 22 and the first surface first conductive layer 31 . The material forming the first surface third conductive layer 35 is the same as the material forming the through electrode 22 and the first surface first conductive layer 31 .

[First surface second organic layer]
The first surface second organic layer 36 is located on the first surface first organic layer 34 and the first surface third conductive layer 35, and is a layer containing an organic material and having insulating properties. Like the first surface first organic layer 34, the first surface second organic layer 36 preferably has a dielectric loss tangent of 0.03 or less, more preferably 0.02 or less, and still more preferably 0.01 or less. Including materials. As the organic material for the first surface second organic layer 36, polyimide, epoxy, or the like can be used similarly to the first surface first organic layer 34. FIG.

(Second wiring structure part)
Next, the second wiring structure portion 40 will be described. The second wiring structure portion 40 has layers such as a conductive layer and an insulating layer provided on the second surface 14 side of the substrate 12 so as to form an electrical circuit on the second surface 14 side. The inductor 16 is configured by part of the second wiring structure 40 , part of the first wiring structure 30 and the through electrode 22 . In the present embodiment, the second wiring structure portion 40 has a second surface first conductive layer 41 and a second surface first organic layer 43 .

[Second surface first conductive layer]
The second surface first conductive layer 41 is a conductive layer located on the second surface 14 of the substrate 12 . The second surface first conductive layer 41 may be electrically connected to the through electrode 22 .

The second-surface first conductive layer 41 includes the base layer 23, the intermediate layer 24, and the main layer 25, which are laminated in order on the second surface 14 of the substrate 12, like the through electrodes 22 and the first-surface first conductive layer 31. may contain Further, the second surface first conductive layer 41 may include only a part of the conductive layers among the underlying layer 23 , the intermediate layer 24 and the main layer 25 . In these cases, the underlying layer 23, the first layer 241 of the intermediate layer 24, the body layer 25, etc. may at least partially extend continuously from the side wall 21 of the through-hole 20 to the second surface 14. good. The material forming the second surface first conductive layer 41 is the same as the material forming the through electrode 22 . The thickness of the second surface first conductive layer 41 is, for example, 100 nm or more and 20 μm or less.

[Second surface first organic layer]
The second surface first organic layer 43 is a layer that is located on the second surface first conductive layer 41 and the second surface 14 of the substrate 12, contains an organic material, and has insulating properties. Like the first surface first organic layer 34 and the first surface second organic layer 36, the second surface first organic layer 43 is preferably 0.03 or less, more preferably 0.02 or less, and still more preferably 0. Contains organic materials with a loss tangent of less than 0.01. As the organic material for the second surface first organic layer 43, polyimide, epoxy, or the like can be used similarly to the first surface first organic layer 34 and the first surface second organic layer 36. FIG.

(Modified example of through hole)
FIG. 6 is a cross-sectional view showing a modified example of the through hole 20. As shown in FIG. As shown in FIG. 6 , the through electrode substrate 10 may include an organic layer 26 located closer to the center of the through hole 20 than the through electrode 22 is. The “center side” means that the distance between the organic layer 26 and the side wall 21 is greater than the distance between the through electrode 22 and the side wall 21 inside the through hole 20 . Organic layer 26 preferably comprises an organic material having a dielectric loss tangent of 0.03 or less, more preferably 0.02 or less, and even more preferably 0.01 or less. As an organic material for the organic layer 26, polyimide, epoxy, or the like can be used. By configuring the organic layer 26 using an organic material with a small dielectric loss tangent, it is possible to suppress part of the electrical signal that should pass through the capacitor 15 and the inductor 16 from passing through the organic layer 26 . As a result, the band of the through electrode substrate 10 including the capacitor 15 and the inductor 16 can be widened to the high frequency side.

Also, although not shown, the through electrode 22 may be a filled via filled in the through hole 20 . In this case, the through electrode 22 extends at least partially to the center point of the through hole 20 in the surface direction of the first surface 13 .

Method for Manufacturing Through Electrode Substrate An example of a method for manufacturing the through electrode substrate 10 will be described below with reference to FIGS. 7 to 14. FIG.

(Through hole forming step)
First, the substrate 12 is prepared. Next, a resist layer is provided on at least one of the first surface 13 and the second surface 14 . After that, openings are provided in the resist layer at positions corresponding to the through holes 20 . Next, by processing the substrate 12 in the openings of the resist layer, through holes 20 can be formed in the substrate 12 as shown in FIG. As a method for processing the substrate 12, a dry etching method such as a reactive ion etching method or a deep reactive ion etching method, a wet etching method, or the like can be used.

The through holes 20 may be formed in the substrate 12 by irradiating the substrate 12 with a laser. In this case, the resist layer may not be provided. As a laser for laser processing, an excimer laser, Nd:YAG laser, femtosecond laser, or the like can be used. When an Nd:YAG laser is employed, a fundamental wave with a wavelength of 1064 nm, a second harmonic with a wavelength of 532 nm, a third harmonic with a wavelength of 355 nm, or the like can be used.

Alternatively, laser irradiation and wet etching can be combined as appropriate. Specifically, first, an altered layer is formed in a region of the substrate 12 where the through hole 20 is to be formed by laser irradiation. Subsequently, the substrate 12 is immersed in hydrogen fluoride or the like to etch the altered layer. Through holes 20 can thus be formed in the substrate 12 . Alternatively, the through holes 20 may be formed in the substrate 12 by blasting the substrate 12 with an abrasive.

By processing the substrate 12 from both the first surface 13 side and the second surface 14 side, a through hole 20 having a shape whose width decreases toward the central portion in the thickness direction of the substrate 12 as shown in FIG. 7 is formed. can do.

(Through electrode forming step)
Next, the through electrodes 22 are formed on the sidewalls 21 of the through holes 20 . In this embodiment, simultaneously with the through electrode 22, the first surface first conductive layer 31 is formed on part of the first surface 13 of the substrate 12, and the second surface conductive layer 31 is formed on part of the second surface 14 of the substrate 12. An example of forming the first conductive layer 41 will be described.

First, as shown in FIG. 8, the base layer 23 is formed on the first surface 13, the second surface 14 and the sidewalls 21 of the substrate 12 by a physical film forming method or a sol-gel method. The base layer 23 is formed preferably by a physical film forming method, particularly preferably by a sputtering method. As a result, the underlying layer 23 can be firmly adhered to the first surface 13 , the second surface 14 and the sidewalls 21 of the substrate 12 . A physical film forming method such as a sputtering method or a vapor deposition method is preferably performed from both the first surface 13 side and the second surface 14 side. In this case, the side wall 21 of the through-hole 20 is adhered with the conductive substance flying from the first surface 13 side and the conductive substance flying from the second surface 14 side.

Subsequently, a catalyst attaching step is performed to attach a catalyst to the surface of the underlying layer 23 . The catalyst adhesion step includes, for example, a step of immersing the substrate 12 provided with the underlying layer 23 in a catalyst solution containing a catalyst such as palladium.

The catalyst solution is obtained, for example, by diluting a solution of palladium chloride in hydrochloric acid with water. The catalyst solution may further contain stannous chloride.

If the catalyst solution contains stannous chloride, a tin removal step to remove tin from the substrate 12 may be performed after the catalyst deposition step. In the tin removal step, for example, a treatment liquid containing sulfuric acid, an organic acid, water, and additives added as necessary is used.

A cleaning step for cleaning the substrate 12 may be performed before performing the catalyst adhering step. In the cleaning process, for example, the substrate 12 is degreased using an alkaline cleaning liquid. Alkaline cleaning liquids include, for example, sodium carbonate, sodium hydroxide, monoethanolamine and water, and optional additives.

Subsequently, as shown in FIG. 9, a resist layer 37 is partially formed on the underlying layer 23 . As a material for the resist layer 37, a photosensitive material such as a dry film resist containing acrylic resin can be used.

Subsequently, as shown in FIG. 10, a first layer 241 is formed on the underlying layer 23 by electroless plating. For example, the substrate 12 is immersed in an electroless plating solution containing copper. This allows the first layer 241 to be deposited on the underlying layer 23 not covered by the resist layer 37 .

The electroless plating solution contains, for example, copper sulfate and water, and additives added as necessary. As the additive, for example, a complexing agent containing carboxylic acids such as formic acid, acetic acid, propionic acid, and succinic acid can be used. By adding a complexing agent to the electroless plating solution, it is possible to eliminate the need for etching treatment using fluoride, which is generally performed after electroless plating treatment.

A specific example of the composition of the electroless plating solution is shown below.
・Copper sulfate 0.02mol/ ^dm3
・EDTA 0.1 mol/ ^dm3
・Polyethylene glycol 1000 0.1mol/ ^dm3
A first layer 241 having a thickness of about 0.1 μm can be deposited on the underlying layer 23 by immersing the substrate 12 in the electroless plating solution having such a composition for one minute.

Subsequently, as shown in FIG. 11, the body layer 25 is formed on the intermediate layer 24 including the first layer 241 by electroplating. For example, the substrate 12 is immersed in an electrolytic plating solution containing copper. Also, a current is passed through the underlying layer 23 and the intermediate layer 24 . This allows the body layer 25 to be deposited on the intermediate layer 24 .

(Resist and conductive layer removal step)
After that, as shown in FIG. 12, the resist layer 37 is removed. Also, the portion of the underlying layer 23 covered with the resist layer 37 is removed by wet etching, for example. In this manner, the through electrode 22 including the base layer 23, the intermediate layer 24 and the main layer 25, the first surface first conductive layer 31 and the second surface first conductive layer 41 can be formed. As a result, the second surface first conductive layer 41, the through electrode 22 electrically connected to the second surface first conductive layer 41, and the first surface first conductive layer electrically connected to the through electrode 22 31 can be constructed. A step of annealing the conductive layer such as the body layer 25 may be performed.

(Surface treatment process)
Next, a surface treatment step of exposing the surface of the first surface first conductive layer 31 to plasma such as NH ₃ plasma may be performed. Thereby, the oxide on the surface of the first surface first conductive layer 31 can be removed. For example, when the first surface first conductive layer 31 contains copper, the copper oxide on the surface of the first surface first conductive layer 31 can be removed. As a result, the adhesion between the first surface first conductive layer 31 and the first surface first inorganic layer 32 formed on the first surface first conductive layer 31 can be enhanced.

(Step of forming first inorganic layer on first surface and second conductive layer on first surface)
Next, as shown in FIG. 13 , a first surface first inorganic layer 32 is formed on the first surface first conductive layer 31 and on the first surface 13 of the substrate 12 . As a method for forming the first surface first inorganic layer 32, for example, plasma CVD, sputtering, or the like can be adopted. Preferably, the step of forming the first surface first inorganic layer 32 is performed continuously in the same apparatus as the step of forming the first surface first conductive layer 31 and the surface treatment step. These steps are preferably performed under an atmosphere in which oxidation of the first surface first conductive layer 31 is suppressed, for example, under an atmosphere of reducing gas such as ammonia gas. Further, as shown in FIG. 13, a first surface second conductive layer 33 is formed on a portion of the first surface first inorganic layer 32 . As a result, the first surface first conductive layer 31, the first surface first inorganic layer 32 on the first surface first conductive layer 31, and the first surface second conductive layer on the first surface first inorganic layer 32 33 can be configured. The process of forming the first surface second conductive layer 33 is the same as the process of forming the first surface first conductive layer 31, so the description thereof is omitted.

The timing of patterning the first surface first inorganic layer 32 so that the first surface first inorganic layer 32 has the shape shown in FIG. 13 is arbitrary. For example, the first surface first inorganic layer 32 may be patterned before forming the first surface second conductive layer 33 on the first surface first inorganic layer 32, and the first surface second conductive layer 33 may be formed. After that, the first surface first inorganic layer 32 may be patterned. Also, although not shown, after forming a first surface first organic layer 34 shown in FIG. The first inorganic layer 32 may be patterned.

(Step of forming first organic layer on first surface)
Next, as shown in FIG. 14, a first surface first organic layer 34 is formed on a portion of the first surface second conductive layer 33 and a portion of the first surface first inorganic layer 32 . For example, first, a first surface film (not shown) having a photosensitive layer containing an organic material and a substrate is attached to the first surface 13 side of the substrate 12 . Subsequently, the first surface side film is subjected to exposure processing and development processing. As a result, the first surface first organic layer 34 made of the photosensitive layer of the first surface side film and having the openings 34 a formed therein can be formed on the first surface 13 side of the substrate 12 . At this time, as in the case of the first surface first organic layer 34, as shown in FIG. A surface first organic layer 43 may be formed.

The opening 34a of the first surface first organic layer 34 is located at the position where the first surface third conductive layer 35 and the first surface first conductive layer 31 are connected, and the first surface third conductive layer 35 and the first surface It is formed on the first surface first inorganic layer 32 at the position where it is connected to the second conductive layer 33 .

The method of forming the first surface first organic layer 34 and the second surface first organic layer 43 is not limited to the method using a film. For example, first, a liquid containing an organic material such as polyimide is applied by spin coating or the like and dried to form an organic layer. Subsequently, the first surface first organic layer 34 and the second surface first organic layer 43 can be formed by subjecting the organic layer to exposure processing and development processing.

In addition, by causing part of the first surface first organic layer 34 and part of the second surface first organic layer 43 to reach the inside of the through hole 20, as shown in FIG. You may form the organic layer 26 in . Note that the organic layer 26 may be formed inside the through-hole 20 in a process different from that of the first surface first organic layer 34 and the second surface first organic layer 43 .

After that, although not shown, the first surface third conductive layer 31 is connected to the first surface first conductive layer 31 or the first surface second conductive layer 33 through the opening 34 a of the first surface first organic layer 34 . A conductive layer 35 may be formed. Also, the first surface second organic layer 36 may be formed on a portion of the first surface first organic layer 34 and a portion of the first surface third conductive layer 35 .

The effects brought about by this embodiment will be described below.

In the present embodiment, as described above, after forming base layer 23 on side wall 21 of through hole 20, first layer 241 is formed on base layer 23 by electroless plating. Therefore, the first layer 241 can be formed in a portion of the side wall 21 that is difficult for the conductive material forming the base layer 23 to reach, for example, the central portion in the thickness direction of the substrate 12 . As a result, the first layer 241 can compensate for the insufficient thickness of the underlying layer 23 in the central portion of the through-hole 20 . Therefore, in the subsequent electroplating process, the main body layer 25 having a sufficient thickness can be formed in the central portion of the through-hole 20 . As a result, it is possible to prevent the thickness of the through-electrode 22 from becoming insufficient in the central portion of the through-hole 20 . Therefore, the electric resistance of the through electrode 22 extending from the first surface 13 side to the second surface 14 side can be sufficiently reduced. As a result, electrical characteristics of parts such as the capacitor 15 and the inductor 16 can be improved.

Further, in the present embodiment, underlying layer 23 exists at least partially between side wall 21 of through hole 20 and first layer 241 . The underlying layer 23 has higher adhesion to the sidewalls 21 than the first layer 241 does. Therefore, the adhesion of the through electrode 22 to the side wall 21 can be improved as compared with the case where the through electrode 22 does not include the underlying layer 23 .

Further, in the present embodiment, a plating solution containing copper is used as the plating solution for forming the first layer 241 by electroless plating. That is, the first layer 241 is formed using the same material as the body layer 25 formed by electroplating. Therefore, the adhesion of the main body layer 25 to the first layer 241 can be improved compared to the case where the material forming the first layer 241 and the material forming the main body layer 25 are different.

Various modifications can be made to the above-described embodiment. Modifications will be described below with reference to the drawings as necessary. In the following description and the drawings used in the following description, the same reference numerals as those used for the corresponding portions in the above-described embodiment are used for the parts that can be configured in the same manner as in the above-described embodiment, Duplicate explanations are omitted. Further, when it is clear that the effects obtained in the above-described embodiment can also be obtained in the modified example, the explanation thereof may be omitted.

(First Modification of Through Silicon Via Substrate)
In the above-described embodiment, an example is shown in which the width of the through hole 20 in the surface direction of the substrate 12 decreases from the first surface 13 and the second surface 14 of the substrate 12 toward the central portion in the thickness direction of the substrate 12. rice field. However, it is not limited to this, and as shown in FIG. 15, the width of the through hole 20 may decrease from the first surface 13 side toward the second surface 14 side. In the example shown in FIG. 15, the width of the through-hole 20 is the smallest at the portion corresponding to the second surface 14 of the substrate 12 . The “portion corresponding to the second surface 14 ” is a portion within a range of 0.2×T from the second surface 14 toward the first surface 13 in the thickness direction of the substrate 12 .

Also in this modification, similarly to the above-described embodiment, the above-described relational expression ( 1) and (2) may be established. In the example shown in FIG. 15, the second portion R2 is a portion of the through-hole electrode 22 located within a range of 0.2×T from the second surface 14 toward the first surface 13 in the thickness direction of the substrate 12. be. The definition of the first portion R1 of the through electrode 22 is the same as in the above embodiment.

(Second Modification of Through Silicon Via Substrate)
In the above-described embodiment, the second portion R2 of the through electrode 22 is defined as the portion of the through electrode 22 corresponding to the position where the width of the through hole 20 is the smallest. On the other hand, when the base layer 23 is formed on the side wall 21 of the through hole 20 by the physical film forming method, the base layer 23 is generally formed at an intermediate position of the through hole 20 in the thickness direction of the substrate 12 regardless of the shape of the through hole 20. It is thought that it will become difficult to form. For example, when the physical film forming method is performed from both the first surface 13 side and the second surface 14 side of the substrate 12, the thickness of the underlying layer 23 is minimized at the intermediate position of the through hole 20 in the thickness direction of the substrate 12. High probability. In consideration of such points, the second portion R2 of the through electrode 22 may be defined as a portion corresponding to the intermediate position of the through hole 20 in the thickness direction of the substrate 12 . For example, the second portion R2 is set to the intermediate position in the thickness direction of the substrate 12, the range from the intermediate position to the first surface 13 side to 0.2×T, and the range from the intermediate position to the second surface 14 side to 0.2. It may be defined as a portion of the through electrode 22 located in the range up to ×T. Also in this case, preferably, the above-described relational expressions (1) and (2) regarding the base layer 23, the first layer 241, and the main layer 25 are established between the first portion R1 and the second portion R2. there is

(First Modification of Manufacturing Method of Through Silicon Via Substrate)
In the embodiment described above, an example in which the intermediate layer 24 is formed after forming the resist layer 37 is shown. In this modified example and a second modified example described later, an example in which the intermediate layer 24 is formed before forming the resist layer 37 will be described.

First, the substrate 12 having the base layer 23 formed on the side wall 21 of the through-hole 20 shown in FIG. 8 is prepared in the same manner as in the above-described embodiment. Subsequently, a catalyst is deposited on the underlying layer 23, and then the substrate 12 is immersed in a plating solution containing copper. As a result, as shown in FIG. 16, a first layer 241 is formed on the entire underlying layer 23 by electroless plating.

Subsequently, as shown in FIG. 16, a conductive second layer 242 may be formed on the first layer 241 by electroplating. The second layer 242 contains, for example, copper as a main component, and more specifically contains 80% by mass or more of copper. By further forming the second layer 242 on the first layer 241, the sidewall 21 of the through-hole 20 can be covered over the entire area more reliably. In other words, it is possible to prevent the sidewalls 21 from being partially exposed from the intermediate layer 24 .

When the intermediate layer 24 includes the first layer 241 and the second layer 242, the thickness of the first layer 241 is, for example, 0.01 μm or more and 2 μm or less, and may be 0.1 μm or more and 2 μm or less. Also, the thickness of the second layer 242 is, for example, 0.01 μm or more and 2 μm or less, and may be 0.1 μm or more and 2 μm or less.

Subsequently, as shown in FIG. 17, a resist layer 37 is partially formed on the intermediate layer 24 . After that, as shown in FIG. 17, the body layer 25 is formed on the intermediate layer 24 by electroplating. After that, although not shown, the resist layer 37 is removed. Also, the portions of the underlying layer 23 and the intermediate layer 24 covered with the resist layer 37 are removed by wet etching, for example. In this manner, as in the case of the above-described embodiment shown in FIG. 1 conductive layer 41 can be formed.

Thereafter, in the same manner as in the above embodiment, the first surface first inorganic layer 32, the first surface second conductive layer 33, the first surface first organic layer 34, the first surface third conductive layer 35, A first surface second organic layer 36, a second surface first organic layer 43, and the like are formed.

Also in this modification, by forming the intermediate layer 24 on the underlying layer 23 after forming the underlying layer 23 on the side wall 21 of the through hole 20, it is possible to prevent the thickness of the through electrode 22 from becoming insufficient at a specific position. be able to. Also, the adhesion of the through electrode 22 to the side wall 21 can be enhanced.

(Second Modified Example of Manufacturing Method of Through Silicon Via Substrate)
In the above-described embodiments, the through electrode 22 has the base layer 23 located between the side wall 21 and the intermediate layer 24 . However, the present invention is not limited to this, and the underlying layer 23 may not be provided between the side wall 21 and the intermediate layer 24 . For example, the first layer 241 of the intermediate layer 24 may contact the sidewalls 21, as shown in FIG. In this case, the palladium-containing catalyst is located between the sidewall 21 of the through hole 20 and the first layer 241 .

After forming the first layer 241 on the sidewalls 21 using an electroless plating method, it is preferable to form a second layer 242 on the first layer 241 using an electrolytic plating method, as shown in FIG. Thereby, even if the underlying layer 23 does not exist, it is possible to prevent the side wall 21 from being partially exposed from the intermediate layer 24 .

Subsequently, as shown in FIG. 19, a resist layer 37 is partially formed on the intermediate layer 24 . Thereafter, as shown in FIG. 19, the body layer 25 is formed on the intermediate layer 24 by electroplating. After that, although not shown, the resist layer 37 is removed. Also, the portions of the underlying layer 23 and the intermediate layer 24 covered with the resist layer 37 are removed by wet etching, for example. In this manner, the through electrode 22 including the intermediate layer 24 and the main body layer 25, the first surface first conductive layer 31 and the second surface first conductive layer 41 can be formed.

(Third Modification of Method for Manufacturing Through Silicon Via Substrate)
A third modification of the method for manufacturing a through electrode substrate will be described below with reference to FIGS. 20 to 24 .

First, in the same manner as in the first modification described above, the substrate 12 having the base layer 23 and the intermediate layer 24 formed on the side wall 21 of the through hole 20 shown in FIG. 16 is prepared. Subsequently, as shown in FIG. 20, a resist layer 38 covering the through holes 20 is formed on the first surface 13 and the second surface 14 . After that, as shown in FIG. 21, portions of the underlying layer 23 and the intermediate layer 24 on the first surface 13 that are not covered with the resist layer 38 and portions of the underlying layer 23 and the intermediate layer 24 on the second surface 14 are removed. The portion not covered with the resist layer 38 is removed by wet etching, for example. After that, as shown in FIG. 21, the resist layer 38 is removed.

Subsequently, as shown in FIG. 22, a seed layer 27 is formed on the first surface 13, the second surface 14, and the first layer 241 of the substrate 12. Next, as shown in FIG. As a method for forming the seed layer 27, a physical film forming method such as a sputtering method or a vapor deposition method, a sol-gel method, or the like can be employed. As the material and layer structure of the seed layer 27, the same material and layer structure as those of the underlying layer 23 can be employed.

Subsequently, as shown in FIG. 23, a resist layer 37 is partially formed on the seed layer 27 on the first surface 13 and the second surface 14 . Thereafter, as shown in FIG. 23, the body layer 25 is formed by electroplating on the seed layer 27 not covered with the resist layer 37 .

After that, as shown in FIG. 24, the resist layer 37 is removed. Also, the portion of the seed layer 27 covered with the resist layer 37 is removed by wet etching, for example. In this case, as shown in FIG. 24, the through-electrode 22 is composed of the underlying layer 23 located at least partially on the side wall 21 of the through-hole 20, the intermediate layer 24 located on the underlying layer 23, and the first layer 241 on the first layer 241. and a body layer 25 located on the seed layer 27 . On the other hand, the first surface first conductive layer 31 and the second surface first conductive layer 41 have a seed layer 27 and a body layer 25 located on the seed layer 27 .

Thereafter, in the same manner as in the above embodiment, the first surface first inorganic layer 32, the first surface second conductive layer 33, the first surface first organic layer 34, the first surface third conductive layer 35, A first surface second organic layer 36, a second surface first organic layer 43, and the like are formed.

Also in this modification, by forming the intermediate layer 24 on the underlying layer 23 after forming the underlying layer 23 on the side wall 21 of the through hole 20, it is possible to prevent the thickness of the through electrode 22 from becoming insufficient at a specific position. can do. Also, the adhesion of the through electrode 22 to the side wall 21 can be enhanced.

(Modified Example of Through Electrode Material of Through Electrode Substrate)
In the above-described embodiment, the example in which the first layer 241 of the intermediate layer 24 contains copper as a main component is shown. However, the material is not limited to this, and the first layer 241 of the intermediate layer 24 may contain nickel as a main component. For example, the first layer 241 may contain 80% by mass or more of nickel. The thickness of the first layer 241 containing nickel is, for example, 0.01 μm or more and 1.0 μm or less.

The first layer 241 of the intermediate layer 24 is formed by electroless plating, as in the above-described embodiments. The electroless plating solution contains, for example, nickel sulfate hexahydrate and water, and additives added as necessary. As the additive, for example, a complexing agent containing carboxylic acids such as formic acid, acetic acid, propionic acid, and succinic acid can be used. By adding a complexing agent to the electroless plating solution, it is possible to eliminate the need for etching treatment using fluoride, which is generally performed after electroless plating treatment.

A specific example of the composition of the electroless plating solution is shown below.
・Nickel ion 6g/L
・Sodium diphosphite 25g/L
・Acetic acid 40g/L
Mounting board
FIG. 25 is a cross-sectional view showing an example of a mounting substrate 60 including a through electrode substrate 10 and elements 50 mounted on the through electrode substrate 10. As shown in FIG. The element 50 is an LSI chip such as a logic IC or memory IC. Also, the element 50 may be a MEMS (Micro Electro Mechanical Systems) chip. A MEMS chip is an electronic device in which mechanical elements, sensors, actuators, electronic circuits, etc. are integrated on one substrate. As shown in FIG. 23, the element 50 has a terminal 51 electrically connected to a conductive layer such as the first surface third conductive layer 35 of the through electrode substrate 10 .

Examples of Products Mounted with Conducting Electrode Substrate FIG. 26 is a diagram showing an example of a product on which the through electrode substrate 10 according to the embodiment of the present disclosure can be mounted. The through electrode substrate 10 according to the embodiment of the present disclosure can be used in various products. For example, it is installed in a notebook personal computer 110, a tablet terminal 120, a mobile phone 130, a smart phone 140, a digital video camera 150, a digital camera 160, a digital clock 170, a server 180, and the like.

10 Through electrode substrate 12 Substrate 13 First surface 14 Second surface 15 Capacitor 16 Inductor 17 First wiring 18 First terminal 20 Through hole 21 Side wall 22 Through electrode 23 Base layer 24 Intermediate layer 241 First layer 242 Second layer 25 Main body Layer 26 Organic layer 27 Seed layer 30 First wiring structure portion 31 First surface first conductive layer 32 First surface first inorganic layer 33 First surface second conductive layer 34 First surface first organic layer 35 First surface second 3 conductive layer 36 first surface second organic layer 37 resist layer 38 resist layer 40 second wiring structure portion 41 second surface first conductive layer 43 second surface first organic layer 50 element 51 terminal 60 mounting board

Claims (15)

a substrate including a first surface and a second surface opposite to the first surface and provided with a through hole;
a through electrode positioned in the through hole of the substrate,
the thickness of the through electrode is smaller than the width of the through hole,
The through electrodes are
an intermediate layer located on the side wall of the through hole and including at least a first layer containing copper or nickel;
a body layer located on the intermediate layer and comprising copper;
the through electrode further includes a conductive base layer positioned between the side wall of the through hole and the first layer;
the through hole at least partially has a shape that decreases in width from the first surface toward the second surface of the substrate;
When a portion of the through electrode corresponding to the first surface of the substrate is referred to as a first portion, and a portion corresponding to the position where the width of the through hole is the smallest is referred to as a second portion, the following relational expression (1) and (2) are established,
(X2/Y2)<(X1/Y1) (1)
(X2/Z2)<(X1/Z1) (2)
X1 represents the thickness of the underlying layer in the first portion,
Y1 represents the thickness of the intermediate layer in the first portion,
Z1 represents the thickness of the body layer in the first portion,
X2 represents the thickness of the underlying layer in the second portion,
Y2 represents the thickness of the intermediate layer in the second portion,
Z2 represents the thickness of the main body layer in the second portion of the through electrode substrate. 2. The through electrode substrate according to claim 1, wherein said first layer extends at least partially onto said first surface or onto said second surface. The through electrode substrate according to claim 1 or 2 , wherein the first layer contains 80% by mass or more of copper and has a thickness of 0.01 µm or more and 2.0 µm or less. The through electrode substrate according to claim 1 or 2 , wherein the first layer contains 80% by mass or more of nickel and has a thickness of 0.01 µm or more and 2.0 µm or less. 2. The intermediate layer further comprises a second layer located between the first layer and the main layer, containing 80% by mass or more of copper, and having a thickness of 0.01 μm or more and 2 μm or less. 5. The through electrode substrate according to any one of items 1 to 4 . 2. The through electrode substrate according to claim 1 , wherein said through electrode is positioned between said base layer and said first layer, and further comprises a catalyst containing palladium. The through electrode substrate according to claim 1 or 6 , wherein the through hole has a minimum width at a portion corresponding to the second surface of the substrate. The through electrode substrate according to any one of claims 1 to 7 , wherein the body layer has a thickness of 5 µm or more and 20 µm or less. The through electrode substrate according to any one of claims 1 to 8 , wherein the substrate contains glass. a first conductive layer electrically connected to the through electrode; a first inorganic layer located on the first conductive layer, containing an inorganic material and having insulating properties; and located on the first inorganic layer. The through electrode substrate according to any one of claims 1 to 9 , further comprising a capacitor having a second conductive layer. The through electrode, a conductive layer electrically connected to the through electrode and located on the first surface side, and a conductive layer electrically connected to the through electrode and located on the second surface side. 11. The through electrode substrate according to any one of claims 1 to 10 , further comprising an inductor having . The through electrode substrate according to any one of claims 1 to 11 ;
and an element mounted on the through electrode substrate. A method for manufacturing a through electrode substrate according to claim 1 ,
providing the substrate;
a through electrode forming step of forming the through electrode in the through hole of the substrate;
The through electrode forming step includes:
forming the first layer by an electroless plating method;
and forming the body layer on the intermediate layer including the first layer by electroplating. 14. The method for manufacturing a through electrode substrate according to claim 13 , further comprising the step of forming a second layer containing copper on said first layer by electroplating. The method for manufacturing a through electrode substrate according to claim 13 or 14 , wherein the substrate contains glass.

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