JP2018110157A - Through electrode substrate, mounting substrate including through electrode substrate, and manufacturing method of through electrode substrate - Google Patents

Abstract

PROBLEM TO BE SOLVED: To provide a through electrode substrate in which no seed layer thickness occurs and a mounting substrate including a through electrode substrate.SOLUTION: A through electrode substrate includes a substrate 12 including a first surface 13 and a second surface 14 located on the opposite side of the first surface and provided with a through hole 20, and a through electrode 22 positioned in the through hole of the substrate. The through electrode includes a first conductive layer 221 partially positioned at least on a side wall 21 of the through hole, a second conductive layer 222 positioned on the first conductive layer and including nickel, and a third conductive layer 223 positioned on the second conductive layer and containing copper.SELECTED DRAWING: Figure 2

Description

  Embodiments of the present disclosure relate to a through electrode substrate including a through electrode. The present disclosure also relates to a mounting substrate including a through electrode substrate, and a method for manufacturing the through electrode substrate.

  A member including a substrate including a first surface and a second surface, a plurality of through holes provided in the substrate, and a through electrode positioned inside the through hole, a so-called through electrode substrate is used in various applications. ing. For example, the through electrode substrate is used as an interposer interposed between two LSI chips when a plurality of LSI chips are stacked in order to increase the mounting density of LSIs. Further, the through electrode substrate may be interposed between an element such as an LSI chip and a mounting substrate such as a mother board.

  As examples of through electrodes, so-called filled vias and conformal vias are known. In the case of filled vias, the through electrode includes a conductive material such as copper filled in the through hole. In the case of a conformal via, the through electrode includes a sidewall conductive layer extending along the sidewall of the hole.

  As a method of forming the through electrode, for example, as disclosed in Patent Document 1, first, a seed layer is formed on the side wall of the through hole, and then a plating layer is formed on the seed layer by electrolytic plating. The method is known.

JP-A-6-89831

  When the seed layer is formed on the side wall of the through hole by a physical film formation method such as a sputtering method or a vapor deposition method, the thickness of the seed layer may vary depending on the position. For example, when the physical film formation method is performed from the first surface side of the substrate, the thickness of the seed layer on the side wall of the through hole may be reduced as the distance from the first surface increases. As a result, a portion where the thickness of the plating layer on the seed layer is insufficient may occur.

  An object of the embodiment of the present disclosure is to provide a through electrode substrate that can effectively solve such a problem.

  One embodiment of the present disclosure includes a substrate including a first surface and a second surface positioned on the opposite side of the first surface and provided with a through hole, a through electrode positioned in the through hole of the substrate, The through electrode includes a first conductive layer located at least partially on a side wall of the through hole, a second conductive layer located on the first conductive layer and containing nickel, and the second conductive layer A through electrode substrate having a third conductive layer located above and including copper.

  In the through electrode substrate according to an embodiment of the present disclosure, the through electrode may further include a catalyst that is located between the first conductive layer and the second conductive layer and includes palladium.

  In the through electrode substrate according to an embodiment of the present disclosure, the second conductive layer may include 80% by mass or more of nickel.

  In the through electrode substrate according to an embodiment of the present disclosure, the third conductive layer may include 80% by mass or more of copper.

  In the through electrode substrate according to an embodiment of the present disclosure, a part of the second conductive layer may be in contact with the side wall of the through hole.

  In the through electrode substrate according to an embodiment of the present disclosure, the thickness of the first conductive layer may be 1.0 μm or less.

  In the through electrode substrate according to an embodiment of the present disclosure, the thickness of the second conductive layer may be not less than 0.1 μm and not more than 1.0 μm.

  In the through electrode substrate according to an embodiment of the present disclosure, the thickness of the third conductive layer may be not less than 5 μm and not more than 20 μm.

In the through electrode substrate according to an embodiment of the present disclosure, the through hole has a shape in which a width decreases at least partially toward the second surface from the first surface of the substrate, Of these, when a portion corresponding to the first surface of the substrate is referred to as a first portion and a portion corresponding to a position where the width of the through hole is minimum is referred to as a second portion, the following relational expression (1) and (2) may be established.
(X2 / Y2) <(X1 / Y1) (1)
(X2 / Y3) <(X1 / Y3) (2)
X1 represents the thickness of the first conductive layer in the first portion.
Y1 represents the thickness of the second conductive layer in the first portion.
Z1 represents the thickness of the third conductive layer in the first portion.
X2 represents the thickness of the first conductive layer in the second portion.
Y2 represents the thickness of the second conductive layer in the second portion.
Z2 represents the thickness of the third conductive layer in the second portion.

  In the through electrode substrate according to an embodiment of the present disclosure, the width of the through hole may be minimized at a central portion in the thickness direction of the substrate.

  In the through electrode substrate according to an embodiment of the present disclosure, the width of the through hole may be minimized at a portion corresponding to the second surface of the substrate.

  In the through electrode substrate according to an embodiment of the present disclosure, the substrate may include glass.

  A through electrode substrate according to an embodiment of the present disclosure includes a first conductive layer electrically connected to the through electrode, a first inorganic layer that is located on the first conductive layer, includes an inorganic material, and has an insulating property. A capacitor having a layer and a second conductive layer located on the first inorganic layer may be further provided.

  A through electrode substrate according to an embodiment of the present disclosure is electrically connected to the through electrode, the through electrode, a conductive layer located on the first surface side, and the through electrode. And an inductor having a conductive layer located on the second surface side.

  One embodiment of the present disclosure is a mounting substrate including the above-described through electrode substrate and an element mounted on the through electrode substrate.

  One embodiment of the present disclosure includes a step of preparing a substrate including a first surface and a second surface located on the opposite side of the first surface and provided with a through hole; and a through electrode in the through hole of the substrate A through electrode forming step of forming a first conductive layer on a side wall of the through hole by a physical film formation method, and a catalyst on the surface of the first conductive layer. A step of attaching, a step of forming a second conductive layer on the first conductive layer by an electroless plating method, and a step of forming a third conductive layer on the second conductive layer by an electrolytic plating method. This is a method of manufacturing a through electrode substrate.

  In the method for manufacturing a through electrode substrate according to an embodiment of the present disclosure, the second conductive layer may include nickel, and the third conductive layer may include copper.

  In the method for manufacturing a through electrode substrate according to an embodiment of the present disclosure, the first conductive layer is also formed on the first surface, and the manufacturing method includes: placing the second conductive layer on the first conductive layer; The step of partially forming a resist layer containing an acrylic resin on the first conductive layer on the first surface may be further included.

  In the method for manufacturing a through electrode substrate according to an embodiment of the present disclosure, the through hole has a shape that decreases in width at least partially toward the second surface from the first surface of the substrate. Also good.

  In the method for manufacturing a through electrode substrate according to an embodiment of the present disclosure, the substrate may include glass.

One embodiment of the present disclosure includes a substrate including a first surface and a second surface positioned on the opposite side of the first surface and provided with a through hole, a through electrode positioned in the through hole of the substrate, And the through electrode is positioned on the second conductive layer, a first conductive layer positioned at least partially on a side wall of the through hole, a second conductive layer positioned on the first conductive layer, and the second conductive layer. A portion corresponding to the first surface of the substrate among the through electrodes is referred to as a first portion, and a portion corresponding to an intermediate position in the thickness direction of the substrate is a second portion. Is a through electrode substrate that satisfies the following relational expressions (1) and (2).
(X2 / Y2) <(X1 / Y1) (1)
(X2 / Z2) <(X1 / Z1) (2)
X1 represents the thickness of the first conductive layer in the first portion,
Y1 represents the thickness of the second conductive layer in the first portion,
Z1 represents the thickness of the third conductive layer in the first portion,
X2 represents the thickness of the first conductive layer in the second portion,
Y2 represents the thickness of the second conductive layer in the second portion,
Z2 represents the thickness of the third conductive layer in the second portion.

  According to the embodiment of the present disclosure, it is possible to suppress the occurrence of a portion where the thickness of the through electrode is insufficient.

It is sectional drawing which shows the penetration electrode board | substrate which concerns on one Embodiment. It is sectional drawing which expands and shows the penetration electrode of a penetration electrode board | substrate. It is sectional drawing which expands and further shows the penetration electrode of FIG. It is a top view which shows the 1st surface 1st conductive layer of a penetration electrode substrate. It is a top view which shows the 1st surface 1st inorganic layer and 1st surface 2nd conductive layer of a penetration electrode substrate. It is sectional drawing which shows the modification of the through-hole of a through-electrode board | substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is a figure which shows the manufacturing process of a penetration electrode substrate. It is sectional drawing which shows the penetration electrode board | substrate which concerns on one modification. It is a figure which shows the 1st modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 1st modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 2nd modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 2nd modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 2nd modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 2nd modification of the manufacturing process of a penetration electrode substrate. It is a figure which shows the 2nd modification of the manufacturing process of a penetration electrode substrate. It is sectional drawing which shows an example of a mounting substrate provided with a penetration electrode substrate and an element. It is a figure which shows the example of the product in which a penetration electrode substrate is mounted.

  Hereinafter, a configuration of a through electrode substrate and a manufacturing method thereof according to an embodiment of the present disclosure will be described in detail with reference to the drawings. The following embodiments are examples of embodiments of the present disclosure, and the present disclosure is not construed as being limited to these embodiments. Further, in this specification, terms such as “substrate”, “base material”, “sheet”, and “film” are not distinguished from each other only based on the difference in names. For example, “substrate” and “base material” are concepts including members that can be called sheets and films. Furthermore, as used in this specification, the shape and geometric conditions and the degree thereof are specified. For example, terms such as “parallel” and “orthogonal”, length and angle values, and the like are bound to a strict meaning. Therefore, it should be interpreted including the extent to which similar functions can be expected. In the drawings referred to in this embodiment, the same portions or portions having similar functions are denoted by the same reference symbols or similar reference symbols, and repeated description thereof may be omitted. In addition, the dimensional ratio in the drawing may be different from the actual ratio for convenience of explanation, or a part of the configuration may be omitted from the drawing.

Through electrode substrate will be described below embodiments of the present disclosure. First, the configuration of the through electrode substrate 10 according to the present embodiment will be described. FIG. 1 is a cross-sectional view showing the through electrode substrate 10.

  The through electrode substrate 10 includes a substrate 12, a through electrode 22, a first wiring structure unit 30, and a second wiring structure unit 40. Hereinafter, each component of the through electrode substrate 10 will be described.

(substrate)
The substrate 12 includes a first surface 13 and a second surface 14 located on the opposite side of the first surface 13. The substrate 12 is provided with a plurality of through holes 20 extending from the first surface 13 to the second surface 14.

The substrate 12 includes an inorganic material having a certain insulating property. For example, the substrate 12 is a glass substrate, quartz substrate, sapphire substrate, resin substrate, silicon substrate, silicon carbide substrate, alumina (Al ₂ O ₃ ) substrate, aluminum nitride (AlN) substrate, zirconium oxide (ZrO ₂ ) substrate, etc. Alternatively, these substrates are stacked. The substrate 12 may partially include a substrate made of a conductive material such as an aluminum substrate or a stainless steel substrate.

  Examples of the glass used for the substrate 12 include non-alkali glass. The alkali-free glass is a glass that does not contain an alkali component such as sodium or potassium. The alkali-free glass includes, for example, boric acid instead of an alkali component. The alkali-free glass includes an alkaline earth metal oxide such as calcium oxide or barium oxide. Examples of the alkali-free glass include EN-A1 manufactured by Asahi Glass and Eagle XG manufactured by Corning. When the substrate 12 includes glass, the thickness T of the substrate 12 is, for example, not less than 0.25 mm and not more than 0.45 mm. When the substrate 12 includes glass, the insulation of the substrate 12 can be improved. Thereby, when the capacitor 15 is formed by a part of the first wiring structure 30 as described later, the withstand voltage characteristic of the capacitor 15 can be enhanced.

  In FIG. 1, symbol S <b> 1 represents the width of the through hole 20 at a position where the through hole 20 is connected to the first surface 13. The width S1 is, for example, not less than 40 μm and not more than 150 μm. Further, the ratio of the length of the through hole 20 to the width S1 of the through hole 20, that is, the aspect ratio of the through hole 20, is, for example, 4 or more and 10 or less.

  The through hole 20 formed in the substrate 12 may at least partially have a shape whose width decreases as it goes from the first surface 13 to the second surface 14 of the substrate 12. In the example shown in FIG. 1, the through hole 20 has a shape whose width decreases from the first surface 13 and the second surface 14 of the substrate 12 toward the central portion in the thickness direction of the substrate 12. As a result, the width of the through-hole 20 is minimized at the central portion in the thickness direction of the substrate 12, as indicated by reference numeral S2 in FIG. The “center portion” refers to an intermediate position in the thickness direction of the substrate 12, a range from the intermediate position to the first surface 13 side to 0.1 × T, and an intermediate position from the intermediate surface to the second surface 14 side. The range up to xT is included. The symbol T represents the thickness of the substrate 12 as described above.

(Penetration electrode)
The through electrode 22 is a member that is located inside the through hole 20 and has conductivity. In the present embodiment, the thickness of the through electrode 22 is smaller than the width of the through hole 20, and therefore there is a space where the through electrode 22 does not exist inside the through hole 20. That is, the through electrode 22 is a so-called conformal via. The thickness of the through electrode 22 is, for example, not less than 5.1 μm and not more than 22 μm.

  FIG. 2 is an enlarged cross-sectional view of the through electrode 22 provided in the through hole 20. The through electrode 22 includes at least a first conductive layer 221, a second conductive layer 222, and a third conductive layer 223.

  The first conductive layer 221 is a conductive layer located at least partially on the side wall 21 of the through hole 20. The first conductive layer 221 is formed on the sidewall 21 by a physical film formation method such as a sputtering method or an evaporation method, a sol-gel method, or the like. Preferably, the first conductive layer 221 is formed on the sidewall 21 by a sputtering method. Thereby, the first conductive layer 221 can be firmly attached to the side wall 21. Although not shown, the side wall 21 may have a portion where the first conductive layer 221 is not formed. For example, the first conductive layer 221 may not be formed in the central portion of the through hole 20 in the thickness direction, or the material constituting the first conductive layer 221 may be scattered. The thickness of the first conductive layer 221 is, for example, not less than 0.05 μm and not more than 1.0 μm.

  When the first conductive layer 221 is formed by a physical film formation method, the material constituting the first conductive layer 221 is a metal such as titanium, chromium, copper, an alloy using these, or a laminate of these. Can be used. In the case where the first conductive layer 221 is formed by a sol-gel method, zinc oxide or the like can be used as a material constituting the first conductive layer 221. The first conductive layer 221 may further include an electroless plating layer containing copper formed on the sol-gel layer by an electroless plating method in addition to the sol-gel layer formed by the sol-gel method.

  The second conductive layer 222 is a conductive layer located on the first conductive layer 221. The second conductive layer 222 includes, for example, nickel as a main component, and more specifically includes 80% by mass or more of nickel. The second conductive layer 222 is formed on the first conductive layer 221 by an electroless plating method. As a method for analyzing the composition of the second conductive layer 222, for example, TEM (transmission electron microscope) or EDS (energy dispersive X-ray spectrometer) can be employed. The thickness of the second conductive layer 222 is, for example, not less than 0.01 μm and not more than 1.0 μm.

  Although not shown, a part of the second conductive layer 222 may be in direct contact with the side wall 21 of the through hole 20. For example, when the first conductive layer 221 is formed by a physical film forming method, the conductive material constituting the first conductive layer 221 cannot reach a part of the side wall 21 of the through hole 20, and thus the first A portion where the conductive layer 221 is not present may occur. In this case, a part of the second conductive layer 222 can be in contact with the side wall 21 of the through hole 20 in a portion of the side wall 21 where the first conductive layer 221 does not exist.

  Although not shown, the through electrode 22 may have a catalyst positioned between the first conductive layer 221 and the second conductive layer 222. The catalyst is for promoting the deposition of the second conductive layer 222 on the first conductive layer 221. The catalyst includes, for example, palladium.

  The third conductive layer 223 is a conductive layer located on the second conductive layer 222. The third conductive layer 223 includes, for example, copper as a main component, and more specifically includes 80% by mass or more of copper. The third conductive layer 223 is formed on the second conductive layer 222 by electrolytic plating. As a method for analyzing the composition of the third conductive layer 223, for example, TEM (transmission electron microscope) or EDS (energy dispersive X-ray spectrometer) can be employed. The thickness of the third conductive layer 223 is, for example, 5 μm or more and 20 μm or less. Note that another conductive layer such as a seed layer 224 described later may be provided between the second conductive layer 222 and the third conductive layer 223.

  Next, the thickness of each conductive layer constituting the through electrode 22 will be described in more detail. FIG. 3 is an enlarged view of the through electrode 22 of FIG.

  In FIG. 3, the symbol R <b> 1 represents a first portion of the through electrode 22 corresponding to the first surface 13 of the substrate 12. The first portion R1 is a portion of the through electrode 22 located in the range of 0.2 × T from the first surface 13 to the second surface 14 side in the thickness direction of the substrate 12. In FIG. 3, the symbol R <b> 2 represents the second portion R <b> 2 corresponding to the position in the through electrode 22 where the width of the through hole 20 is minimum. The second portion R2 includes a minimum width position where the width of the through-hole 20 is the minimum width S2, a range from the minimum width position to the first surface 13 side to 0.2 × T, and a second position from the minimum width position. It is a part of the penetration electrode 22 located in the range up to 0.2 × T toward the surface 14 side.

  When the first conductive layer 221 is formed on the side wall 21 of the through-hole 20 by the physical film formation method from the first surface 13 side, the thickness of the first conductive layer 221 formed on the side wall 21 of the through-hole 20 is the first The distance decreases as the distance from the surface 13 increases. For example, the thickness X2 of the first conductive layer 221 in the second portion R2 is smaller than the thickness X1 of the first conductive layer 221 in the first portion R1. In this case, when the third conductive layer 223 is formed on the first conductive layer 221 by electrolytic plating, the thickness of the third conductive layer 223 formed on the first conductive layer 221 of the second portion R2 is also reduced. There is a possibility that the conductivity in the two portions R2 becomes inappropriate. In other words, in the second portion R2, there is a possibility that the thickness of the third conductive layer 223 or the thickness of the entire through electrode 22 is insufficient. The second conductive layer 222 is a conductive layer formed in order to solve the problem that may be caused by the insufficient thickness of the first conductive layer 221.

In FIG. 3, the symbol Y1 represents the thickness of the second conductive layer 222 in the first portion R1, and the symbol Z1 represents the thickness of the third conductive layer 223 in the first portion R1. The symbol Y2 represents the thickness of the second conductive layer 222 in the second portion R2, and the symbol Z2 represents the thickness of the third conductive layer 223 in the second portion R2. Preferably, the following relational expression (1) is established between the first part R1 and the second part R2.
(X2 / Y2) <(X1 / Y1) (1)
Relational expression (1) can be rewritten as Y2> (X2 / X1) * Y1. By forming the second conductive layer 222 so that the relational expression (1) is established, the second conductive layer 222 can compensate for the lack of thickness of the first conductive layer 221 in the second portion R2. Thus, the third conductive layer 223 can be formed so that the following relational expression (2) is satisfied.
(X2 / Z2) <(X1 / Z1) (2)
Relational expression (2) can be rewritten as Z2> (X2 / X1) * Z1.

(First wiring structure)
Next, the first wiring structure unit 30 will be described. The first wiring structure portion 30 has layers such as a conductive layer and an insulating layer provided on the first surface 13 side so as to form an electric circuit on the first surface 13 side of the substrate 12. As will be described later, the capacitor 15 is constituted by a part of the first wiring structure portion 30. A part of the inductor 16 is constituted by a part of the first wiring structure part 30. In the present embodiment, the first wiring structure 30 includes a first surface first conductive layer 31, a first surface first inorganic layer 32, a first surface second conductive layer 33, a first surface first organic layer 34, It has a first surface third conductive layer 35 and a first surface second organic layer 36.

[First surface, first conductive layer]
The first surface first conductive layer 31 is a conductive layer located on the first surface 13 of the substrate 12. The first surface first conductive layer 31 may be electrically connected to the through electrode 22. Moreover, the 1st surface 1st conductive layer 31 may be comprised from the single layer which has electroconductivity, or may contain the several layer which has electroconductivity. For example, the first conductive layer 31 of the first surface includes the first conductive layer 221, the second conductive layer 222, and the third conductive layer 223 that are sequentially stacked on the first surface 13 of the substrate 12, similarly to the through electrode 22. May be included. The first surface first conductive layer 31 may include only a part of the first conductive layer 221, the second conductive layer 222, and the third conductive layer 223. The material constituting the first surface first conductive layer 31 is the same as the material constituting the through electrode 22. The thickness of the first surface first conductive layer 31 is, for example, not less than 100 nm and not more than 20 μm.

  By forming the first conductive layer 221 on at least the first surface 13 and the first portion R1, the adhesion of the first surface first conductive layer 31 to the first surface 13 and the first portion R1 is improved. Thereby, for example, in etching for removing unnecessary portions of the first conductive layer 221, the first surface 13 and the first surface 13 which are exposed to the etchant more strongly than the first conductive layer 221 located in the central portion of the through hole 20 and It can suppress that the 1st conductive layer 221 located in 1st part R1 peels.

  FIG. 4 is a plan view showing a through electrode 22 of the through electrode substrate 10 and a first surface first conductive layer 31 to be described later when viewed from the first surface 13 side. The first surface first conductive layer 31 is provided on the first surface 13 side of the substrate 12 so as to constitute at least a capacitor 15 and an inductor 16 to be described later. In FIG. 4, layers such as a first-surface first inorganic layer 32 (to be described later) stacked on the first-surface first conductive layer 31 are omitted. FIG. 1 corresponds to a cross-sectional view of the through electrode substrate 10 shown in FIG. 4 and FIG. 5 described later, taken along line AA.

[First surface, first inorganic layer]
The first surface first inorganic layer 32 is a layer that is at least partially positioned on the first surface first conductive layer 31 and the first surface 13 of the substrate 12, contains an inorganic material, and has an insulating property. As the inorganic material of the first surface first inorganic layer 32, silicon nitride such as SiN can be used. Other examples of the inorganic material of the first surface first inorganic layer 32 include silicon oxide, aluminum oxide, and tantalum pentoxide. The relative dielectric constant of the inorganic material of the first surface first inorganic layer 32 is, for example, 3 or more and 50 or less. Moreover, the thickness of the 1st surface 1st inorganic layer 32 is 50 nm or more and 400 nm or less, for example. The first surface first inorganic layer 32 may be composed of a single layer or may include a plurality of layers.

  The first surface first inorganic layer 32 may partially cover the first surface first conductive layer 31. For example, the first surface first inorganic layer 32 may cover the end portion 31 e of the first surface first conductive layer 31 constituting the capacitor 15. Thereby, it is possible to prevent the first surface first conductive layer 31 from being damaged by the chemical solution used in the step of forming the first surface second conductive layer 33, the first surface first organic layer 34, and the like. As shown in FIG. 1, “cover” refers to the end portion 31 e of the first conductive layer 31 on the first surface when the through electrode substrate 10 is viewed along the normal direction of the first surface 13 of the substrate 12. Means that the first surface first inorganic layer 32 overlaps.

[First surface, second conductive layer]
The first surface second conductive layer 33 is a conductive layer located on the first surface first inorganic layer 32. As shown in FIG. 1, the end portion 33 e of the first surface second conductive layer 33 is located on the first surface first inorganic layer 32. The first surface first conductive layer 31 described above, the first surface first inorganic layer 32 positioned on the first surface first conductive layer 31, and the first surface positioned on the first surface first inorganic layer 32. The capacitor 15 is configured by the surface second conductive layer 33.

  The first surface second conductive layer 33 may include a plurality of conductive layers sequentially stacked on the first surface first inorganic layer 32, similarly to the through electrode 22 and the first surface first conductive layer 31. . The material constituting the first surface second conductive layer 33 is the same as the material constituting the through electrode 22 and the first surface first conductive layer 31. The thickness of the 1st surface 2nd conductive layer 33 is 100 nm or more and 20 micrometers or less, for example.

  FIG. 5 is a plan view showing the first surface first conductive layer 31, the first surface first inorganic layer 32, and the first surface second conductive layer 33 of the through electrode substrate 10 as viewed from the first surface 13 side. is there. In FIG. 5, layers such as a first-surface first organic layer 34 and a first-surface third conductive layer 35 described later, which are stacked on the first-surface second conductive layer 33, are omitted. Moreover, in FIG. 5, the component covered with the 1st surface 1st inorganic layer 32 is represented by the dotted line.

  As shown in FIG. 5, the first surface first inorganic layer 32 covers the first surface 13 and the first surface first conductive layer 31 of the substrate 12 over a wide area. For example, the first surface first inorganic layer 32 covers at least the end portion 31 e of the first surface first conductive layer 31 constituting the capacitor 15. The first surface first inorganic layer 32 covers the first surface 13 of the substrate 12 and the first surface first conductive layer 31 over a wide area, whereby the first surface 13 and the first surface 13 of the substrate 12 in the manufacturing process of the through electrode substrate 10. It is possible to prevent the surface first conductive layer 31 from being damaged.

  As shown in FIG. 5, an opening 32 a is formed in the first surface first inorganic layer 32. The opening 32 a is formed at a limited position such as the position of the through hole 20 and the connection position of the first surface first conductive layer 31 and the first surface third conductive layer 35.

[First surface, first organic layer]
The 1st surface 1st organic layer 34 is a layer which is located on the 1st surface 1st inorganic layer 32 and the 1st surface 2nd conductive layer 33, contains an organic material, and has insulation. As the organic material of the first surface first organic layer 34, polyimide, epoxy, or the like can be used. The organic material of the first surface first organic layer 34 preferably has a dielectric loss tangent of 0.003 or less, more preferably 0.002 or less, and still more preferably 0.001 or less. By configuring the first surface first organic layer 34 using an organic material having a small dielectric loss tangent, it is possible to suppress an electrical signal that should pass through the capacitor 15 and the inductor 16 from passing through the first surface first organic layer 34. be able to. Thereby, the band of the through electrode substrate 10 including the capacitor 15 and the inductor 16 can be expanded to the high frequency side.

[First surface, third conductive layer]
The first surface third conductive layer 35 is a conductive layer located on the first surface first conductive layer 31 or the first surface second conductive layer 33. In the example shown in FIG. 1, the first-surface third conductive layer 35 is a portion connected to the first-surface first conductive layer 31 that is one electrode of the capacitor 15 and the second electrode that is the other electrode of the capacitor 15. A portion connected to the first conductive layer 33 on the first surface is included.

  The first surface third conductive layer 35 may include a plurality of conductive layers stacked in order, like the through electrode 22 and the first surface first conductive layer 31. The material constituting the first surface third conductive layer 35 is the same as the material constituting the through electrode 22 and the first surface first conductive layer 31.

[First side, second organic layer]
The first surface second organic layer 36 is a layer that is located on the first surface first organic layer 34 and the first surface third conductive layer 35, includes an organic material, and has an insulating property. Like the first surface first organic layer 34, the first surface second organic layer 36 is preferably an organic material having a dielectric loss tangent of 0.003 or less, more preferably 0.002 or less, and even more preferably 0.001 or less. Contains materials. As the organic material of the first surface second organic layer 36, as with the first surface first organic layer 34, polyimide, epoxy, or the like can be used.

(Second wiring structure)
Next, the second wiring structure unit 40 will be described. The second wiring structure unit 40 includes layers such as a conductive layer and an insulating layer provided on the second surface 14 side so as to form an electric circuit on the second surface 14 side of the substrate 12. The inductor 16 is configured by a part of the second wiring structure part 40, a part of the first wiring structure part 30 and the through electrode 22 described above. In the present embodiment, the second wiring structure unit 40 includes a second surface first conductive layer 41 and a second surface first organic layer 43.

[Second surface, first conductive layer]
The second surface first conductive layer 41 is a conductive layer located on the second surface 14 of the substrate 12. The second surface first conductive layer 41 may be electrically connected to the through electrode 22.

  Similar to the through electrode 22 and the first surface first conductive layer 31, the second surface first conductive layer 41 includes a first conductive layer 221 and a second conductive layer 222 that are sequentially stacked on the second surface 14 of the substrate 12. And the third conductive layer 223 may be included. The second surface first conductive layer 41 may include only a part of the first conductive layer 221, the second conductive layer 222, and the third conductive layer 223. The material constituting the second surface first conductive layer 41 is the same as the material constituting the through electrode 22. The thickness of the second surface first conductive layer 41 is, for example, not less than 100 nm and not more than 20 μm.

[Second side, first organic layer]
The second surface first organic layer 43 is a layer that is located on the second surface first conductive layer 41 and the second surface 14 of the substrate 12, contains an organic material, and has an insulating property. Similarly to the first surface first organic layer 34 and the first surface second organic layer 36, the second surface first organic layer 43 is preferably 0.003 or less, more preferably 0.002 or less, and still more preferably 0. Organic materials having a dielectric loss tangent of .001 or less are included. As the organic material of the second surface first organic layer 43, polyimide, epoxy, or the like can be used as in the first surface first organic layer 34 and the first surface second organic layer 36.

(Modified example of through hole)
FIG. 6 is a cross-sectional view showing a modification of the through hole 20. As shown in FIG. 6, the through electrode substrate 10 may include an organic layer 26 positioned closer to the center of the through hole 20 than the through electrode 22. The “center side” means that the distance between the organic layer 26 and the side wall 21 is larger than the distance between the through electrode 22 and the side wall 21 in the through hole 20. The organic layer 26 includes an organic material having a dielectric loss tangent of preferably 0.003 or less, more preferably 0.002 or less, and still more preferably 0.001 or less. As an organic material of the organic layer 26, polyimide, epoxy, or the like can be used. By configuring the organic layer 26 using an organic material having a small dielectric loss tangent, it is possible to suppress a part of the electrical signal that should pass through the capacitor 15 and the inductor 16 from passing through the organic layer 26. Thereby, the band of the through electrode substrate 10 including the capacitor 15 and the inductor 16 can be expanded to the high frequency side.

  Although not shown, the through electrode 22 may be a filled via filled in the through hole 20. In this case, the through electrode 22 extends at least partially to the center point of the through hole 20 in the surface direction of the first surface 13.

Method for producing a through electrode substrate Hereinafter, an example of a manufacturing method of the through electrode substrate 10 will be described with reference to FIGS. 7 through 14.

(Through hole forming process)
First, the substrate 12 is prepared. Next, a resist layer is provided on at least one of the first surface 13 and the second surface 14. Thereafter, an opening is provided at a position corresponding to the through hole 20 in the resist layer. Next, by processing the substrate 12 in the opening of the resist layer, the through hole 20 can be formed in the substrate 12 as shown in FIG. As a method for processing the substrate 12, a dry etching method such as a reactive ion etching method or a deep reactive ion etching method, a wet etching method, or the like can be used.

  The through hole 20 may be formed in the substrate 12 by irradiating the substrate 12 with a laser. In this case, the resist layer may not be provided. As a laser for laser processing, an excimer laser, an Nd: YAG laser, a femtosecond laser, or the like can be used. When an Nd: YAG laser is employed, a fundamental wave having a wavelength of 1064 nm, a second harmonic having a wavelength of 532 nm, a third harmonic having a wavelength of 355 nm, or the like can be used.

  Further, laser irradiation and wet etching can be appropriately combined. Specifically, first, a deteriorated layer is formed in a region of the substrate 12 where the through hole 20 is to be formed by laser irradiation. Subsequently, the altered layer is etched by immersing the substrate 12 in hydrogen fluoride or the like. Thereby, the through hole 20 can be formed in the substrate 12. In addition, the through holes 20 may be formed in the substrate 12 by a blasting process in which an abrasive is sprayed onto the substrate 12.

  By processing the substrate 12 from both the first surface 13 side and the second surface 14 side, a through-hole 20 having a shape that decreases in width toward the central portion in the thickness direction of the substrate 12 shown in FIG. 7 is formed. can do.

(Penetration electrode formation process)
Next, the through electrode 22 is formed on the side wall 21 of the through hole 20. In the present embodiment, the first surface first conductive layer 31 is formed on a part of the first surface 13 of the substrate 12 simultaneously with the through electrode 22, and the second surface is formed on a portion of the second surface 14 of the substrate 12. An example of forming the first conductive layer 41 will be described.

  First, as shown in FIG. 8, the first conductive layer 221 is formed on the first surface 13, the second surface 14, and the sidewall 21 of the substrate 12 by a physical film formation method or a sol-gel method. The first conductive layer 221 is preferably formed by physical film formation, particularly preferably by sputtering. Thereby, the first conductive layer 221 can be firmly adhered to the first surface 13, the second surface 14, and the side wall 21 of the substrate 12. A physical film formation method such as sputtering or vapor deposition is preferably performed from both the first surface 13 side and the second surface 14 side. In this case, the conductive material flying from the first surface 13 side and the conductive material flying from the second surface 14 side adhere to the side wall 21 of the through hole 20.

  Subsequently, a catalyst attaching step for attaching the catalyst to the surface of the first conductive layer 221 is performed. The catalyst attaching step includes, for example, a step of immersing the substrate 12 provided with the first conductive layer 221 in a catalyst solution containing a catalyst such as palladium.

  The catalyst solution can be obtained, for example, by diluting a solution obtained by dissolving palladium chloride in hydrochloric acid with water. The catalyst solution may further contain stannous chloride.

  When the catalyst solution contains stannous chloride, a tin removal step of removing tin from the substrate 12 may be performed after the catalyst attachment step. In the tin removal step, for example, a treatment liquid containing sulfuric acid, an organic acid and water, and an additive added as necessary is used.

  A cleaning process for cleaning the substrate 12 may be performed before the catalyst adhesion process. In the cleaning step, for example, the substrate 12 is degreased using an alkaline cleaning liquid. The alkaline cleaning liquid contains, for example, sodium carbonate, sodium hydroxide, monoethanolamine and water, and additives that are added as necessary.

  Subsequently, as shown in FIG. 9, a resist layer 37 is partially formed on the first conductive layer 221. As the material of the resist layer 37, a photosensitive material such as a dry film resist containing an acrylic resin can be used.

  Subsequently, as shown in FIG. 10, a second conductive layer 222 is formed on the first conductive layer 221 by electroless plating. For example, the substrate 12 is immersed in an electroless plating solution containing nickel. As a result, the second conductive layer 222 can be deposited on the first conductive layer 221 not covered with the resist layer 37.

  The electroless plating solution contains, for example, nickel sulfate hexahydrate and water, and additives that are added as necessary. As the additive, for example, a complexing agent containing carboxylic acids such as formic acid, acetic acid, propionic acid, and succinic acid can be used. By adding the complexing agent to the electroless plating solution, it is possible to eliminate the etching process using fluoride, which is performed after a general electroless plating process.

Specific examples of the composition of the electroless plating solution are shown below.
・ Nickel ion 6g / L
・ Sodium diphosphite 25g / L
・ Acetic acid 40g / L
By immersing the substrate 12 in the electroless plating solution having such a composition for 1 minute, the second conductive layer 222 having a thickness of about 0.1 μm can be deposited on the first conductive layer 221.

  Subsequently, as shown in FIG. 11, a third conductive layer 223 is formed on the second conductive layer 222 by electrolytic plating. For example, the substrate 12 is immersed in an electrolytic plating solution containing copper. Further, a current is passed through the first conductive layer 221 and the second conductive layer 222. Accordingly, the third conductive layer 223 can be deposited on the second conductive layer 222.

(Resist and conductive layer removal process)
Thereafter, as shown in FIG. 12, the resist layer 37 is removed. Further, the portion of the first conductive layer 221 covered with the resist layer 37 is removed by, for example, wet etching. In this way, the through electrode 22 including the first conductive layer 221, the second conductive layer 222, and the third conductive layer 223, the first surface first conductive layer 31, and the second surface first conductive layer 41 can be formed. it can. Accordingly, the second surface first conductive layer 41, the through electrode 22 electrically connected to the second surface first conductive layer 41, and the first surface first conductive layer electrically connected to the through electrode 22 Inductor 16 including 31 can be configured. Note that a step of annealing a conductive layer such as the third conductive layer 223 may be performed.

(Surface treatment process)
Next, a surface treatment step of exposing the surface of the first surface first conductive layer 31 to plasma such as NH ₃ plasma may be performed. Thereby, the oxide of the surface of the 1st surface 1st conductive layer 31 can be removed. For example, when the first surface first conductive layer 31 contains copper, the copper oxide on the surface of the first surface first conductive layer 31 can be removed. Thereby, the adhesiveness between the 1st surface 1st conductive layer 31 and the 1st surface 1st inorganic layer 32 formed on the 1st surface 1st conductive layer 31 can be improved.

(Formation process of 1st surface 1st inorganic layer and 1st surface 2nd conductive layer)
Next, as shown in FIG. 13, the first surface first inorganic layer 32 is formed on the first surface first conductive layer 31 and on the first surface 13 of the substrate 12. As a method of forming the first surface first inorganic layer 32, for example, plasma CVD, sputtering, or the like can be employed. Preferably, the process of forming the 1st surface 1st inorganic layer 32 is continuously implemented in the same apparatus as the case of the process of forming the 1st surface 1st conductive layer 31, and the surface treatment process. These steps are preferably performed in an atmosphere in which the first surface first conductive layer 31 is suppressed from being oxidized, for example, in an atmosphere of a reducing gas such as ammonia gas. Further, as shown in FIG. 13, the first surface second conductive layer 33 is formed on a part of the first surface first inorganic layer 32. Thus, the first surface first conductive layer 31, the first surface first inorganic layer 32 on the first surface first conductive layer 31, and the first surface second conductive layer on the first surface first inorganic layer 32. 33 can be configured. Since the process of forming the 1st surface 2nd conductive layer 33 is the same as the process of forming the 1st surface 1st conductive layer 31, description is abbreviate | omitted.

  In addition, the timing which patterns the 1st surface 1st inorganic layer 32 so that the 1st surface 1st inorganic layer 32 becomes a shape shown in FIG. 13 is arbitrary. For example, the first surface first inorganic layer 32 may be patterned before the first surface second conductive layer 33 is formed on the first surface first inorganic layer 32, and the first surface second conductive layer 33 is formed. After that, the first surface first inorganic layer 32 may be patterned. Moreover, although not shown in figure, after forming the 1st surface 1st organic layer 34 shown in FIG. 14 mentioned later on the 1st surface 2nd conductive layer 33, the 1st surface 1st organic layer 34 is used as a mask on the 1st surface. The first inorganic layer 32 may be patterned.

(Formation process of 1st surface 1st organic layer)
Next, as shown in FIG. 14, the first surface first organic layer 34 is formed on a portion of the first surface second conductive layer 33 and on a portion of the first surface first inorganic layer 32. For example, first, a first surface side film (not shown) having a photosensitive layer containing an organic material and a base material is attached to the first surface 13 side of the substrate 12. Subsequently, the first surface side film is subjected to exposure processing and development processing. Accordingly, the first surface first organic layer 34 made of the photosensitive layer of the first surface side film and having the opening 34 a formed thereon can be formed on the first surface 13 side of the substrate 12. At this time, in the same manner as in the case of the first surface first organic layer 34, the second surface 14 is partially formed on the second surface 14 of the substrate 12 and on the portion of the second surface first conductive layer 41 as shown in FIG. The surface first organic layer 43 may be formed.

  The opening 34a of the first surface first organic layer 34 is a position where the first surface third conductive layer 35 and the first surface first conductive layer 31 are connected, the first surface third conductive layer 35 and the first surface. It is formed on the first surface first inorganic layer 32 at a position where the second conductive layer 33 is connected.

  In addition, the formation method of the 1st surface 1st organic layer 34 and the 2nd surface 1st organic layer 43 is not restricted to the method using a film. For example, first, a liquid containing an organic material such as polyimide is applied by a spin coating method or the like, and dried to form an organic layer. Then, the 1st surface 1st organic layer 34 and the 2nd surface 1st organic layer 43 can also be formed by performing an exposure process and a development process to an organic layer.

  Further, as shown in FIG. 14, a part of the first surface first organic layer 34 and a part of the second surface first organic layer 43 reach the inside of the through hole 20. Alternatively, the organic layer 26 may be formed. The organic layer 26 may be formed inside the through hole 20 in a step different from the first surface first organic layer 34 and the second surface first organic layer 43.

  Thereafter, although not shown, the first surface third connected to the first surface first conductive layer 31 or the first surface second conductive layer 33 through the opening 34 a of the first surface first organic layer 34. The conductive layer 35 may be formed. Further, the first surface second organic layer 36 described above may be formed on a part of the first surface first organic layer 34 and on a portion of the first surface third conductive layer 35.

  Hereinafter, the operation brought about by the present embodiment will be described.

  In the present embodiment, as described above, after forming the first conductive layer 221 on the side wall 21 of the through hole 20, the second conductive layer 222 is formed on the first conductive layer 221 by electroless plating. For this reason, the second conductive layer 222 can be formed in a portion of the side wall 21 where the conductive material constituting the first conductive layer 221 is difficult to reach, for example, the central portion in the thickness direction of the substrate 12. Thus, the second conductive layer 222 can compensate for the lack of thickness of the first conductive layer 221 in the central portion of the through hole 20. Therefore, in the subsequent electrolytic plating process, the third conductive layer 223 having a sufficient thickness can be formed in the central portion of the through hole 20. As a result, it is possible to suppress a shortage of the thickness of the through electrode 22 in the central portion of the through hole 20. Therefore, the electrical resistance of the through electrode 22 from the first surface 13 side to the second surface 14 side can be sufficiently reduced. As a result, electrical characteristics of components such as the capacitor 15 and the inductor 16 can be improved.

  In the present embodiment, the first conductive layer 221 exists at least partially between the side wall 21 of the through hole 20 and the second conductive layer 222. The first conductive layer 221 has higher adhesion to the side wall 21 than the second conductive layer 222. For this reason, compared with the case where the penetration electrode 22 does not contain the 1st conductive layer 221, the adhesiveness of the penetration electrode 22 with respect to the side wall 21 can be improved.

  In the present embodiment, a plating solution containing nickel is used as a plating solution for forming the second conductive layer 222 by an electroless plating method. For this reason, the resist layer formed on the first conductive layer 221 on the first surface 13 and the first conductive layer 221 on the second surface 14 as compared with the case where electroless plating is performed using a plating solution containing copper. It can suppress that 37 is damaged.

  Note that various modifications can be made to the above-described embodiment. Hereinafter, modified examples will be described with reference to the drawings as necessary. In the following description and the drawings used in the following description, the same reference numerals as those used for the corresponding parts in the above embodiment are used for the parts that can be configured in the same manner as in the above embodiment. A duplicate description is omitted. In addition, when it is clear that the operational effects obtained in the above-described embodiment can be obtained in the modified example, the description thereof may be omitted.

(First modification of through electrode substrate)
In the above-described embodiment, an example is shown in which the width of the through hole 20 in the surface direction of the substrate 12 decreases from the first surface 13 and the second surface 14 of the substrate 12 toward the central portion in the thickness direction of the substrate 12. It was. However, the present invention is not limited to this, and as shown in FIG. 15, the width of the through hole 20 may become smaller from the first surface 13 side toward the second surface 14 side. In the example shown in FIG. 15, the width of the through hole 20 is minimized at a portion corresponding to the second surface 14 of the substrate 12. The “part corresponding to the second surface 14” is a part within a range of 0.2 × T from the second surface 14 toward the first surface 13 in the thickness direction of the substrate 12.

  Also in the present modification, the first conductive layer 221, the second conductive layer 222, and the third conductive layer 223 are disposed between the first portion R1 and the second portion R2 of the through electrode 22 as in the above-described embodiment. The above-described relational expressions (1) and (2) may be established. In the example shown in FIG. 15, the second portion R <b> 2 is a portion of the through electrode 22 that is located in the range of 0.2 × T from the second surface 14 to the first surface 13 side in the thickness direction of the substrate 12. is there. The definition of the 1st part R1 of the penetration electrode 22 is the same as the case of the above-mentioned embodiment.

(Second modification of through electrode substrate)
In the above-described embodiment, the second portion R2 of the through electrode 22 is defined as a portion corresponding to a position in the through electrode 22 where the width of the through hole 20 is minimum. On the other hand, when the first conductive layer 221 is formed on the side wall 21 of the through hole 20 by the physical film formation method, the first conductive layer 221 is generally at the intermediate position of the through hole 20 in the thickness direction of the substrate 12 regardless of the shape of the through hole 20. It is considered that the conductive layer 221 is hardly formed. For example, when the physical film forming method is performed from both the first surface 13 side and the second surface 14 side of the substrate 12, the thickness of the first conductive layer 221 is minimum at the intermediate position of the through hole 20 in the thickness direction of the substrate 12. There is a high probability of becoming. In consideration of such points, the second portion R2 of the through electrode 22 may be defined as a portion corresponding to an intermediate position of the through hole 20 in the thickness direction of the substrate 12. For example, the second portion R <b> 2 is arranged at an intermediate position in the thickness direction of the substrate 12, a range from the intermediate position to 0.2 × T toward the first surface 13, and 0.2 from the intermediate position toward the second surface 14. You may define as a part of penetration electrode 22 located in the range to * T. Also in this case, it is preferable that the relational expressions (1) and (2) regarding the first conductive layer 221, the second conductive layer 222, and the third conductive layer 223 between the first portion R1 and the second portion R2. ) Is established.

(First Modification of Manufacturing Method of Penetration Electrode Substrate)
In the above-described embodiment, the example in which the second conductive layer 222 is formed after the resist layer 37 is formed has been described. In the present modification and a second modification described later, an example in which the second conductive layer 222 is formed before the resist layer 37 is formed will be described.

  First, in the same manner as in the above-described embodiment, the substrate 12 having the first conductive layer 221 formed on the side wall 21 of the through hole 20 shown in FIG. 8 is prepared. Subsequently, a catalyst is deposited on the first conductive layer 221, and then the substrate 12 is immersed in a plating solution containing nickel. Thus, as shown in FIG. 16, the second conductive layer 222 is formed on the entire area of the first conductive layer 221 by electroless plating.

  Subsequently, as shown in FIG. 17, a resist layer 37 is partially formed on the second conductive layer 222. Thereafter, as shown in FIG. 17, a third conductive layer 223 is formed on the second conductive layer 222 by electrolytic plating. Thereafter, although not shown, the resist layer 37 is removed. Further, portions of the first conductive layer 221 and the second conductive layer 222 that are covered with the resist layer 37 are removed by, for example, wet etching. Thus, as in the case of the above-described embodiment shown in FIG. 12, the through electrode 22 including the first conductive layer 221, the second conductive layer 222, and the third conductive layer 223, the first surface first conductive layer. 31 and the second surface first conductive layer 41 can be formed.

  Thereafter, in the same manner as in the above-described embodiment, the first surface first inorganic layer 32, the first surface second conductive layer 33, the first surface first organic layer 34, the first surface third conductive layer 35, The first surface second organic layer 36, the second surface first organic layer 43, and the like are formed.

  Also in this modified example, after the first conductive layer 221 is formed on the side wall 21 of the through hole 20, the second conductive layer 222 is formed on the first conductive layer 221 by electroless plating, thereby penetrating at a specific position. It can suppress that the thickness of the electrode 22 is insufficient. Further, the adhesion of the through electrode 22 to the side wall 21 can be improved.

(Second modification of the method of manufacturing the through electrode substrate)
Hereinafter, with reference to FIGS. 18 to 22, a second modification of the method for manufacturing the through electrode substrate will be described.

  First, in the same manner as in the case of the second modification described above, the substrate 12 having the first conductive layer 221 and the second conductive layer 222 formed on the side wall 21 of the through hole 20 shown in FIG. Subsequently, as shown in FIG. 18, a resist layer 38 covering the through hole 20 is formed on the first surface 13 and the second surface 14. Thereafter, as shown in FIG. 19, portions of the first conductive layer 221 and the second conductive layer 222 on the first surface 13 that are not covered with the resist layer 38, and the first conductive layer on the second surface 14. Portions of the 221 and the second conductive layer 222 that are not covered with the resist layer 38 are removed by, for example, wet etching. Thereafter, as shown in FIG. 19, the resist layer 38 is removed.

  Subsequently, as shown in FIG. 20, a seed layer 224 is formed on the first surface 13, the second surface 14, and the second conductive layer 222 of the substrate 12. As a method for forming the seed layer 224, as in the case of the first conductive layer 221, a physical film formation method such as a sputtering method or a vapor deposition method, a sol-gel method, or the like can be employed. As the material and the layer configuration constituting the seed layer 224, the same material and layer configuration as those of the first conductive layer 221 can be employed.

  Subsequently, as shown in FIG. 21, a resist layer 37 is partially formed on the seed layer 224 on the first surface 13 and the second surface 14. Thereafter, as shown in FIG. 21, a third conductive layer 223 is formed on the seed layer 224 not covered with the resist layer 37 by an electrolytic plating method.

  Thereafter, as shown in FIG. 22, the resist layer 37 is removed. Further, the portion of the seed layer 224 that was covered with the resist layer 37 is removed by, for example, wet etching. In this case, as shown in FIG. 22, the through electrode 22 includes a first conductive layer 221 located at least partially on the side wall 21 of the through hole 20, and a second conductive layer 222 located on the first conductive layer 221. , A seed layer 224 located on the second conductive layer 222 and a third conductive layer 223 located on the seed layer 224. On the other hand, the first surface first conductive layer 31 and the second surface first conductive layer 41 include a seed layer 224 and a third conductive layer 223 located on the seed layer 224.

  Thereafter, in the same manner as in the above-described embodiment, the first surface first inorganic layer 32, the first surface second conductive layer 33, the first surface first organic layer 34, the first surface third conductive layer 35, The first surface second organic layer 36, the second surface first organic layer 43, and the like are formed.

Also in this modified example, after the first conductive layer 221 is formed on the side wall 21 of the through hole 20, the second conductive layer 222 is formed on the first conductive layer 221 by electroless plating, thereby penetrating at a specific position. It can suppress that the thickness of the electrode 22 is insufficient. In addition, the adhesion of the through electrode 22 to the side wall 21 can be improved.
Mounting Substrate FIG. 23 is a cross-sectional view showing an example of a mounting substrate 60 including the through electrode substrate 10 and an element 50 mounted on the through electrode substrate 10. The element 50 is an LSI chip such as a logic IC or a memory IC. The element 50 may be a MEMS (Micro Electro Mechanical Systems) chip. A MEMS chip is an electronic device in which mechanical element parts, sensors, actuators, electronic circuits, and the like are integrated on a single substrate. As shown in FIG. 23, the element 50 has a terminal 51 electrically connected to a conductive layer such as the first surface third conductive layer 35 of the through electrode substrate 10.

FIG. 24 is a diagram illustrating an example of a product on which the through electrode substrate 10 according to the embodiment of the present disclosure can be mounted. The through electrode substrate 10 according to the embodiment of the present disclosure can be used in various products. For example, it is mounted on a notebook personal computer 110, a tablet terminal 120, a mobile phone 130, a smartphone 140, a digital video camera 150, a digital camera 160, a digital clock 170, a server 180, and the like.

10 through electrode substrate 12 substrate 13 first surface 14 second surface 15 capacitor 16 inductor 17 first wiring 18 first terminal 20 through hole 21 side wall 22 through electrode 221 first conductive layer 222 second conductive layer 223 third conductive layer 224 Seed layer 26 Organic layer 30 First wiring structure 31 First side first conductive layer 32 First side first inorganic layer 33 First side second conductive layer 34 First side first organic layer 35 First side third conductive Layer 36 First surface second organic layer 37 Resist layer 38 Resist layer 40 Second wiring structure portion 41 Second surface first conductive layer 43 Second surface first organic layer 50 Element 51 Terminal 60 Mounting substrate

Claims (21)

A substrate including a first surface and a second surface located opposite to the first surface and provided with a through hole;
A through electrode located in the through hole of the substrate,
The through electrode is
A first conductive layer located at least partially on a sidewall of the through hole;
A second conductive layer located on the first conductive layer and containing nickel;
A through electrode substrate, comprising a third conductive layer located on the second conductive layer and containing copper.   2. The through electrode substrate according to claim 1, wherein the through electrode further includes a catalyst that is located between the first conductive layer and the second conductive layer and contains palladium.   The penetration electrode substrate according to claim 1 or 2 in which said 2nd conductive layer contains 80 mass% or more of nickel.   4. The through electrode substrate according to claim 1, wherein the third conductive layer contains 80% by mass or more of copper. 5.   5. The through electrode substrate according to claim 1, wherein a part of the second conductive layer is in contact with the side wall of the through hole.   The through electrode substrate according to claim 1, wherein the first conductive layer has a thickness of 1.0 μm or less.   The through electrode substrate according to any one of claims 1 to 6, wherein the thickness of the second conductive layer is 0.1 µm or more and 1.0 µm or less.   The through electrode substrate according to claim 1, wherein the third conductive layer has a thickness of 5 μm or more and 20 μm or less. The through hole has at least partially a shape that decreases in width as it goes from the first surface to the second surface of the substrate;
When the portion corresponding to the first surface of the substrate among the through electrodes is referred to as a first portion and the portion corresponding to the position where the width of the through hole is minimized is referred to as a second portion, the following relational expression: (1) and (2) hold,
(X2 / Y2) <(X1 / Y1) (1)
(X2 / Z2) <(X1 / Z1) (2)
X1 represents the thickness of the first conductive layer in the first portion,
Y1 represents the thickness of the second conductive layer in the first portion,
Z1 represents the thickness of the third conductive layer in the first portion,
X2 represents the thickness of the first conductive layer in the second portion,
Y2 represents the thickness of the second conductive layer in the second portion,
Z2 represents the thickness of the third conductive layer in the second portion,
The penetration electrode substrate according to any one of claims 1 to 8.   The through electrode substrate according to claim 9, wherein the width of the through hole is minimized at a central portion in the thickness direction of the substrate.   The through electrode substrate according to claim 9, wherein a width of the through hole is minimized at a portion corresponding to the second surface of the substrate.   The through electrode substrate according to claim 1, wherein the substrate includes glass.   A first conductive layer electrically connected to the through electrode, a first inorganic layer that is located on the first conductive layer and includes an inorganic material and has an insulating property, and is located on the first inorganic layer The penetration electrode substrate according to any one of claims 1 to 12, further comprising a capacitor having a second conductive layer.   The through electrode, a conductive layer electrically connected to the through electrode and located on the first surface side, and a conductive layer electrically connected to the through electrode and located on the second surface side The through-electrode substrate according to claim 1, further comprising an inductor having. The through electrode substrate according to any one of claims 1 to 14,
And a device mounted on the through electrode substrate. Preparing a substrate including a first surface and a second surface located on the opposite side of the first surface and having a through hole;
A through electrode forming step of forming a through electrode in the through hole of the substrate,
The through electrode forming step includes:
Forming a first conductive layer on a side wall of the through hole by a physical film formation method;
Attaching a catalyst to the surface of the first conductive layer;
Forming a second conductive layer on the first conductive layer by electroless plating;
Forming a third conductive layer on the second conductive layer by an electrolytic plating method. The second conductive layer includes nickel;
The method for manufacturing a through electrode substrate according to claim 16, wherein the third conductive layer contains copper. The first conductive layer is also formed on the first surface,
The manufacturing method further includes a step of partially forming a resist layer including an acrylic resin on the first conductive layer on the first surface before forming the second conductive layer on the first conductive layer. The manufacturing method of the penetration electrode substrate of Claim 16 or 17 provided.   The through-hole electrode substrate according to any one of claims 16 to 18, wherein the through-hole has a shape whose width decreases at least partially from the first surface of the substrate toward the second surface. Production method.   The method for manufacturing a through electrode substrate according to any one of claims 16 to 19, wherein the substrate includes glass. A substrate including a first surface and a second surface located opposite to the first surface and provided with a through hole;
A through electrode located in the through hole of the substrate,
The through electrode is
A first conductive layer located at least partially on a sidewall of the through hole;
A second conductive layer located on the first conductive layer;
A third conductive layer located on the second conductive layer,
When the portion corresponding to the first surface of the substrate among the through electrodes is referred to as a first portion and the portion corresponding to an intermediate position in the thickness direction of the substrate is referred to as a second portion, the following relational expression (1 ) And (2) are satisfied.
(X2 / Y2) <(X1 / Y1) (1)
(X2 / Z2) <(X1 / Z1) (2)
X1 represents the thickness of the first conductive layer in the first portion,
Y1 represents the thickness of the second conductive layer in the first portion,
Z1 represents the thickness of the third conductive layer in the first portion,
X2 represents the thickness of the first conductive layer in the second portion,
Y2 represents the thickness of the second conductive layer in the second portion,
Z2 represents the thickness of the third conductive layer in the second portion.