JP7233859B2 - infrared light emitting diode - Google Patents

Description

The present invention relates to infrared light emitting diodes.

Light-emitting diodes (LEDs) are widely used for illumination in the visible light range and communication applications in the near-infrared range. On the other hand, in the longer wavelength region than the near-infrared region, applications are limited, so existing light sources such as tungsten lamp light sources are used, and the development of LED light sources has not been actively promoted.
However, in recent years, a mid-infrared wavelength region, in particular, a wavelength region of about 2.0 μm to 12 μm has attracted attention. In other words, since this wavelength region is a wavelength region where light absorption by gas molecules such as CO ₂ and hydrocarbons can be seen, an LED light source, an infrared sensor, and an optical filter that transmits only the desired wavelength band are combined to reduce the amount of absorption. It is expected to be applied as a low-power, non-dispersive gas sensor that measures the concentration of gas molecules by detecting them.

Among them, light-emitting diodes can be driven at a high speed of, for example, 1 millisecond or less, which is not possible with lamps, which are the existing light sources, and greatly contribute to reducing the power consumption of gas sensors. Furthermore, until now, the main focus has been on improving the emission intensity in order to obtain high accuracy as a gas sensor, but in recent years, in order to further reduce power consumption, there has been a demand for highly efficient light-emitting diodes that operate at low current. It is also an important issue to raise the luminous efficiency even a little.
Such light-emitting diodes are used, for example, by injecting current in the vertical direction (thickness direction of the substrate) using a pn junction formed on a conductive substrate. For the package, a method of encapsulating in a bullet-shaped epoxy resin used for visible light and near-infrared light, a can package, or a ceramic package is used.

In this case, in order to effectively take out the light generated at the pn junction, it is necessary to widen the light emitting surface as seen from the outside. Therefore, in general, a design is adopted in which the coverage ratio of the electrodes when the semiconductor chip is viewed from above is reduced, and the ratio of the area occupied by the active layer is increased. As a result, the light generated in the active layer is extracted from the semiconductor surface either directly or after being repeatedly reflected within the substrate.
However, when a substrate having high conductivity is used, there is a problem that light emission cannot be extracted efficiently due to large free carrier absorption in the wavelength region of mid-infrared light. One method for avoiding this is to use a semi-insulating semiconductor substrate (for example, GaAs) and extract light from the back surface of the substrate. Patent Document 1 describes an infrared light emitting diode using a semi-insulating semiconductor substrate.

JP 2016-14392 A

SUMMARY OF THE INVENTION An object of the present invention is to provide an infrared light emitting diode that emits light from the back surface of a substrate and is expected to have improved luminous efficiency and luminous intensity.

In order to solve the above problems, an infrared light emitting diode that is one aspect of the present invention includes a semiconductor substrate, a semiconductor lamination portion described below, and a metal layer.
The semiconductor lamination portion is formed on one surface of a semiconductor substrate, and has a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer in this order from the one surface side, the first conductivity type semiconductor layer, the active layer, and , and the second conductivity type semiconductor layer contains at least one of indium and antimony. Further, it has a first mesa portion protruding from one surface of the semiconductor substrate and a second mesa portion protruding from the first mesa portion, and the boundary between the first mesa portion and the second mesa portion is closer to the semiconductor substrate than the active layer. exists in
The first-conductivity-type semiconductor layer and the second-conductivity-type semiconductor layer are semiconductor layers of different conductivity types. The first conductivity type semiconductor layer may be an n-type semiconductor layer and the second conductivity type semiconductor layer may be a p-type semiconductor layer, or the first conductivity type semiconductor layer may be a p-type semiconductor layer and the second conductivity type semiconductor layer may be an n-type semiconductor layer. It may be a type semiconductor layer.
The metal layer has a first portion in contact with the first conductivity type semiconductor layer of the first mesa portion and a second portion independent of the first portion and in contact with the second conductivity type semiconductor layer of the second mesa portion. and have

In addition, the infrared light emitting diode that is one aspect of the present invention has a ratio of the bottom area of the second mesa portion (the area of the boundary portion with the first mesa portion) to the external area of the semiconductor substrate in plan view (hereinafter referred to as the “second The substrate coverage ratio of the mesa portion”) is 0.21 or more and 0.8 or less, the reflectance of the light generated in the active layer at the metal layer is 0.60 or more and 1.00 or less, and the semiconductor substrate The back surface, which is the opposite surface of the one surface of , is the light extraction surface.
Further, the infrared light emitting diode that is one aspect of the present invention includes a sealing portion that seals the side surface of the semiconductor substrate and the semiconductor lamination portion. Further, an infrared light emitting diode that is one aspect of the present invention includes a plurality of semiconductor lamination parts on a semiconductor substrate, and the plurality of semiconductor lamination parts are connected in series with each other.

According to the infrared light emitting diode of the present invention, improvement in luminous efficiency and luminous intensity can be expected.

BRIEF DESCRIPTION OF THE DRAWINGS FIG. 1 is a plan view (a) showing an infrared light emitting diode according to a first embodiment of the present invention and a cross-sectional view (b) taken along line AA thereof; It is the elements on larger scale of FIG.1(b). FIG. 4 is a cross-sectional view illustrating a method of forming a semiconductor lamination portion that constitutes the infrared light emitting diode of the first embodiment; 1 is a cross-sectional view showing an infrared light emitting device including an infrared light emitting diode of a first embodiment; FIG. It is a top view which shows the infrared light emitting diode of 2nd embodiment. FIG. 6 is a cross-sectional view taken along the line AA of FIG. 5; FIG. 4A is a plan view showing an infrared light emitting diode of Comparative Example 1, and FIG. FIG. 10A is a plan view showing an infrared light emitting diode of Comparative Example 2, and FIG. 4 is a graph showing the relationship between the thickness of a Ti layer forming a metal layer in the infrared light emitting diode of Example 1 and the reflectance at the interface (Ti/InSb interface) between the Ti layer and the n-type semiconductor layer. 7 is a graph showing the result of a simulation of the relationship between the optical output of an infrared light emitting diode and the substrate coverage ratio (S2/S1) of the second mesa portion; 7 is a graph showing the results of a simulation of the relationship between the light extraction efficiency of an infrared light emitting diode and the substrate coverage ratio (S2/S1) of the second mesa portion; The relationship between the luminous efficiency (relative value) of the infrared light emitting diode and the total film thickness (total value of the film thickness of the p-type semiconductor layer and the film thickness of the active layer) was simulated by changing the Ti film thickness of the metal layer. It is a graph which shows a result. FIG. 13 is a graph showing an enlarged part of FIG. 12; FIG.

[Detailed description of one aspect of the present invention]
In the infrared light emitting diode of one aspect of the present invention, the light extraction surface is the back surface of the semiconductor substrate (the surface opposite to the surface on which the semiconductor lamination portion is formed), and the semiconductor lamination portion defines the first mesa portion and the second mesa portion. In an infrared light emitting diode having a metal layer on a semiconductor multilayer portion, the bottom area of the second mesa portion (the area of the boundary portion with the first mesa portion, S2 ) ratio S2/S1 (substrate coverage of the second mesa portion) is 0.21 or more and 0.8 or less, and the reflectance of the light generated in the active layer at the metal layer is 0.60 or more and 1.00 or less. One of the characteristics is that

As a method for measuring the reflectance of the light generated in the active layer in the metal layer, the reflectance when the light is vertically incident on the reflecting surface can be used.
When a back extraction structure of light using a semiconductor substrate is used, it is necessary to cover most of the surface of the semiconductor laminate with a metal electrode, and the absorption loss in this metal electrode limits the luminous efficiency of the light-emitting diode. But I found something new. This problem does not exist in conventional infrared light emitting diodes with a surface extraction (light is extracted from the semiconductor laminate side) structure (in this structure, the coverage of the metal layer covering the semiconductor laminate is low). is an important issue.

Furthermore, in infrared light emitting diodes in the mid-infrared (2 to 10 μm) wavelength region, the effect of Auger recombination, which is a deactivation mechanism by majority carriers, is significant, resulting in extremely low luminous efficiency (several percent or less). Therefore, when the light generated by the radiative recombination in the active layer repeats multiple reflections within the semiconductor substrate while being extracted to the outside, it is reabsorbed by the active layer and the p-type semiconductor layer, resulting in the generation of carriers. The inventors have also found a new problem that most of the light is lost due to heat loss, resulting in a decrease in luminous efficiency. This is in contrast to visible light LEDs, which have relatively high luminous efficiency and in which carriers reabsorbed in the active layer again contribute to light emission.

The infrared light-emitting diode of one embodiment of the present invention has the above-described features, so that light absorption loss in the semiconductor substrate, each layer forming the semiconductor laminate, and the metal layer is suppressed, and luminous efficiency and luminous intensity are improved. can be expected.
Each structure of the infrared light-emitting diode of one embodiment of the present invention is described below.

<Semiconductor substrate>
Since the semiconductor lamination portion is formed on one surface of the semiconductor substrate, the semiconductor substrate should be suitable for crystal growth of each layer constituting the semiconductor lamination portion. Further, since it is preferable that the transmittance of the light generated in the active layer is high, the substrate is made of a material whose absorption edge wavelength is shorter than the wavelength of the light generated in the active layer, such as an InAs substrate or a GaSb substrate. is preferably used. Also, a Si substrate may be used for combination with integrated circuit technology, and a semi-insulating GaAs substrate may be used for suppressing infrared absorption by free carriers in the substrate.
One surface of the semiconductor substrate, that is, the surface on which the semiconductor lamination portion is formed, can be the [100] surface in the case of a GaAs substrate, for example.
The back surface of the semiconductor substrate is the surface opposite to the surface on which the semiconductor laminate is formed. For example, when the semiconductor laminate is formed on the [100] surface of the GaAs substrate, the [−100] surface can be used. .

<Semiconductor lamination part>
The semiconductor lamination portion is formed on one surface of a semiconductor substrate, and has a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer in this order from the one surface side, the first conductivity type semiconductor layer, the active layer, and , and the second conductivity type semiconductor layer contains at least one of indium and antimony. Further, it has a first mesa portion protruding from one surface of the semiconductor substrate and a second mesa portion protruding from the first mesa portion, and the boundary between the first mesa portion and the second mesa portion is closer to the semiconductor substrate than the active layer. exists in Further, a plurality of the semiconductor lamination portions are provided on the semiconductor substrate, and the plurality of semiconductor lamination portions are connected in series with each other. As a result, a plurality of light emitting elements are formed on one semiconductor substrate and connected in series, so that they can be simultaneously driven with a constant injection current, making it possible to obtain high light emission intensity.

The semiconductor laminate portion may include layers other than the first conductivity type semiconductor layer, the active layer, and the second conductivity type semiconductor layer. Specifically, a buffer layer may be provided between the semiconductor substrate and the first conductivity type semiconductor layer. The conductivity type of the buffer layer may be n-type, i-type or p-type. Also, in this case, the boundary may exist within the buffer layer. In order to avoid the influence of the series resistance component and contact resistance in the infrared diode, the same conductivity type as the first conductivity type semiconductor layer is often used for the buffer layer.

The semiconductor lamination portion is formed by, for example, forming an n-type semiconductor layer (p-type semiconductor layer), an active layer, and a p-type semiconductor layer (n-type semiconductor layer) in this order on a semi-insulating GaAs substrate, and forming this laminate. It is formed by two-stage processing using wet etching or dry etching. Examples of film formation methods include molecular beam epitaxy (MBE) and metal organic chemical vapor deposition (MOCVD).
The first-conductivity-type semiconductor layer, the active layer, and the second-conductivity-type semiconductor layer are layers containing at least one of indium and antimony. Specific materials include InSb, InGaSb, AlGaSb, InAs, InAlAs, InAlSb and InAsSb.

<Metal layer>
The metal layer has a first portion in contact with the first conductivity type semiconductor layer of the first mesa portion, and a second portion independent of the first portion and in contact with the second conductivity type semiconductor layer of the second mesa portion. , has The first portion and the second portion of the metal layer are usually formed in the semiconductor lamination portion via an insulating layer, and are connected to the first conductivity type semiconductor layer and the second conductivity type semiconductor layer via openings provided in the insulating layer. Contact. The metal layer is divided into a first metal layer (including the first portion) formed on the first mesa side and a second metal layer (including the second portion) formed on the second mesa side. Alternatively, the first metal layer and the second metal layer may each have a third portion formed on one surface of the semiconductor substrate.

The metal layer is used as an electrode for electrical connection between the semiconductor layer of the first conductivity type and the semiconductor layer of the second conductivity type via an external power source. Also, when a plurality of semiconductor lamination parts are provided on a semiconductor substrate, they are used as wiring for connecting them in series. In addition, since the metal layer is formed on one surface of the semiconductor substrate (having the third portion), the reflectance of the light generated in the active layer on one surface of the semiconductor substrate increases, and the light generated in the active layer can be efficiently extracted from the light extraction surface (back surface of the semiconductor substrate).
This metal layer preferably has a laminated structure in which, for example, an adhesion layer, a barrier layer, and a low-resistance layer are laminated in this order from the semiconductor lamination portion and the semiconductor substrate side.

The adhesion layer of the laminated structure is made of a material such as Ti, Cr, or Ni, which has good adhesion with the insulating layer and low contact resistance with the n-type semiconductor layer and the p-type semiconductor layer. The film thickness of the adhesion layer is preferably 100 nm or less in order to reduce infrared absorption. The barrier layer is provided to suppress interdiffusion between the metal layer material and the semiconductor layer, and can be made of Pt, for example. The low-resistance layer preferably has a low resistance so as not to cause voltage loss due to an unnecessary potential difference in connection with the outside via a metal layer or connection between multiple semiconductor laminates. For example, Au is used. can be done.
In addition, when the metal layer has a laminated structure, the adhesive layer preferably has little light absorption loss because the third portion of the metal layer has a role of reflecting light generated in the active layer.

<Sealing part>
The sealing portion seals the side surface of the semiconductor substrate and the semiconductor lamination portion. The sealing portion may exist on the back surface of the semiconductor substrate, but in that case, at least part of the back surface of the semiconductor substrate must be exposed. When a rear insulating film, which will be described later, is provided, it is preferable to expose at least a portion of the rear insulating film. As a material for the sealing portion, for example, a resin molding material such as epoxy resin or phenol resin can be used. At that time, a resin molding material containing a filler such as SiO ₂ or Al ₂ O ₃ may be used. Further, a stress relaxation layer (buffer layer) made of polyimide, polyamide, silicone resin, or the like may be provided between the semiconductor lamination portion and the sealing portion.

[Preferred embodiment]
In the infrared light emitting diode of one aspect of the present invention, the substrate coverage ratio (S2/S1) of the second mesa portion is preferably 0.21 or more and 0.50 or less. As a result, the effect of suppressing light absorption loss in the semiconductor substrate, each layer constituting the semiconductor laminate, and the metal layer is further enhanced, and the luminous efficiency and luminous intensity of the infrared light emitting diode can be further increased.

In the infrared light emitting diode of one embodiment of the present invention, the ratio of the area (S3) of the metal layer to the external area (S1) of the semiconductor substrate in plan view (hereinafter referred to as “substrate coverage ratio of metal layer” or simply “S3/S1” ) is preferably 0.65 or more and less than 1.0. In this case, as will be described later in Examples, the average reflectance on one side of the semiconductor substrate (one side of the semiconductor substrate and the side of the semiconductor lamination portion opposite to the semiconductor substrate) should be 0.60 or more. Therefore, it can be expected that an infrared light emitting diode with high luminous efficiency can be obtained.
In addition, by increasing the substrate coverage ratio (S3/S1) of the metal layer to 0.65 or more and less than 1.0, the amount of reflection from the metal layer increases, so light can be efficiently extracted from the back surface of the semiconductor substrate. becomes possible. For values of S3/S1 close to 1.0, the metal layer has a third portion contacting one side of the semiconductor substrate.

In the infrared light emitting diode of one embodiment of the present invention, the root mean square roughness of the back surface (light extraction surface) of the semiconductor substrate is larger than the root mean square roughness of the top surface of the first mesa portion not covered with the second mesa portion. , and is preferably designed to be larger than the root-mean-square roughness of the region where the semiconductor laminated portion is not formed on one surface of the semiconductor substrate (the surface on which the semiconductor laminated portion is formed).
Light generated in the active layer is extracted from the back surface of the semiconductor substrate while being repeatedly reflected within each semiconductor layer and within the semiconductor substrate. can be suppressed, and the light extraction efficiency from the light extraction surface can be improved. This makes it possible to further increase the emission intensity of the infrared light emitting diode.

The root mean square roughness of the back surface of the semiconductor substrate is 30 nm or more and 2000 nm or less, and the root mean square roughness of the top surface not covered with the second mesa portion of the first mesa portion and the semiconductor laminated portion on one surface of the semiconductor substrate are formed. More preferably, the root-mean-square roughness of the uncoated areas is less than 15 nm.
The root-mean-square roughness (Rq) is measured by line scanning or two-dimensional scanning in the range of several μm to several mm on the corresponding surface using a contact profilometer or an atomic force microscope (AFM). Calculated from the height measured on the go.

An infrared light emitting diode of one embodiment of the present invention includes an insulating film (hereinafter referred to as a “back surface insulating film”) formed on the back surface of a semiconductor substrate. It is preferably 1/4 or less of the value obtained by dividing the peak wavelength of light generated in the layer by the refractive index of the back insulating film. By providing the back surface insulating film with a thickness of 20 nm or more, the back surface of the semiconductor substrate is protected, and peeling of the back surface insulating film from the back surface of the semiconductor substrate can be suppressed. By suppressing the reflection, the luminous efficiency of the infrared light emitting diode is improved.
Examples of materials for the back insulating film include SiO ₂ , Al ₂ O ₃ , SiN, and TiO ₂ . The back insulating film may be formed of a single layer, or may have a laminated structure.

In the infrared light emitting diode of one aspect of the present invention, at least one of the first portion and the second portion of the metal layer includes an adhesion layer in contact with the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, respectively, and the adhesion layer contains at least one of Ti, Cr, and Ni, and the film thickness of the adhesion layer is preferably 5 nm or more and 60 nm or less. Although Ti, Cr, and Ni have high adhesion to the semiconductor layer, they absorb light in the mid-infrared region significantly. Among these, it is particularly preferable that the adhesion layer contains Ti and has a film thickness of 5 nm or more and 30 nm or less.

In the infrared light emitting diode of one aspect of the present invention, the first conductivity type is n-type, the second conductivity type is p-type, and the thickness of the active layer and the active layer of the second conductivity type semiconductor layer are The total value of the film thickness of the portion where the difference in bandgap energy is 0.075 eV or less is preferably 0.5 μm or more and 2.1 μm or less. This makes it possible to further improve the luminous efficiency.

In the infrared light emitting diode of one embodiment of the present invention, the n-type semiconductor layer and the p-type semiconductor layer are formed of a material having a bandgap energy difference of 0.075 eV or less with respect to the active layer. It is preferable to include each in thickness. In this way, since the bandgap energy of the materials contained in the n-type semiconductor layer and the p-type semiconductor layer is close to that of the active layer (three times or less than the thermal energy at room temperature of 300 K), only part of the light generated in the active layer is absorbed by the n-type semiconductor layer and the p-type semiconductor layer, the effect of suppressing the absorption inside the semiconductor becomes more pronounced, and it can be expected that the luminous efficiency will be greatly improved.

Further, in this case, in the plurality of semiconductor lamination parts, an insulating layer is provided between the semiconductor lamination part and the metal layer, openings are provided on the first mesa part and the second mesa part of the insulating layer, and these Through the opening, one first mesa portion and the other second mesa portion of two adjacent semiconductor lamination portions are electrically connected by a metal layer. This metal layer is also formed on one surface of the semiconductor substrate between these semiconductor laminates.
Examples of materials for this insulating layer include SiO ₂ , Al ₂ O ₃ , SiN, and TiO ₂ . This insulating layer may be formed of a single layer, or may have a laminated structure. In addition, by appropriately designing the film thickness of this insulating layer, it is possible to improve the reflectance on the one surface side of the semiconductor substrate (one surface of the semiconductor substrate and the surface of the semiconductor lamination portion opposite to the semiconductor substrate). .

In the infrared light emitting diode of one embodiment of the present invention, the semiconductor substrate is a semi-insulating GaAs substrate, the active layer has a bandgap energy smaller than that of GaAs, and contains Al _x In _y Ga _1-xy As _z Sb _1-z ( 0≦x≦1, 0≦y≦1, 0≦x+y≦1, 0≦z≦1), and preferably has a peak emission wavelength of 2 to 10 μm. As a result, light generated in the active layer can be extracted to the outside without loss in the semiconductor substrate.

[Embodiment]
Hereinafter, embodiments of the present invention will be described with reference to the drawings, but the present invention is not limited to the embodiments shown below. In the embodiments shown below, technically preferred limitations are made for implementing the present invention, but the limitations are not essential to the present invention.

<First Embodiment>
As shown in FIG. 1, the infrared light emitting diode 1 of this embodiment includes a GaAs substrate (semiconductor substrate) 2, a semiconductor lamination portion 3, an insulating layer 4, a metal layer 5, and a back insulating film 6.
One surface 21 of the GaAs substrate 2 is the [100] surface, and the back surface 22 is the [-100] surface. A semiconductor lamination portion 3 is formed on one surface 21 of the GaAs substrate 2 . A back surface insulating film 6 is formed on the back surface 22 .
The semiconductor lamination portion 3 has a two-step mesa structure consisting of a first mesa portion 301 protruding from one surface 21 of the GaAs substrate 2 and a second mesa portion 302 protruding from the first mesa portion 301 .
The root-mean-square roughness of the rear surface 22 of the GaAs substrate 2 is 30 nm or more and 2000 nm or less. The root-mean-square roughness of the top surface 3011 of the first mesa portion 301 not covered by the second mesa portion 302 is less than 15 nm. The root-mean-square roughness of the region 211 on the surface 21 of the GaAs substrate 2 where the semiconductor lamination portion 3 is not formed is less than 15 nm.

As shown in FIG. 2, the semiconductor lamination portion 3 includes, from the GaAs substrate 2 side, an Sn-doped AlInSb layer (n-type semiconductor layer) 31, an Sn-doped AlInSb layer (n-type barrier layer) 32, and a non-doped AlInSb layer (active layer). ) 33, a Zn-doped AlInSb layer (p-type barrier layer) 34, and a Zn-doped AlInSb layer (p-type semiconductor layer) 35 in this order. As shown in FIGS. 1 and 2, the boundary between the first mesa portion 301 and the second mesa portion 302 exists within the Sn-doped AlInSb layer (n-type semiconductor layer) 31 .
As shown in FIG. 3, the semiconductor lamination portion 3 comprises an n-type semiconductor layer 31, an n-type barrier layer 32, an active layer 33, a p-type barrier layer 34, and a p-type semiconductor layer 45 on a GaAs substrate 2. After forming the laminate 30, mesa etching is performed along the dashed-dotted line, and then mesa etching is performed along the two-dotted dashed line.

The insulating layer 4 is formed on the upper surface and side surfaces of the first mesa portion 301 and the second mesa portion 302 of the semiconductor lamination portion 3 and around the first mesa portion 301 on the one surface 21 of the GaAs substrate 2 . The insulating layer 4 has a first opening 41 above the n-type semiconductor layer 31 of the first mesa portion 301 . A second opening 42 is provided on the p-type semiconductor layer 35 of the second mesa portion 302 .
The metal layer 5 is divided into a first metal layer 510 formed on the first mesa portion 301 side and a second metal layer 520 formed on the second mesa portion 302 side. The first metal layer 510 includes a portion (first portion) 511 that closes the first opening 41 and contacts the n-type semiconductor layer 31 of the first mesa portion 301, a portion 512 that is formed on the insulating layer 4, and GaAs. and a portion (third portion, electrode) 513 formed on one surface 21 of the substrate 2 . The second metal layer 520 includes a portion (second portion) 521 that closes the second opening 42 and contacts the p-type semiconductor layer 35 of the second mesa portion 302, a portion 522 that is formed on the insulating layer 4, and a portion (third portion, electrode) 523 formed on one surface 21 of the GaAs substrate 2 .

Also, the substrate coverage ratio (S2/S1) of the second mesa portion is 0.21 or more and 0.8 or less. The reflectance of light generated in the active layer 33 at the metal layer 5 is 0.60 or more and 1.00 or less. The substrate coverage (S3/S1) of the metal layer 5 is 0.65 or more and less than 1.0.
According to the infrared light emitting diode 1 of the embodiment, the light absorption loss inside the light emitted from the active layer is suppressed, and the luminous efficiency and luminous intensity are improved.

<Infrared light emitting device>
Using the infrared light emitting diode 1 of the first embodiment, the infrared light emitting device 10 shown in FIG. 4 can be manufactured. The infrared light emitting device 10 has an infrared light emitting diode 1 , lead terminals 71 and 72 , thin metal wires 81 and 82 , and a sealing portion 9 .
The lead terminals 71 and 72 are arranged around the infrared light emitting diode 1 . The thin metal wire 81 connects the third portion (first electrode) 513 of the first metal layer 510 of the infrared light emitting diode 1 and the lead terminal 71 . The thin metal wire 82 connects the third portion (second electrode) 523 of the second metal layer 520 of the infrared light emitting diode 1 and the lead terminal 72 . The sealing portion 9 is disposed on a portion of the back insulating film 6 of the infrared light emitting diode 1 excluding the surface opposite to the semiconductor substrate 2, and seals between the infrared light emitting diode 1 and the lead terminals 71 and 72. there is That is, the semiconductor lamination portion 3 of the infrared light emitting diode 1 is sealed.
In other words, the infrared light emitting device 10 is an example of the infrared light emitting diode 1 having the sealing portion 9 that seals the semiconductor lamination portion 3 .

<Second embodiment>
As shown in FIGS. 5 and 6, the infrared light emitting diode 1 of this embodiment includes a plurality of semiconductor laminates 3 on a semiconductor substrate 2, which are connected in series. Specifically, the first mesa portion 301 on one side and the second mesa portion 302 on the other side of the two adjacent semiconductor lamination portions 3 are formed by the metal layer 530 through the first opening portion 41 and the second opening portion 42 . electrically connected.
The metal layer 530 has a portion 511 that contacts the n-type semiconductor layer of the first mesa portion 301 of one of the two adjacent semiconductor lamination portions 3 and a portion 521 that contacts the p-type semiconductor layer of the other second mesa portion 302 . and a portion 533 in contact with one surface 21 of the semiconductor substrate 2 between these semiconductor lamination portions 3 . A portion 513 of the first metal layer 510 formed on one surface 21 of the semiconductor substrate 2 is used as an electrode for connection with an external wiring. A portion 523 of the second metal layer 520 formed on one surface 21 of the semiconductor substrate 2 is used as an electrode for connection with an external wiring.

In the infrared light emitting diode 1 of each of the above embodiments, the first metal layer 510, the second metal layer 520, and the metal layer 530 have portions 513, 523, and 533 in contact with the surface 21 of the semiconductor substrate 2. An insulating film may be interposed between the surface 21 of the semiconductor substrate 2 and these portions.
Further, the infrared light emitting diode 1 of each of the above embodiments has a sealing portion that seals the side surface of the semiconductor substrate 2 and the semiconductor lamination portion 3 . Moreover, although the infrared light emitting diode 1 of the first embodiment has a plurality of semiconductor lamination parts 3, only some of them are shown in FIG.

Examples of the present invention will be described below.
[Example 1]
An infrared light emitting diode 1 having the structure shown in FIG. 1 was produced by the following method.
An InSb layer doped with 1×10 ¹⁹ cm ⁻³ of Sn and an Al _0.05 In _0.95 Sb layer (n-type semiconductor layer) 31 were formed on a GaAs substrate 2 having a semi-insulating [100] orientation using a molecular beam epitaxial growth apparatus. An Al _0.22 In _0.78 Sb layer (n-type barrier layer) 32 doped with 1×10 ¹⁹ cm ⁻³ of Sn, each having a thickness of 0.5 μm, is replaced with a non-doped Al _0.05 In _0.95 Sb layer having a thickness of 0.02 μm. (Active layer) 33 with a thickness of 2 μm, Al _0.22 In _0.78 Sb layer (p-type barrier layer) 34 doped with 1×10 ¹⁸ cm ⁻³ of Zn with a thickness of 0.02 μm, and Zn with a thickness of 1× A 10 ¹⁸ cm ⁻³ -doped Al _0.05 In _0.95 Sb layer (p-type semiconductor layer) 35 with a thickness of 0.5 μm was formed in this order.

Next, by patterning the photoresist by photolithography and dry etching, as shown in FIG. 3, the portion outside the dashed-dotted line E1 of the semiconductor laminate 30 was removed. That is, this etching was performed to a position where the Sn-doped Al _0.05 In _0.95 Sb layer (n-type semiconductor layer) 31 of the semiconductor laminate 30 was slightly removed. In this state, the root-mean-square roughness of the surface along the dashed-dotted line E1 (the surface including the upper surface 3011 in FIG. 1B) was less than 15 nm.
Next, on the semiconductor substrate 2 in this state, a SiO ₂ film is formed by a plasma CVD apparatus, and dry etching is performed using this patterned film as a hard mask to obtain the semiconductor laminate 30 from the two-dot chain line E2. Removed the outer part.
A two-step mesa structure consisting of a first mesa portion 301 protruding from one surface 21 of the semiconductor substrate 2 and a second mesa portion 302 protruding from the first mesa portion 301 is formed by two-step etching of the semiconductor laminate 30 . A semiconductor lamination portion 3 was obtained.

Next, after forming a SiN film as the insulating layer 4 on the semiconductor substrate 2 in this state by plasma CVD, the SiN film is dry-etched to form the first opening 41 above the first mesa portion 301 . A second opening 42 is formed on the second mesa portion 302 .
Next, on the semiconductor substrate 2 in this state, a first metal layer 510 and a second metal layer 520 each having a laminated structure of Ti, Pt, and Au were formed by a lift-off method using a sputtering apparatus. In the metal layers 510 and 520, the Ti layer has a thickness of 20 nm, the Pt layer has a thickness of 20 nm, and the Au layer has a thickness of 300 nm.

Next, the back surface 22 _of the GaAs substrate 2 is roughened by a known technique to a root-mean-square roughness of about 200 nm. Formed in thickness.
An infrared light emitting diode 1 was thus obtained.
According to the infrared light emitting diode 1 of this embodiment, by applying a voltage between the electrode 513 of the first metal layer 510 and the electrode 523 of the second metal layer 520 and injecting current, red light generated in the active layer External light can be extracted from the back surface 22 of the semiconductor substrate 2 .

[Comparative Example 1]
The infrared light emitting diode 100 shown in FIG. 7 has a semiconductor lamination portion 3 having a two-stage mesa structure consisting of a first mesa portion 301 and a second mesa portion 302 . The metal layer 500 does not have a portion in contact with the first mesa portion 301 . The metal layer 500 is composed of a pair of second metal layers 520 including a portion 521 contacting the second mesa portion 302 and an electrode portion 540 connecting them at the peripheral portion of the semiconductor substrate 2 . A conductive substrate is used as the semiconductor substrate 2 , and an electrode layer 50 is formed on the back surface of the semiconductor substrate 2 .

In the infrared light emitting diode 100 , a voltage is applied between the electrode portion 540 and the electrode layer 50 , and current is injected through the semiconductor substrate 2 . can be taken out from the opposite side. However, this infrared light emitting diode 100 has a large light absorption loss due to free carrier absorption in the conductive semiconductor substrate 2 .
Since the infrared light emitting diode 1 of Example 1 uses a semi-insulating GaAs substrate as the semiconductor substrate 2, the loss in the substrate is suppressed, and compared with the infrared light emitting diode 100 of Comparative Example 1, red light is efficiently emitted. Outside light can be taken out.

[Comparative Example 2]
In the infrared light emitting diode 101 of FIG. 8, the external area S1 of the semiconductor substrate 2 is the same as that of the infrared light emitting diode 1 of Example 1, but the bottom area S2 of the second mesa portion 302 is larger than that of the infrared light emitting diode 1. FIG. That is, the substrate coverage (S2/S1) of the second mesa portion of the infrared light emitting diode 101 is greater than 0.8. Also, the substrate coverage ratio (S3/S1) of the metal layer is less than 0.65. Infrared light emitting diode 101 does not have back surface insulating film 6 . Points other than these are the same as those of the infrared light emitting diode 1 of the first embodiment.
Even when a semi-insulating semiconductor substrate is used in this way, the bottom area S2 of the second mesa portion 302 with respect to the external area of the semiconductor substrate, that is, the area occupied by the active layer, the p-type semiconductor layer, and the n-type semiconductor layer is large. Then, as multiple reflections are repeated at the semiconductor substrate and the semiconductor laminated portion, the light is absorbed and the loss increases. Since the absorption of such light is suppressed in the infrared light emitting diode 1 of Example 1, infrared light can be extracted more efficiently than the infrared light emitting diode 101 of Comparative Example 2.

[Consideration by simulation]
In the infrared light emitting diode 1 of Example 1, when the film thickness of Ti in the metal layers 510 and 520 composed of the laminated structure of Ti, Pt, and Au was changed in the range of 0 to 200 nm, n A simulation was performed on how the reflectance R5 at the metal layer 510 (511) of the light (wavelength 4.3 μm) incident on the semiconductor layer (Sn-doped InSb layer) 31 changes. The results are shown graphically in FIG.

As shown in FIG. 9, when the Ti thickness is as thick as 200 nm, the reflectance R5 is 0.45. not large compared to (0.37). This is because the Ti electrode has significant infrared absorption. Also, by setting the Ti thickness to 60 nm or less, a high reflectance of 0.6 or more can be obtained. Furthermore, by setting the Ti thickness to 30 nm or less, a high reflectance of 0.75 or more can be obtained. Incidentally, if the thickness of the Ti layer is less than 5 nm, it is not preferable from the viewpoint of ensuring the adhesion to the underlayer.

Next, the relationship between the light output of the infrared light emitting diode and the substrate coverage ratio (S2/S1) of the second mesa portion was simulated. The results are shown graphically in FIG. Further, a simulation was performed on the relationship between the extraction efficiency of the infrared light emitting diode and the substrate coverage ratio (S2/S1) of the second mesa portion. The results are shown graphically in FIG.
An infrared light emitting diode having a structure in which light is extracted from the back surface 22 of the semiconductor substrate 2 suppresses loss due to light absorption or transmission on the one surface 21 of the semiconductor substrate 2, that is, on the side where the semiconductor laminated portion 3 is formed. Infrared light can be extracted with high emission intensity.

10 and 11, in the infrared light emitting diode 1 of Example 1, the light in the first mesa portion 301 and the second mesa portion 302 is reflected by the metal layer 5 (the space made up of the atmosphere if there is no metal layer). The reflectance of the light directed toward the one surface 21 of the semiconductor substrate 2 through the metal layer 5 (or the space made up of the air if there is no metal layer) is 0.37, 0.45, 0.60, 0.75, The simulation results for 0.87 and 1.00 are shown.
A reflectance of 0.37 is a reflectance in a space having a refractive index of 1.0 without the metal layer 5 .
The reflectance of 0.45 is the reflectance when the thickness of the Ti layer constituting the metal layer 5 is 200 nm, and the reflectance on the one surface 21 of the semiconductor substrate 2 is not actively considered (conventional technology).
The reflectance of 0.60 is the reflectance when the thickness of the Ti layer forming the metal layer 5 is 60 nm.
The reflectance of 0.75 is the reflectance when the thickness of the Ti layer forming the metal layer 5 is 30 nm.
The reflectance of 0.87 is the reflectance when the thickness of the Ti layer forming the metal layer 5 is 5 nm.
A reflectance of 1.00 is an ideal reflectance.

When the effect of reflection on the surface 21 of the semiconductor substrate 2 is not actively considered (conventional technology), the higher the substrate coverage ratio (S2/S1) of the second mesa portion, the higher the light output. As shown, a reflectance of 0.45 (prior art) gives maximum output at S2/S1 of 1.0. The vertical axis of the graph in FIG. 10 is the relative value of the light output, with the light output being "1" when the reflectance is 0.45 and S2/S1 is 1.0.
On the other hand, the lower the substrate coverage ratio (S2/S1) of the second mesa portion, the lower the light absorption loss in the second mesa portion when multiple reflections are repeated in the semiconductor substrate, so the light extraction efficiency is improved. do. The vertical axis of the graph in FIG. 11 is the relative value of the light extraction efficiency when the reflectance is 0.45 (conventional technology) and the light extraction efficiency is "1" when the coverage ratio (S2/S1) is 0. be.

Therefore, as can be seen from FIG. 11, by using a metal layer having a reflectance of 0.75 or more and setting the coverage ratio (S2/S1) to 0.8 or less, the conventional technology (metal layer The maximum achievable light extraction efficiency (relative value 1.0) can be obtained with a reflectance of 0.45). In addition, by using a metal layer having a reflectance of 0.60 or more and setting the coverage (S2/S1) to 0.5 or less, the maximum light extraction efficiency (relative value 1.0) can be obtained.

Further, by setting the coverage ratio (S2/S1) to 0.21 or more and 0.8 or less, a Ti layer having a thickness of 5 nm with a reflectance of 0.87 is provided, as shown in FIG. As shown in FIG. 11, a high extraction efficiency (relative value of 1.2 or more) can be obtained while securing a light output (relative value of 1.0) equivalent to the technology (reflectance of 0.45). Furthermore, if the coverage (S2/S1) is 0.21 or more and 0.5 or less, a higher light extraction efficiency (relative value of 1.7 or more) can be achieved. If it is 4 or less, a particularly high light extraction efficiency (relative value of 2.0 or more) can be realized.
On the other hand, by setting the substrate coverage (S3/S1) of the metal layer to 0.65 or more and less than 1.0, the average reflectance on the one surface 21 of the semiconductor substrate 2 can be 0.60 or more. For example, when the reflectance of the light generated in the active layer at the metal layer 5 is 0.87 and the reflectance at other than the metal layer 5 is 0.37, the substrate coverage ratio (S3/S1) of the metal layer is 0. The average reflectance for 0.65 is 0.69≈0.65×0.87+0.35×0.37.

Next, in the infrared light emitting diode 1 of Example 1, the total value of the thickness of the p-type semiconductor layer 35 and the thickness of the active layer 33, and the thickness of the metal layers 510 and 520 having a laminated structure of Ti, Pt, and Au A simulation was performed on how the luminous efficiency changes when the film thickness of Ti is changed. The results are shown graphically in FIGS. 12 and 13. FIG. In this simulation, light absorption loss on the side of the semiconductor substrate 2 on which the semiconductor lamination portion 3 is formed, that is, light absorption loss by the p-type semiconductor layer, the active layer, and the metal layer is taken into consideration.
The vertical axis of the graph showing the results is the luminous efficiency, with the p-type semiconductor layer having a thickness of 0.5 μm, the active layer having a thickness of 2 μm, and the Ti thickness of 100 nm (conventional example) being “1”. (relative value). The horizontal axis is the total value of the thickness of the p-type semiconductor layer and the thickness of the active layer. The total value of the thickness of the p-type semiconductor layer and the thickness of the active layer in the conventional example is 2.5 μm.

As is clear from FIG. 12, when the sum of the thickness of the p-type semiconductor layer and the thickness of the active layer is large and small, the thickness of Ti is reduced to increase the reflectance R5. The degree of the effect of improving the luminous efficiency is different, and the smaller the value, the higher the effect. This is because even if the amount of light emitted from the active layer is the same, if the absorption loss in the p-type semiconductor layer, the active layer, etc. is large, the amount of light reaching the metal layer is reduced. In other words, suppressing absorption loss by the active layer or the like and further improving the reflectance of the metal layer brings about a synergistic effect, making it possible to achieve higher luminous efficiency.

Then, in the p-type semiconductor layer, the total value of the thickness of the portion of the p-type semiconductor layer where the difference in bandgap energy from the active layer is 0.075 eV or less and the thickness of the active layer is set to 2.1 μm or less. 2. By setting the film thickness of Ti, which is the adhesion layer, to 60 nm or less, it is possible to achieve a luminous efficiency that cannot be achieved when the film thickness of the Ti film of the metal layer is reduced while the above total value remains the same as in the conventional example. I found out. Specifically, as can be seen from FIG. 13, when the total film thickness is 2.5 μm and the thinnest Ti film is 5 nm, the relative value of the luminous efficiency is about 1.10, but the total film thickness When the value is 2.1 μm or less, the relative value of the luminous efficiency can be made 1.15 or more by setting the film thickness of Ti to 60 nm or less.

As described above, in the past, the active layer was designed to be thick in the back extraction structure because of the background that luminous intensity was sought rather than luminous efficiency. This is because when a constant current is injected, if the active layer is thin, the carrier concentration in the active layer increases, and the luminous efficiency is suppressed by the aforementioned Auger recombination. Based on this idea, deactivation due to Auger recombination has been suppressed by increasing the film thickness.
In contrast, in the present invention, in order to realize a light-emitting diode with higher luminous efficiency, an increase in carrier concentration is suppressed by a low injection current to suppress Auger recombination, and the thickness of the active layer is reduced. The synergistic effect of suppressing reabsorption loss and increasing the reflection efficiency in the metal layer is used.

From the above results, it can be seen that the infrared light emitting diode 1 of Example 1 has a higher light extraction efficiency than the infrared light emitting diode of Comparative Example 2, and is capable of increasing the output.

1 infrared light emitting diode 2 GaAs substrate (semiconductor substrate)
21 one surface of semiconductor substrate 211 one surface region where no semiconductor laminate is formed 22 back surface of semiconductor substrate 3 semiconductor laminate 30 semiconductor laminate 31 n-type semiconductor layer 32 n-type barrier layer 33 active layer 34 p-type barrier layer 35 p type semiconductor layer 301 first mesa portion 3011 upper surface of the first mesa portion not covered with the second mesa portion 302 second mesa portion 4 insulating layer 5 metal layer 510 first metal layer 511 portion in contact with the n-type semiconductor layer ( first part)
512 Portion formed on insulating layer 513 Portion formed on one surface of semiconductor substrate (third portion, electrode)
520 second metal layer 521 portion in contact with p-type semiconductor layer (second portion)
522 Portion formed on insulating layer 523 Portion formed on one surface of semiconductor substrate (third portion, electrode)
6 back surface insulating film 71, 72 lead terminals 81, 82 thin metal wires 9 sealing part

Claims (7)

a semiconductor substrate;
A semiconductor lamination portion formed on one surface of the semiconductor substrate, having a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer in this order from the one surface side, the first conductivity type semiconductor The layer, the active layer, and the second conductivity type semiconductor layer contain at least one of indium and antimony, and have a first mesa portion protruding from the one surface and a second mesa portion protruding from the first mesa portion. a semiconductor lamination portion in which a boundary between the first mesa portion and the second mesa portion exists closer to the semiconductor substrate than the active layer;
a first portion of the first mesa portion that contacts the first conductivity type semiconductor layer; and a second portion that is independent of the first portion and is in contact with the second conductivity type semiconductor layer of the second mesa portion. and a metal layer having
a sealing portion that seals the side surface of the semiconductor substrate and the semiconductor lamination portion;
with
A plurality of the semiconductor lamination parts are provided on the semiconductor substrate, and the plurality of the semiconductor lamination parts are connected in series with each other,
A ratio of the total bottom area of the second mesa portion to the outer shape area of the semiconductor substrate in a plan view is 0.21 or more and 0.8 or less,
The reflectance of the light generated in the active layer at the metal layer is 0.60 or more and 1.00 or less,
a back surface of the semiconductor substrate opposite to the one surface is a light extraction surface;
An insulating film formed on the back surface,
In the infrared light emitting diode, the film thickness of the insulating film is 20 nm or more and 1/4 or less of the value obtained by dividing the peak wavelength of the light generated in the active layer by the refractive index of the insulating film. a semiconductor substrate;
A semiconductor lamination portion formed on one surface of the semiconductor substrate, having a first conductivity type semiconductor layer, an active layer, and a second conductivity type semiconductor layer in this order from the one surface side, the first conductivity type semiconductor The layer, the active layer, and the second conductivity type semiconductor layer contain at least one of indium and antimony, and have a first mesa portion protruding from the one surface and a second mesa portion protruding from the first mesa portion. a semiconductor lamination portion in which a boundary between the first mesa portion and the second mesa portion exists closer to the semiconductor substrate than the active layer;
a first portion of the first mesa portion that contacts the first conductivity type semiconductor layer; and a second portion that is independent of the first portion and is in contact with the second conductivity type semiconductor layer of the second mesa portion. and a metal layer having
a sealing portion that seals the side surface of the semiconductor substrate and the semiconductor lamination portion;
with
A plurality of the semiconductor lamination parts are provided on the semiconductor substrate, and the plurality of the semiconductor lamination parts are connected in series with each other,
A ratio of the total bottom area of the second mesa portion to the outer shape area of the semiconductor substrate in a plan view is 0.21 or more and 0.8 or less,
The reflectance of the light generated in the active layer at the metal layer is 0.60 or more and 1.00 or less,
a back surface of the semiconductor substrate opposite to the one surface is a light extraction surface;
at least one of the first portion and the second portion includes an adhesion layer in contact with the first conductivity type semiconductor layer and the second conductivity type semiconductor layer, respectively;
The infrared light emitting diode, wherein the adhesive layer contains at least one of Ti, Cr, and Ni, and the adhesive layer has a film thickness of 5 nm or more and 60 nm or less. 3. The infrared light emitting diode according to claim 1, wherein said ratio is 0.21 or more and 0.50 or less. The infrared light emitting diode according to any one of claims 1 to 3, wherein a ratio of the area of the metal layer to the external area of the semiconductor substrate in plan view is 0.65 or more and less than 1.0. The first conductivity type is n-type, the second conductivity type is p-type,
The sum of the film thickness of the active layer and the film thickness of a portion of the second conductivity type semiconductor layer having a bandgap energy difference of 0.075 eV or less from the active layer is 0.5 μm or more2 The infrared light emitting diode according to any one of claims 1 to 4 , having a thickness of 0.1 μm or less. Each of the first conductivity type semiconductor layer and the second conductivity type semiconductor layer is formed of a material having a bandgap energy difference of 0.075 eV or less from the active layer, and has a thickness of 0.2 μm or more. The infrared light emitting diode according to any one of claims 1 to 5 , comprising: The semiconductor substrate is a semi-insulating GaAs substrate,
The active layer has a bandgap energy _smaller than that of GaAs, and is composed of _{AlxInyGa1 - xyAszSb1 -z} (0≤x≤1, 0≤y≤1, 0≤x+y≤1, 0≤z ≤ 1),
7. The infrared light emitting diode according to claim 1 , wherein the peak wavelength of light generated in said active layer is 2 μm or more and 10 μm or less.

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