JP7193428B2 - エッチング方法及び基板処理装置 - Google Patents

エッチング方法及び基板処理装置 Download PDF

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JP7193428B2
JP7193428B2 JP2019148132A JP2019148132A JP7193428B2 JP 7193428 B2 JP7193428 B2 JP 7193428B2 JP 2019148132 A JP2019148132 A JP 2019148132A JP 2019148132 A JP2019148132 A JP 2019148132A JP 7193428 B2 JP7193428 B2 JP 7193428B2
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Prior art keywords
gas
underlayer
etching
oxide film
etching method
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JP2019148132A
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Japanese (ja)
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JP2021028959A5 (https=
JP2021028959A (ja
Inventor
誠一 渡部
紘己 山田
学 佐藤
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Tokyo Electron Ltd
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Tokyo Electron Ltd
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Priority to JP2019148132A priority Critical patent/JP7193428B2/ja
Priority to US16/983,229 priority patent/US11121000B2/en
Priority to KR1020200097314A priority patent/KR102851760B1/ko
Priority to CN202010781745.1A priority patent/CN112349585B/zh
Publication of JP2021028959A publication Critical patent/JP2021028959A/ja
Publication of JP2021028959A5 publication Critical patent/JP2021028959A5/ja
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    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/20—Dry etching; Plasma etching; Reactive-ion etching
    • H10P50/28—Dry etching; Plasma etching; Reactive-ion etching of insulating materials
    • H10P50/282—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials
    • H10P50/283—Dry etching; Plasma etching; Reactive-ion etching of insulating materials of inorganic materials by chemical means
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/30—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region
    • H10B41/35—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by the memory core region with a cell select transistor, e.g. NAND
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/305—Electron-beam or ion-beam tubes for localised treatment of objects for casting, melting, evaporating, or etching
    • H01J37/3053—Electron-beam or ion-beam tubes for localised treatment of objects for casting, melting, evaporating, or etching for evaporating or etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01J—ELECTRIC DISCHARGE TUBES OR DISCHARGE LAMPS
    • H01J37/00—Discharge tubes with provision for introducing objects or material to be exposed to the discharge, e.g. for the purpose of examination or processing thereof
    • H01J37/30—Electron-beam or ion-beam tubes for localised treatment of objects
    • H01J37/305—Electron-beam or ion-beam tubes for localised treatment of objects for casting, melting, evaporating, or etching
    • H01J37/3053—Electron-beam or ion-beam tubes for localised treatment of objects for casting, melting, evaporating, or etching for evaporating or etching
    • H01J37/3056—Electron-beam or ion-beam tubes for localised treatment of objects for casting, melting, evaporating, or etching for evaporating or etching for microworking, e. g. etching of gratings or trimming of electrical components
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B41/00—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates
    • H10B41/20—Electrically erasable-and-programmable ROM [EEPROM] devices comprising floating gates characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/20—EEPROM devices comprising charge-trapping gate insulators characterised by three-dimensional [3D] arrangements, e.g. with cells on different height levels
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/30—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region
    • H10B43/35—EEPROM devices comprising charge-trapping gate insulators characterised by the memory core region with cell select transistors, e.g. NAND
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P14/00—Formation of materials, e.g. in the shape of layers or pillars
    • H10P14/60—Formation of materials, e.g. in the shape of layers or pillars of insulating materials
    • H10P14/69—Inorganic materials
    • H10P14/692—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses
    • H10P14/6921—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon
    • H10P14/69215—Inorganic materials composed of oxides, glassy oxides or oxide-based glasses containing silicon the material being a silicon oxide, e.g. SiO2
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/71—Etching of wafers, substrates or parts of devices using masks for conductive or resistive materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P50/00—Etching of wafers, substrates or parts of devices
    • H10P50/73—Etching of wafers, substrates or parts of devices using masks for insulating materials
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/04—Apparatus for manufacture or treatment
    • H10P72/0402—Apparatus for fluid treatment
    • H10P72/0418—Apparatus for fluid treatment for etching
    • H10P72/0421—Apparatus for fluid treatment for etching for drying etching
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10P—GENERIC PROCESSES OR APPARATUS FOR THE MANUFACTURE OR TREATMENT OF DEVICES COVERED BY CLASS H10
    • H10P72/00—Handling or holding of wafers, substrates or devices during manufacture or treatment thereof
    • H10P72/06—Apparatus for monitoring, sorting, marking, testing or measuring
    • H10P72/0604—Process monitoring, e.g. flow or thickness monitoring
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10W—GENERIC PACKAGES, INTERCONNECTIONS, CONNECTORS OR OTHER CONSTRUCTIONAL DETAILS OF DEVICES COVERED BY CLASS H10
    • H10W20/00—Interconnections in chips, wafers or substrates
    • H10W20/01—Manufacture or treatment
    • H10W20/071—Manufacture or treatment of dielectric parts thereof
    • H10W20/081—Manufacture or treatment of dielectric parts thereof by forming openings in the dielectric parts
    • H—ELECTRICITY
    • H10—SEMICONDUCTOR DEVICES; ELECTRIC SOLID-STATE DEVICES NOT OTHERWISE PROVIDED FOR
    • H10B—ELECTRONIC MEMORY DEVICES
    • H10B43/00—EEPROM devices comprising charge-trapping gate insulators
    • H10B43/50—EEPROM devices comprising charge-trapping gate insulators characterised by the boundary region between the core and peripheral circuit regions

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  • Physics & Mathematics (AREA)
  • Engineering & Computer Science (AREA)
  • Plasma & Fusion (AREA)
  • Chemical & Material Sciences (AREA)
  • Analytical Chemistry (AREA)
  • Drying Of Semiconductors (AREA)
JP2019148132A 2019-08-09 2019-08-09 エッチング方法及び基板処理装置 Active JP7193428B2 (ja)

Priority Applications (4)

Application Number Priority Date Filing Date Title
JP2019148132A JP7193428B2 (ja) 2019-08-09 2019-08-09 エッチング方法及び基板処理装置
US16/983,229 US11121000B2 (en) 2019-08-09 2020-08-03 Etching method and substrate processing apparatus
KR1020200097314A KR102851760B1 (ko) 2019-08-09 2020-08-04 에칭 방법 및 기판 처리 장치
CN202010781745.1A CN112349585B (zh) 2019-08-09 2020-08-06 蚀刻方法及基板处理装置

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2019148132A JP7193428B2 (ja) 2019-08-09 2019-08-09 エッチング方法及び基板処理装置

Publications (3)

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JP2021028959A JP2021028959A (ja) 2021-02-25
JP2021028959A5 JP2021028959A5 (https=) 2022-06-02
JP7193428B2 true JP7193428B2 (ja) 2022-12-20

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US (1) US11121000B2 (https=)
JP (1) JP7193428B2 (https=)
KR (1) KR102851760B1 (https=)
CN (1) CN112349585B (https=)

Families Citing this family (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP7193428B2 (ja) * 2019-08-09 2022-12-20 東京エレクトロン株式会社 エッチング方法及び基板処理装置
US11756785B2 (en) * 2021-08-20 2023-09-12 Applied Materials, Inc. Molecular layer deposition contact landing protection for 3D NAND
US12224177B2 (en) * 2022-02-08 2025-02-11 American Air Liquide, Inc. Method of running an etch process in higher selectivity to mask and polymer regime by using a cyclic etch process
WO2025182550A1 (ja) * 2024-02-28 2025-09-04 東京エレクトロン株式会社 エッチング方法及びエッチング装置

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001068462A (ja) 1999-07-20 2001-03-16 Samsung Electronics Co Ltd 選択的ポリマー蒸着を用いたプラズマエッチング方法及びこれを用いたコンタクトホール形成方法
WO2013118660A1 (ja) 2012-02-09 2013-08-15 東京エレクトロン株式会社 半導体製造装置の製造方法及び半導体製造装置
JP2016197680A (ja) 2015-04-06 2016-11-24 東京エレクトロン株式会社 エッチング方法
JP2019046834A (ja) 2017-08-29 2019-03-22 富士電機株式会社 半導体装置の製造方法

Family Cites Families (10)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2944185B2 (ja) * 1990-10-16 1999-08-30 沖電気工業株式会社 コンタクトエッチング方法
US6083845A (en) * 1999-02-23 2000-07-04 United Microelectronics Corp. Etching method
KR20010004177A (ko) * 1999-06-28 2001-01-15 김영환 반도체소자 제조방법
JP4578893B2 (ja) * 2004-08-20 2010-11-10 住友精密工業株式会社 シリコン材のプラズマエッチング方法及びプラズマエッチング装置
CN101295643B (zh) * 2007-04-24 2010-05-19 中芯国际集成电路制造(上海)有限公司 通孔刻蚀方法及通孔掩膜
JP2014003085A (ja) * 2012-06-15 2014-01-09 Tokyo Electron Ltd プラズマエッチング方法及びプラズマ処理装置
JP6267953B2 (ja) * 2013-12-19 2018-01-24 東京エレクトロン株式会社 半導体装置の製造方法
JP6820730B2 (ja) * 2016-12-02 2021-01-27 東京エレクトロン株式会社 エッチング方法及びプラズマ処理装置
JP7137913B2 (ja) 2017-06-23 2022-09-15 株式会社半導体エネルギー研究所 半導体装置
JP7193428B2 (ja) * 2019-08-09 2022-12-20 東京エレクトロン株式会社 エッチング方法及び基板処理装置

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2001068462A (ja) 1999-07-20 2001-03-16 Samsung Electronics Co Ltd 選択的ポリマー蒸着を用いたプラズマエッチング方法及びこれを用いたコンタクトホール形成方法
WO2013118660A1 (ja) 2012-02-09 2013-08-15 東京エレクトロン株式会社 半導体製造装置の製造方法及び半導体製造装置
JP2016197680A (ja) 2015-04-06 2016-11-24 東京エレクトロン株式会社 エッチング方法
JP2019046834A (ja) 2017-08-29 2019-03-22 富士電機株式会社 半導体装置の製造方法

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Publication number Publication date
US11121000B2 (en) 2021-09-14
KR20210018119A (ko) 2021-02-17
US20210043461A1 (en) 2021-02-11
CN112349585A (zh) 2021-02-09
CN112349585B (zh) 2025-10-03
KR102851760B1 (ko) 2025-08-27
JP2021028959A (ja) 2021-02-25

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