JP7163065B2 - Semiconductor equipment and electronic equipment - Google Patents

Description

One embodiment of the present invention relates to a semiconductor device.

One embodiment of the present invention also relates to a semiconductor device. Note that one aspect of the present invention is not limited to the above technical field. The technical field of the invention disclosed in this specification and the like relates to products, methods, or manufacturing methods. Alternatively, one aspect of the invention relates to a process, machine, manufacture, or composition of matter.

Note that a semiconductor device in this specification and the like refers to all devices that can function by utilizing semiconductor characteristics. Display devices, light-emitting devices, storage devices, electro-optical devices, power storage devices, control systems, semiconductor circuits, and electronic devices may include semiconductor devices.

A transistor in which a channel is formed using an oxide semiconductor such as In--Ga--Zn oxide (In--Ga--Zn--O) (hereinafter also referred to as an OS transistor) is known. It is known that the off-state current of an OS transistor is extremely low because an oxide semiconductor has a wider bandgap than silicon. Various semiconductor devices using off-state current characteristics of OS transistors have been proposed (eg, Patent Document 1).

For example, Patent Document 1 discloses a semiconductor device in which power consumption is reduced by applying a PG (Power Gating) technique in a memory circuit using an OS transistor as a cache memory.

U.S. Patent Application Publication No. 2015/370313

A power management unit (also referred to as a PMU) for controlling the PG method may be configured with a transistor having a channel formed of silicon (Si) (hereinafter sometimes referred to as a Si transistor). can. However, since Si transistors are exposed to high temperatures and their electrical characteristics fluctuate, there arise problems such as an inability to maintain normal circuit operation and an increase in power consumption due to an increase in through current.

An OS transistor that is applied to part of the memory circuit is provided in a layer above a region in which a logic circuit including Si transistors is provided. However, since the area occupied by logic circuits such as arithmetic circuits and power supply management circuits is large, the transistors cannot be efficiently arranged in the layer where the OS transistors are provided, and there is a problem that an area (dead space) where there is no circuit pattern is generated. rice field.

In view of the above problems, an object of one embodiment of the present invention is to provide a highly reliable semiconductor device. Another object of one embodiment of the present invention is to provide a semiconductor device with excellent low power consumption. Another object of one embodiment of the present invention is to provide a semiconductor device that can be reduced in size by efficiently arranging transistors.

The description of these problems does not preclude the existence of other problems. Note that one embodiment of the present invention does not necessarily solve all of these problems. Problems other than these are self-evident from the descriptions of the specification, drawings, claims, etc., and it is possible to extract problems other than these from the descriptions of the specification, drawings, claims, etc. is.

One embodiment of the present invention includes a power supply circuit, a power management circuit, an arithmetic processing circuit, and a power switch, wherein the power supply circuit has a function of generating a power supply potential, and the power switch is the arithmetic processing circuit. The arithmetic processing circuit has a first circuit and a second circuit, and the first circuit has a function of holding data generated by the arithmetic processing circuit. the second circuit has a function of saving and holding data held in the first circuit and a function of restoring the saved data to the first circuit; The power management circuit is a semiconductor device having a logic circuit including a transistor having a metal oxide in a channel formation region.

In one aspect of the present invention, the power management circuit is preferably a semiconductor device that is a programmable logic array having input circuits, AND gate circuits, and OR gate circuits.

In one embodiment of the present invention, the AND gate and OR gate transistors each include a transistor including a metal oxide in a channel formation region, and the transistor has a function of storing charge according to configuration data when turned off. A semiconductor device having a

One aspect of the present invention is an electronic component including the semiconductor device described above and leads.

One embodiment of the present invention is an electronic device including any one of the above semiconductor device and any one of the above electronic components, and at least one of a display device, a touch panel, a microphone, a speaker, an operation key, and a housing. be.

Note that another aspect of the present invention is described in the description and drawings in the following embodiments.

One embodiment of the present invention can provide a highly reliable semiconductor device. Alternatively, one embodiment of the present invention can provide a semiconductor device with excellent low power consumption. Alternatively, one embodiment of the present invention can provide a semiconductor device that can be miniaturized by efficiently arranging transistors.

Note that the description of these effects does not preclude the existence of other effects. Note that one embodiment of the present invention does not need to have all of these effects. Effects other than these are self-evident from the descriptions of the specification, drawings, claims, etc., and it is possible to extract effects other than these from the descriptions of the specification, drawings, claims, etc. is.

FIG. 3 is a block diagram illustrating a configuration example of a semiconductor device; FIG. 3 is a block diagram illustrating a configuration example of a semiconductor device; 4A and 4B are circuit diagrams each illustrating a configuration example of a semiconductor device; 4A and 4B are circuit diagrams each illustrating a configuration example of a semiconductor device; 4A and 4B are circuit diagrams each illustrating a configuration example of a semiconductor device; 4A and 4B are circuit diagrams each illustrating a configuration example of a semiconductor device; 4A and 4B are circuit diagrams each illustrating a configuration example of a semiconductor device; 4 is a timing chart for explaining a configuration example of a semiconductor device; 4 is a timing chart for explaining a configuration example of a semiconductor device; 4A and 4B are cross-sectional views each showing a structural example of a transistor; 4A and 4B are cross-sectional views each showing a structural example of a transistor; 1A and 1B are a top view and a cross-sectional view illustrating a structural example of a transistor; 1A and 1B are a top view and a cross-sectional view illustrating a structural example of a transistor; 1A and 1B are a top view and a cross-sectional view illustrating a structural example of a transistor; 1A and 1B are a top view and a cross-sectional view illustrating a structural example of a transistor; 1A and 1B are a top view and a cross-sectional view illustrating a structural example of a transistor; 3A and 3B are a flowchart and a schematic perspective view showing an example of a method for manufacturing an electronic component; : A diagram illustrating an example of an electronic device.

Hereinafter, embodiments will be described with reference to the drawings. Those skilled in the art will readily appreciate, however, that the embodiments can be embodied in many different forms and that various changes in form and detail can be made therein without departing from the spirit and scope thereof. . Therefore, the present invention should not be construed as being limited to the description of the following embodiments.

In this specification and the like, the ordinal numbers "first", "second", and "third" are added to avoid confusion of constituent elements. Therefore, the number of components is not limited. Also, the order of the components is not limited. Also, for example, the component referred to as "first" in one of the embodiments of this specification etc. is the component referred to as "second" in another embodiment or the scope of claims It is possible. Further, for example, the component referred to as "first" in one of the embodiments of this specification etc. may be omitted in other embodiments or the scope of claims.

In the drawings, the same elements, elements having similar functions, elements made of the same material, elements formed at the same time, etc. may be denoted by the same reference numerals, and repeated description thereof may be omitted.

Moreover, in this specification and the like, a metal oxide is a metal oxide in a broad expression. Metal oxides are classified into oxide insulators, oxide conductors (including transparent oxide conductors), oxide semiconductors (also referred to as oxide semiconductors), and the like.

For example, when a metal oxide is used for a channel formation region of a transistor, the metal oxide is sometimes called an oxide semiconductor. That is, when a metal oxide has at least one of an amplifying action, a rectifying action, and a switching action, the metal oxide can be called a metal oxide semiconductor. That is, a transistor including a metal oxide in a channel formation region can be called an "oxide semiconductor transistor" or an "OS transistor." Similarly, the above-described “transistor using an oxide semiconductor” is also a transistor including a metal oxide in a channel formation region.

(Embodiment 1)
A structure of a semiconductor device which is one embodiment of the present invention is described.

FIG. 1A is a block diagram of the semiconductor device of this embodiment. A semiconductor device 100 described in this embodiment mode has a Si transistor layer 101 having an arithmetic processing circuit 111 , a timer 112 and a switch 113 , and an OS transistor layer 102 having a power management circuit 121 and a memory circuit 122 .

The Si transistor layer 101 is a layer having transistors having silicon in the channel formation region. The OS transistor layer 102 is a layer having a transistor having a metal oxide in a channel formation region. The Si transistor layer 101 is provided below the OS transistor layer 102 . The OS transistor layer 102 is provided above the Si transistor layer 101 .

The semiconductor device 100 forms a programmable logic device using OS transistors in an OS transistor layer 102 which is an upper layer of a Si transistor layer 101 . In the OS transistor layer 102, the area efficiency of the OS transistor layer 102 can be improved by providing not only the memory circuit but also the power management circuit 121 that performs arithmetic processing. In addition, the OS transistor layer 102 can have both an arithmetic function and a memory function independent of the Si transistor layer 101 . Therefore, as shown in FIG. 1A, the dead space of the OS transistor layer 102 can be efficiently utilized.

A PLA (Programmable Logic Array) is suitable as an example of a programmable logic device mounted on the OS transistor layer 102 . The PLA provided in the OS transistor layer 102 is suitable because it can repeatedly change internal connection information by using an extremely low off current of the OS transistor, which will be described later.

By adopting a hybrid process in which the OS transistor layer 102 is provided on the Si transistor layer 101, the power management circuit 121 that performs arithmetic processing can be provided in the BEOL (Back End Of Line) section. The OS transistor layer 102 can process part of the functions previously used.

With the structure of one embodiment of the present invention, for example, the OS transistor layer 102 performs signal processing in a circuit such as the power management circuit 121 that does not require a high operating speed, so that the power supply control circuit is used. Gate elements and the like provided in the Si transistor layer 101 are not required. Therefore, the redundant gate element of the Si transistor layer 101, which has been replaced by the OS transistor layer 102, is used to expand the circuit scale of the Si transistor layer 101 to improve the arithmetic processing function, or to eliminate the unnecessary gate element. The performance of the semiconductor device 100 can be improved, for example, by eliminating the gate element of the Si transistor layer 101 to reduce the circuit area.

In addition, unlike Si transistors, OS transistors can maintain good transistor characteristics even in high-temperature environments. Therefore, the semiconductor device 100 can operate well even in a high-temperature environment.

FIG. 1B is a block diagram for explaining the semiconductor device 100 in FIG. 1A.

In FIG. 1B, in addition to the Si transistor layer 101 having the arithmetic processing circuit 111, the timer 112 and the switch 113, the OS transistor layer 102 having the power management circuit 121 and the memory circuit 122, which are illustrated in FIG. A power supply circuit 103 and an input circuit 104 are shown.

The arithmetic processing circuit 111 has an arithmetic processing unit (not shown) and memory circuits 122 and 123 capable of storing data generated by the arithmetic processing. For example, the arithmetic processing unit is a processor such as CPU or GPU. The memory circuit 123 is a register provided in the Si transistor layer 101 for temporarily storing data obtained by calculation. The memory circuit 123 has a function of holding data while the power supply voltage is supplied. The memory circuit 123 loses data while the supply of power supply voltage is stopped.

It also has a memory circuit 122 provided in the OS transistor layer. The memory circuit 122 has a function of saving and holding data held in the memory circuit 123 when the power supply voltage is stopped and a function of restoring the saved data to the memory circuit 123 . For example, the memory circuit 122 is formed of an OS transistor and a capacitor, and can retain charge corresponding to data even when the supply of power supply voltage is stopped, by utilizing the fact that the off-state current of the OS transistor is extremely low. have a function. Therefore, the arithmetic processing circuit 111 can keep holding the data generated by the arithmetic processing during the period before and after applying the PG method.

The timer 112 has a function of generating a signal IN_t every predetermined period according to the clock signal. Although the timer 112 is shown as provided in the Si transistor layer 101, it may be provided in the OS transistor layer 102 if high-speed operation is not required. A signal IN_t generated by the timer 112 is output to the power management circuit 121 .

The power supply circuit 103 has a function of generating and outputting a power supply potential for driving each circuit of the Si transistor layer 101 and the OS transistor layer 102 . FIG. 1B illustrates a voltage VDD and a voltage VSS (<VDD) as power supply potentials.

The switch 113 functions as a power switch for applying the PG technique to the arithmetic processing circuit 111 . The switch 113 has a function of controlling whether to supply the voltage VDD and the voltage VSS to the arithmetic processing circuit 111 according to the signal OUT from the power management circuit 121 . Although the switch 113 is provided in the Si transistor layer 101 in the drawing, it may be provided in the OS transistor layer if high-speed operation is not required.

The input circuit 104 is external input means such as a touch sensor, or sensing means such as a temperature sensor. A signal IN_s generated by the input circuit 104 is output to the power management circuit 121 .

The power management circuit 121 has a function of generating an output signal OUT according to an input signal such as a signal IN_s or IN_t. The power management circuit 121 is a logic circuit including an OS transistor, that is, a transistor having a metal oxide in a channel formation region. Specifically, the signal can be processed by a programmable arithmetic circuit such as a programmable logic device. The power management circuit 121 does not need to operate as fast as the arithmetic processing unit. Therefore, a desired function can be realized with the performance of the OS transistor.

Unlike the arithmetic processing circuit 111, the power management circuit 121 must be continuously driven. Therefore, by forming a circuit using an OS transistor whose transistor characteristics change less due to changes in environmental temperature or the like, highly reliable operation can be realized.

A PLA (Programmable Logic Array) is suitable as an example of a programmable logic device mounted on the OS transistor layer 102 . The PLA provided in the OS transistor layer 102 is suitable because it can repeatedly change internal connection information by using an extremely low off current of the OS transistor, which will be described later.

In addition, since the current flowing between the source and the drain when the OS transistor is turned off, that is, the so-called off current, is extremely low, the through current can be reduced. Therefore, when the PLA is operated as a dynamic unipolar PLA, the through current can be made smaller, so that the power consumption can be reduced.

Next, a configuration example of a dynamic PLA that can be implemented using only OS transistors will be described with reference to FIGS. 2 to 7. FIG. An example of the driving method of the dynamic PLA shown in FIGS. 2 to 7 will be described with reference to FIGS. 8 and 9. FIG. By using a dynamic PLA, a unipolar PLA with a small static current can be configured. Also, the dynamic type PLA described below is configured to operate in synchronization with the four-phase clocks of the clock signals PH1 to PH4.

FIG. 2A is a block diagram of a power management circuit 121 that can operate as a dynamic PLA. The power management circuit 121 is composed of an input circuit 130 , an AND gate circuit 140 and an OR gate circuit 150 .

A plurality of input signals IN_1 to IN_n (n is a natural number of 2 or more) are input to the input circuit 130 from the timer 112, the input circuit 104, and the like. The input circuit 130 has a function of outputting input signals IN_1 to IN_n and inverted input signals IN_1b to IN_nb. Input circuit 130 has functions of a buffer circuit and an inverter circuit. Input circuit 130 receives clock signals PH1 and PH2 for controlling the operation.

Input signals IN_<b>1 to IN_n and inverted input signals IN_<b>1 b to IN_nb are input from the input circuit 130 to the AND gate circuit 140 . The AND gate circuit 140 has a programmable switch array capable of switching the number of input signals and a drive circuit. The AND gate circuit 140 outputs signals ANL_1 to ANL_j (j is a natural number of 2 or more; ANL_j−1, ANL_j, and ANL_j+1 are shown in FIG. 2A) according to the logical product of the input signals. Clock signals PH2 and PH3 for controlling the operation are input to AND gate circuit 140 . Various control signals for inputting and outputting signals for switching connection relationships in the programmable switch array are applied to the AND gate circuit 140 via bit lines BL, word lines WL, and wiring ANS. Note that the wiring ANS is a source line and has a function of applying a ground potential.

Signal input signals ANL_<b>1 to ANL_j from the AND gate circuit 140 are input to the OR gate circuit 150 . The OR gate circuit 150 has a programmable switch array capable of switching the number of input signals and a drive circuit. The OR gate circuit 150 outputs signals OUT_1 to OUT_k (k is a natural number of 2 or more; OUT_k−1, OUT_k, and OUT_k+1 are shown in FIG. 2A) according to the OR of the input signals. Clock signals PH3 and PH4 for controlling the operation are input to OR gate circuit 150 . Also, the OR gate circuit 150 is supplied with various control signals for inputting and outputting signals for switching connection relationships in the programmable switch array via bit lines BL, word lines WL, and wirings ORS. Note that the wiring ORS is a source line and has a function of applying a ground potential.

The input circuit 130, the AND gate circuit 140, and the OR gate circuit 150 shown in FIG. 2A can be expressed as shown in FIG. 2B. In FIG. 2B, the AND gate circuit 140 has a programmable switch array 141 and the OR gate circuit 150 has a programmable switch array 151 . Programmable switch array 141 and programmable switch array 151 each have a function as a memory circuit for holding internal connection information as configuration data. The memory circuit is preferable because internal connection information can be repeatedly changed by using extremely low off-state current of the OS transistor.

FIG. 3A is a circuit diagram showing a configuration example of the input circuit 130. As shown in FIG.

The input circuit 130 has a plurality of dynamic unipolar inverter circuits. FIG. 3A shows one dynamic unipolar inverter circuit. The dynamic unipolar inverter circuit has a transistor Tr1, a transistor Tr2, and a transistor Tr3, and has a function of generating a signal INB by inverting the input signal IN.

Transistors Tr1 and Tr2 are controlled to be on or off according to clock signals PH1 and PH2. The transistor Tr3 is controlled to be on or off according to the input signal IN. A dynamic unipolar inverter circuit can output a signal INB depending on whether each transistor is on or off.

Note that the dynamic unipolar inverter circuit included in the input circuit 130 may have the structure of the input circuit 130A illustrated in FIG. FIG. 3B shows a configuration in which the gate and back gate of each transistor included in the dynamic unipolar inverter circuit are connected. With such a structure, the amount of current that flows through the transistor can be increased.

Alternatively, the dynamic unipolar inverter circuit included in the input circuit 130 may have the configuration of the input circuit 130B illustrated in FIG. 3C. In FIG. 3C, a different potential (Vbg) is applied to the back gate of each transistor included in the dynamic unipolar inverter circuit. With such a structure, the threshold voltage of the transistor can be controlled.

Note that in the following description and drawings, the back gate of the OS transistor is omitted as shown in FIG. You can also

FIG. 4 shows a configuration example of the programmable switch array 141 that the AND gate circuit 140 has.

In FIG. 4, for the sake of explanation, the programmable switch array 141 includes a programmable switch circuit S[i-1, j-1], a programmable switch circuit S[i-1, j], and a programmable switch circuit S[i-1, j+1]. , programmable switch circuit S[i−1, j+2], programmable switch circuit S[i, j−1], programmable switch circuit S[i, j], programmable switch circuit S[i, j+1], programmable switch circuit S[ i, j+2], programmable switch circuit S[i+1, j−1], programmable switch circuit S[i+1, j], programmable switch circuit S[i+1, j+1], programmable switch circuit S[i+2, j+2]. showing.

Each programmable switch circuit S has a transistor Tr4, a transistor Tr5, a transistor Tr6, and a capacitive element C1.

FIG. 5 shows a configuration example in which the driving circuit of the AND gate circuit 140 and the programmable switch array 141 described above are combined.

The drive circuit includes a drive circuit R[i−1], a drive circuit R[i], and a drive circuit R[i+1].

The drive circuit R has a transistor Tr7 and a transistor Tr8.

FIG. 6 shows a configuration example of the programmable switch array 151 that the OR gate circuit 150 has.

6, the programmable switch array 151 includes a programmable switch circuit S[i−1, k−1], a programmable switch circuit S[i−1, k], and a programmable switch circuit S[i−1, k+1]. , programmable switch circuit S[i, k−1], programmable switch circuit S[i, k], programmable switch circuit S[i, k+1], programmable switch circuit S[i+1, k−1], programmable switch circuit S[ i+1,k] and programmable switch circuit S[i+1,k+1].

Each programmable switch circuit S has a transistor Tr4, a transistor Tr5, a transistor Tr6, and a capacitive element C1.

FIG. 7 shows a configuration example in which the driving circuit of the OR gate circuit 150 and the programmable switch array 151 described above are combined.

The programmable OR drive circuit has drive circuit R[k-1], drive circuit R[k], and drive circuit R[k+1].

FIG. 8 shows a timing chart for explaining the operation of the dynamic unipolar PLA having the circuits explained in FIGS. 3 to 7 above. FIG. 8 describes the operation of writing configuration data for setting the connection relationship.

At time T1, the word line WL[i−1] is set to the H level potential, the bit line BL[j−1], the bit line BL[j], the bit line BL[j+1], the bit line BL[j+2], the bit line Voltages representing desired data d1, data d4, data d7, data d10, data d13, data d16, and data d19 on line BL[k−1], bit line BL[k], and bit line BL[k+1], respectively. supply. Holding node N[i-1, j-1], holding node N[i-1, j], holding node N[i-1, j+1], holding node N[i-1, j+2], holding node N[ i−1, k−1], holding node N[i−1, k], holding node N[i−1, k+1], data d1, data d4, data d7, data d10, data d13, data d16 and data d19 are written respectively.

At time T2, the word line WL[i−1] is set to the L-level potential, thereby completing writing in the programmable switch circuit connected to the word line WL[i−1].

At time T3, word line WL[i] is set to H level potential, bit line BL[j−1], bit line BL[j], bit line BL[j+1], bit line BL[j+2], bit line BL Voltages representing desired data d2, data d5, data d8, data d11, data d14, data d17, and data d20 are supplied to [k−1], bit line BL[k], and bit line BL[k+1], respectively. Then, retention node N[i, j−1], retention node N[i, j], retention node N[i, j+1], retention node N[i, j+2], retention node N[i, k−1] , holding node N[i, k] and holding node N[i, k+1], data d2, data d5, data d8, data d11, data d14, data d17, and data d20 are written, respectively.

At time T4, the potential of the word line WL[i] is set at the L level, so that writing in the programmable switch circuit connected to the word line WL[i] is completed.

At time T5, word line WL[i+1] is set to H level potential, bit line BL[j−1], bit line BL[j], bit line BL[j+1], bit line BL[j+2], bit line BL Voltages representing desired data d3, data d6, data d9, data d12, data d15, data d18, and data d21 are supplied to [k−1], bit line BL[k], and bit line BL[k+1], respectively. Then, retention node N[i+1, j−1], retention node N[i+1, j], retention node N[i+1, j+1], retention node N[i+1, j+2], retention node N[i+1, k−1] , holding node N[i+1,k] and holding node N[i+1,k+1], data d3, data d6, data d9, data d12, data d15, data d18, and data d21 are written, respectively.

At time T6, the potential of the word line WL[i+1] is set at the L level, thereby completing the writing of the programmable switch circuit connected to the word line WL[i+1].

FIG. 9 shows an example of a timing chart for explaining the operation of the dynamic unipolar PLA having the circuits described in FIGS. 3 to 7 when performing logic operations.

At time T7, the input signal in1 and the input signal in3 are supplied to the AND input signal line IN[n−1] and the AND input signal line IN[n].

At time T8, the clock signal PH1 is set to the H level potential, and the AND input signal line INB connected to the output terminals of the dynamic unipolar inverter circuit INV[n−1] and the dynamic unipolar inverter circuit INV[n]. [j] and AND input signal line INB[j+2] are precharged to an H level potential.

At time T9, the clock signal PH1 is set to the L level potential, thereby completing precharging of the AND input signal lines INB[j] and AND input signal lines INB[j+2].

At time T10, by setting the clock signal PH2 to the H level potential, the inverted signals of the input signal in1 and the input signal in3 are supplied to the AND input signal line INB[j] and the AND input signal line INB[j+2], respectively. be done. Further, the AND output signal line ANL[i-1], the AND output signal line ANL[i], and the AND output signal line by the drive circuit R[i-1], the drive circuit R[i], and the drive circuit R[i+1] ANL[i+1], are precharged high.

At time T11, by setting the clock signal PH2 to the L level potential, the AND input signal line INB[j] and the AND input signal line INB[j+2] are supplied with voltage and the AND output signal line ANL[i−1]. , AND output signal line ANL[i], and AND output signal line ANL[i+1] are completed.

At time T12, by setting the clock signal PH3 to the H level potential, the AND output signal line ANL[i-1] is generated by the drive circuit R[i-1], the drive circuit R[i], and the drive circuit R[i+1]. ], AND output signal line ANL[i] and AND output signal line ANL[i+1] are potential a1 representing the result of logical operation of input signal in1, input signal in3 according to the logical function programmed in the programmable AND memory array, It transitions to the potential a3 and the potential a5. Further, the OR output signal line OUT[k-1], the OR output signal line OUT[k], the OR output signal line OUT[k], and the OR output signal line OUT[k+1], are precharged to H level.

At time T13, by setting the clock signal PH3 to the L-level potential, the AND output signal line ANL[i−1], the AND output signal line ANL[i], and the AND output signal line ANL[i+1] are supplied with voltage and , OR output signal line OUT[k−1], OR output signal line OUT[k], and OR output signal line OUT[k+1] are completed.

At time T14, the clock signal PH4 is set to an H-level potential, so that the OR output signal line OUT[k-1] is generated by the drive circuit R[k-1], the drive circuit R[k], and the drive circuit R[k+1]. ], OR output signal line OUT[k], and OR output signal line OUT[k+1] are potentials ao1 representing the result of logic operation of input signal in1, input signal in3, according to the logic function programmed in the programmable OR memory array, The potential changes to potential ao3 and potential ao5.

At time 15, by setting the clock signal PH4 to the L level potential, voltage supply to the OR output signal line OUT[k−1], the OR output signal line OUT[k], and the OR output signal line OUT[k+1] is stopped. finish. As described above, from time 7 to time T8, one logical operation expressed in the principal additive normal form for the input signals in1 and in3 is completed. Also, the input signal in2 and the input signal in4 are supplied to the AND input signal line IN[n−1] and the AND input signal line input terminal IN[n].

At time T16, the clock signal PH1 is set to the H-level potential, and the AND input connected to the output terminals of the dynamic unipolar inverter circuit INV[n−1] and the dynamic unipolar inverter circuit INV[n]. The signal line INB[j] and the AND input signal line INB[j+2] are precharged to H level.

At time T17, the clock signal PH1 is set to the L-level potential, thereby completing precharging of the AND input signal lines INB[j] and AND input signal lines INB[j+2].

At time T18, the clock signal PH2 is set to the H level potential, so that the inverted signals of the input signal in2 and the input signal in4 are supplied to the AND input signal lines INB[j] and AND input signal lines INB[j+2], respectively. be done. Further, the AND output signal line ANL[i-1], the AND output signal line ANL[i], and the AND output signal line by the drive circuit R[i-1], the drive circuit R[i], and the drive circuit R[i+1] ANL[i+1], are precharged to H level.

At time T19, by setting the clock signal PH2 to the L level potential, the AND input signal line INB[j] and the AND input signal line INB[j+2] are supplied with voltage and the AND output signal line ANL[i−1]. , AND output signal line ANL[i], and AND output signal line ANL[i+1] are completed.

At time T20, the clock signal PH3 is set to an H level potential, so that the AND output signal line ANL[i-1] is generated by the drive circuit R[i-1], the drive circuit R[i], and the drive circuit R[i+1] ], AND output signal line ANL[i] and AND output signal line ANL[i+1], according to the logic function programmed in the programmable AND memory array, potential a2 representing the result of logic operation of input signal in2, input signal in4, It transitions to the potential a4 and the potential a6. Further, the OR output signal line OUT[k-1], the OR output signal line OUT[k], the OR output signal line OUT[k], and the OR output signal line OUT[k+1], are precharged to H level.

At time T21, by setting the clock signal PH3 to the L-level potential, the AND output signal line ANL[i−1], the AND output signal line ANL[i], and the AND output signal line ANL[i+1] are supplied with voltage and , OR output signal line OUT[k−1], OR output signal line OUT[k], and OR output signal line OUT[k+1] are completed.

At time T22, the clock signal PH4 is set to an H-level potential, so that the OR output signal line OUT[k-1] is generated by the drive circuit R[k-1], the drive circuit R[k], and the drive circuit R[k+1]. ], the OR output signal line OUT[k] and the OR output signal line OUT[k+1] are potentials ao2 representing the result of the logic operation of the input signal in2, the input signal in4, according to the logic function programmed in the programmable OR memory array; The potential changes to potential ao4 and potential ao6.

At time 23, by setting the clock signal PH4 to the L level potential, voltage supply to the OR output signal line OUT[k−1], the OR output signal line OUT[k], and the OR output signal line OUT[k+1] is stopped. finish. As described above, from time 16 to time T23, one logical operation expressed in the principal additive normal form for the input signal in2 and the input signal in4 is completed.

With the configuration as described above, a dynamic unipolar PLA can be mounted on the OS transistor layer. By configuring the power supply management circuit 121 with OS transistors whose transistor characteristics fluctuate less, fluctuations in electrical characteristics due to changes in environmental temperature can be reduced, so that highly reliable operation can be achieved. In addition, the PLA provided in the OS transistor layer 102 can repeatedly change the internal connection information by using the extremely low off current of the OS transistor.

The structures, methods, and the like described in this embodiment can be combined as appropriate with the structures, methods, and the like described in other embodiments.

(Embodiment 2)
In this embodiment, structural examples of a Si transistor that can be applied to the transistor in the Si transistor layer 101 and an OS transistor that can be applied to the transistor in the OS transistor layer 102 described in the above embodiment will be described.

<Structure example of semiconductor device>
A semiconductor device illustrated in FIG. 10 includes a transistor 300 , a transistor 500 , and a capacitor 600 . 11A is a cross-sectional view of the transistor 500 in the channel length direction, FIG. 11B is a cross-sectional view of the transistor 500 in the channel width direction, and FIG. 11C is a cross-sectional view of the transistor 300 in the channel width direction. It is a diagram.

The transistor 500 is a transistor (OS transistor) including a metal oxide in a channel formation region. Since the transistor 500 has a low off-state current, memory contents can be retained for a long time by using the transistor 500 for a semiconductor device. In other words, the power consumption of the semiconductor device can be reduced because the frequency of the refresh operation is low or the refresh operation is not required.

The semiconductor device described in this embodiment includes a transistor 300, a transistor 500, and a capacitor 600 as illustrated in FIG. The transistor 500 is provided above the transistor 300 , and the capacitor 600 is provided above the transistors 300 and 500 .

The transistor 300 is provided over a substrate 311 and includes a conductor 316, an insulator 315, a semiconductor region 313 formed of part of the substrate 311, and low-resistance regions 314a and 314b functioning as source and drain regions. have.

In the transistor 300, as shown in FIG. 11C, a top surface and side surfaces in the channel width direction of a semiconductor region 313 are covered with a conductor 316 with an insulator 315 interposed therebetween. By making the transistor 300 Fin-type in this manner, the effective channel width is increased, so that the on-characteristics of the transistor 300 can be improved. Further, since the contribution of the electric field of the gate electrode can be increased, the off characteristics of the transistor 300 can be improved.

Note that the transistor 300 may be of either p-channel type or n-channel type.

A region in which a channel of the semiconductor region 313 is formed, a region in the vicinity thereof, low-resistance regions 314a and 314b serving as a source region or a drain region, and the like preferably contain a semiconductor such as a silicon-based semiconductor. It preferably contains crystalline silicon. Alternatively, a material including Ge (germanium), SiGe (silicon germanium), GaAs (gallium arsenide), GaAlAs (gallium aluminum arsenide), or the like may be used. A structure using silicon in which the effective mass is controlled by applying stress to the crystal lattice and changing the lattice spacing may be used. Alternatively, the transistor 300 may be a HEMT (High Electron Mobility Transistor) by using GaAs, GaAlAs, or the like.

The low-resistance region 314a and the low-resistance region 314b are made of an element imparting n-type conductivity such as arsenic or phosphorus, or an element imparting p-type conductivity such as boron in addition to the semiconductor material applied to the semiconductor region 313. contains elements that

The conductor 316 functioning as a gate electrode is a semiconductor material such as silicon containing an element imparting n-type conductivity such as arsenic or phosphorus or an element imparting p-type conductivity such as boron, a metal material, or an alloy. material, or a conductive material such as a metal oxide material can be used.

Note that Vth of the transistor can be adjusted by determining the work function depending on the material of the conductor. Specifically, it is preferable to use a material such as titanium nitride or tantalum nitride for the conductor. Furthermore, in order to achieve both conductivity and embeddability, it is preferable to use a metal material such as tungsten or aluminum as a laminate for the conductor, and it is particularly preferable to use tungsten from the viewpoint of heat resistance.

Note that the transistor 300 illustrated in FIG. 10 is an example, and the structure thereof is not limited, and an appropriate transistor may be used depending on the circuit configuration and the driving method. For example, an oxide semiconductor may be used for the transistor 300 as in the case of the transistor 500 .

An insulator 320 , an insulator 322 , an insulator 324 , and an insulator 326 are stacked in this order to cover the transistor 300 .

As the insulator 320, the insulator 322, the insulator 324, and the insulator 326, for example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, aluminum oxide, aluminum oxynitride, aluminum nitride oxide, aluminum nitride, or the like is used. Just do it.

The insulator 322 may function as a planarization film that planarizes a step caused by the transistor 300 or the like provided therebelow. For example, the top surface of the insulator 322 may be planarized by a chemical mechanical polishing (CMP) method or the like to improve planarity.

For the insulator 324, it is preferable to use a film having barrier properties such that hydrogen or impurities are not diffused from the substrate 311, the transistor 300, or the like to the region where the transistor 500 is provided.

As an example of a film having a barrier property against hydrogen, silicon nitride formed by a CVD method can be used. Here, diffusion of hydrogen into a semiconductor element including an oxide semiconductor, such as the transistor 500, might degrade the characteristics of the semiconductor element. Therefore, it is preferable to use a film that suppresses diffusion of hydrogen between the transistor 500 and the transistor 300 . Specifically, the film that suppresses diffusion of hydrogen is a film from which the amount of desorption of hydrogen is small.

The desorption amount of hydrogen can be analyzed using, for example, thermal desorption spectroscopy (TDS). For example, in the TDS analysis, the amount of hydrogen released from the insulator 324 in terms of hydrogen atoms is 10×10 in terms of the area of the insulator 324 in the range of 50° C. to 500° C. ¹⁵ atoms/cm ² or less, preferably 5×10 ¹⁵ atoms/cm ² or less.

Note that the insulator 326 preferably has a lower dielectric constant than the insulator 324 . For example, the dielectric constant of insulator 326 is preferably less than 4, more preferably less than 3. Also, for example, the dielectric constant of the insulator 324 is preferably 0.7 times or less, more preferably 0.6 times or less, that of the insulator 326 . By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between wirings can be reduced.

In addition, the insulator 320 , the insulator 322 , the insulator 324 , and the insulator 326 are embedded with a conductor 328 and a conductor 330 that are connected to the capacitor 600 or the transistor 500 . Note that the conductors 328 and 330 function as plugs or wirings. In addition, conductors that function as plugs or wiring may have a plurality of structures collectively given the same reference numerals. Further, in this specification and the like, the wiring and the plug connected to the wiring may be integrated. That is, there are cases where a part of the conductor functions as a wiring and a part of the conductor functions as a plug.

As a material of each plug and wiring (the conductor 328, the conductor 330, etc.), a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material is used as a single layer or a laminated layer. can be used. It is preferable to use a high-melting-point material such as tungsten or molybdenum that has both heat resistance and conductivity, and it is preferable to use tungsten. Alternatively, it is preferably made of a low-resistance conductive material such as aluminum or copper. Wiring resistance can be reduced by using a low-resistance conductive material.

A wiring layer may be provided over the insulator 326 and the conductor 330 . For example, in FIG. 10, an insulator 350, an insulator 352, and an insulator 354 are stacked in order. A conductor 356 is formed over the insulators 350 , 352 , and 354 . The conductor 356 functions as a plug or wiring connected to the transistor 300 . Note that the conductor 356 can be provided using a material similar to that of the conductors 328 and 330 .

Note that for the insulator 350 , for example, an insulator having a barrier property against hydrogen is preferably used, like the insulator 324 . Further, the conductor 356 preferably contains a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 350 having a barrier property against hydrogen. With this structure, the transistor 300 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

Note that tantalum nitride or the like may be used as the conductor having a barrier property against hydrogen, for example. Further, by stacking tantalum nitride and tungsten having high conductivity, diffusion of hydrogen from the transistor 300 can be suppressed while the conductivity of the wiring is maintained. In this case, it is preferable that the tantalum nitride layer having a barrier property against hydrogen be in contact with the insulator 350 having a barrier property against hydrogen.

A wiring layer may be provided over the insulator 354 and the conductor 356 . For example, in FIG. 10, an insulator 360, an insulator 362, and an insulator 364 are stacked in order. A conductor 366 is formed over the insulators 360 , 362 , and 364 . Conductor 366 functions as a plug or wiring. Note that the conductor 366 can be provided using a material similar to that of the conductors 328 and 330 .

Note that for the insulator 360, for example, an insulator having a barrier property against hydrogen is preferably used, like the insulator 324. Further, the conductor 366 preferably contains a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 360 having a barrier property against hydrogen. With this structure, the transistor 300 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

A wiring layer may be provided over the insulator 364 and the conductor 366 . For example, in FIG. 10, an insulator 370, an insulator 372, and an insulator 374 are stacked in order. A conductor 376 is formed over the insulators 370 , 372 , and 374 . Conductor 376 functions as a plug or wiring. Note that the conductor 376 can be provided using a material similar to that of the conductors 328 and 330 .

Note that for the insulator 370, for example, an insulator having a barrier property against hydrogen is preferably used like the insulator 324. Further, the conductor 376 preferably contains a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 370 having a barrier property against hydrogen. With this structure, the transistor 300 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

A wiring layer may be provided over the insulator 374 and the conductor 376 . For example, in FIG. 10, an insulator 380, an insulator 382, and an insulator 384 are stacked in order. A conductor 386 is formed over the insulators 380 , 382 , and 384 . Conductor 386 functions as a plug or wiring. Note that the conductor 386 can be provided using a material similar to that of the conductors 328 and 330 .

Note that for the insulator 380, for example, an insulator having a barrier property against hydrogen is preferably used like the insulator 324. Further, the conductor 386 preferably contains a conductor having a barrier property against hydrogen. In particular, a conductor having a barrier property against hydrogen is formed in the opening of the insulator 380 having a barrier property against hydrogen. With this structure, the transistor 300 and the transistor 500 can be separated by a barrier layer, and diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

The wiring layer including the conductor 356, the wiring layer including the conductor 366, the wiring layer including the conductor 376, and the wiring layer including the conductor 386 are described above. It is not limited to this. The number of wiring layers similar to the wiring layer including the conductor 356 may be three or less, or the number of wiring layers similar to the wiring layer including the conductor 356 may be five or more.

An insulator 510 , an insulator 512 , an insulator 514 , and an insulator 516 are stacked in this order over the insulator 384 . Any of the insulator 510, the insulator 512, the insulator 514, and the insulator 516 is preferably a substance having barrier properties against oxygen and hydrogen.

For the insulators 510 and 514, for example, a film having a barrier property that prevents hydrogen or impurities from diffusing from the substrate 311, a region where the transistor 300 is provided, or the like to a region where the transistor 500 is provided is used. is preferred. Therefore, a material similar to that of the insulator 324 can be used.

As an example of a film having a barrier property against hydrogen, silicon nitride formed by a CVD method can be used. Here, diffusion of hydrogen into a semiconductor element including an oxide semiconductor, such as the transistor 500, might degrade the characteristics of the semiconductor element. Therefore, it is preferable to use a film that suppresses diffusion of hydrogen between the transistor 500 and the transistor 300 . Specifically, the film that suppresses diffusion of hydrogen is a film from which the amount of desorption of hydrogen is small.

It is preferable to use a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide for the insulators 510 and 514, which are films having a barrier property against hydrogen.

In particular, aluminum oxide has a high shielding effect of preventing the penetration of both oxygen and impurities such as hydrogen and moisture, which cause variations in the electrical characteristics of the transistor. Therefore, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 500 during and after the manufacturing process of the transistor. In addition, release of oxygen from the oxide forming the transistor 500 can be suppressed. Therefore, it is suitable for use as a protective film for the transistor 500 .

Further, for example, the insulator 512 and the insulator 516 can be formed using a material similar to that of the insulator 320 . Further, by using a material having a relatively low dielectric constant as an interlayer film for the insulating film, parasitic capacitance generated between wirings can be reduced. For example, the insulators 512 and 516 can be formed using a silicon oxide film, a silicon oxynitride film, or the like.

A conductor 518 or the like is embedded in the insulator 510 , the insulator 512 , the insulator 514 , and the insulator 516 . Note that the conductor 518 functions as a plug or wiring that is connected to the capacitor 600 or the transistor 300 . The conductor 518 can be provided using a material similar to that of the conductors 328 and 330 .

In particular, a conductor 518 in a region in contact with the insulator 510 and the insulator 514 is preferably a conductor having barrier properties against oxygen, hydrogen, and water. With this structure, the transistor 300 and the transistor 500 can be separated by a layer having barrier properties against oxygen, hydrogen, and water, and diffusion of hydrogen from the transistor 300 to the transistor 500 can be suppressed.

A transistor 500 is provided above the insulator 516 .

11A and 11B, the transistor 500 includes an insulator 520 over an insulator 516, an insulator 522 over an insulator 520, and an insulator 522. Insulator 524 overlying, oxide 530a overlying insulator 524, oxide 530b overlying oxide 530a, and oxide 530b overlying oxide 530b spaced apart from each other. A conductor 542a and a conductor 542b, an insulator 580 which is provided over the conductor 542a and the conductor 542b and has an opening formed between the conductor 542a and the conductor 542b, and which is provided in the opening The insulator 550, the oxide 530b, the conductor 542a, the conductor 542a, the conductor 542b, the insulator 580, and the conductor 560 are arranged between the conductor 560, the oxide 530b, the conductor 542a, and the conductor 542b. and oxide 530 c disposed between insulator 580 and insulator 550 .

11A and 11B, an insulator 544 is preferably provided between oxides 530a, 530b, conductors 542a and 542b, and an insulator 580. . 11A and 11B, the conductor 560 includes a conductor 560a provided inside the insulator 550 and a conductor 560a embedded inside the conductor 560a. 560b and . Further, an insulator 574 is preferably provided over the insulator 580, the conductor 560, and the insulator 550 as shown in FIGS.

Note that the oxide 530a, the oxide 530b, and the oxide 530c may be collectively referred to as the oxide 530 below. Further, the conductor 542a and the conductor 542b may be collectively referred to as a conductor 542 in some cases.

Note that although the transistor 500 has a structure in which three layers of the oxide 530a, the oxide 530b, and the oxide 530c are stacked in a region where a channel is formed and in the vicinity thereof, the present invention is limited to this. not a thing For example, a single layer of the oxide 530b, a two-layer structure of the oxides 530b and 530a, a two-layer structure of the oxides 530b and 530c, or a stacked structure of four or more layers may be employed. Although the conductor 560 has a two-layer structure in the transistor 500, the present invention is not limited to this. For example, the conductor 560 may have a single-layer structure or a laminated structure of three or more layers. Further, the transistor 500 illustrated in FIGS. 10, 11A, and 11B is merely an example, and the structure is not limited thereto, and an appropriate transistor may be used depending on the circuit structure and driving method.

Here, the conductor 560 functions as a gate electrode of the transistor, and the conductors 542a and 542b function as source and drain electrodes, respectively. As described above, the conductor 560 is formed to be embedded in the opening of the insulator 580 and the region sandwiched between the conductors 542a and 542b. The placement of conductor 560 , conductor 542 a and conductor 542 b is selected in a self-aligned manner with respect to openings in insulator 580 . That is, in the transistor 500, the gate electrode can be arranged between the source electrode and the drain electrode in a self-aligned manner. Therefore, the conductor 560 can be formed without providing an alignment margin, so that the area occupied by the transistor 500 can be reduced. As a result, miniaturization and high integration of the semiconductor device can be achieved.

Furthermore, since conductor 560 is formed in a region between conductors 542a and 542b in a self-aligned manner, conductor 560 does not have a region that overlaps conductors 542a or 542b. Accordingly, parasitic capacitance formed between the conductor 560 and the conductors 542a and 542b can be reduced. Therefore, the switching speed of the transistor 500 can be improved and high frequency characteristics can be obtained.

The insulator 550 functions as a gate insulating film.

Here, the insulator 524 in contact with the oxide 530 preferably contains more oxygen than the stoichiometric composition. In other words, the insulator 524 preferably has an excess oxygen region. By providing such an insulator containing excess oxygen in contact with the oxide 530, oxygen vacancies in the oxide 530 can be reduced and the reliability of the transistor 500 can be improved.

Specifically, an oxide material from which part of oxygen is released by heating is preferably used as the insulator having the excess oxygen region. The oxide that desorbs oxygen by heating means that the desorption amount of oxygen in terms of oxygen atoms is 1.0×10 ¹⁸ atoms/cm ³ or more, preferably 1, in TDS (Thermal Desorption Spectroscopy) analysis. It is an oxide film having a concentration of 0.0×10 ¹⁹ atoms/cm ³ or more, more preferably 2.0×10 ¹⁹ atoms/cm ³ or 3.0×10 ²⁰ atoms/cm ³ or more. The surface temperature of the film during the TDS analysis is preferably in the range of 100° C. or higher and 700° C. or lower, or 100° C. or higher and 400° C. or lower.

In addition, when the insulator 524 has an excess oxygen region, the insulator 522 preferably has a function of suppressing diffusion of oxygen (eg, oxygen atoms, oxygen molecules, etc.) (the above oxygen is difficult to permeate).

Since the insulator 522 has a function of suppressing diffusion of oxygen and impurities, oxygen contained in the oxide 530 does not diffuse toward the insulator 520, which is preferable.

Insulator 522 is, for example, a so-called high oxide such as aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO ₃ ) or (Ba,Sr)TiO ₃ (BST). It is preferable to use insulators containing -k materials in a single layer or a stack. As transistors are miniaturized and highly integrated, thinning of the gate insulating film may cause problems such as leakage current. By using a high-k material for the insulator that functions as the gate insulating film, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

In particular, an insulator containing an oxide of one or both of aluminum and hafnium, which is an insulating material having a function of suppressing diffusion of impurities and oxygen (through which oxygen hardly penetrates), is preferably used. As the insulator containing oxide of one or both of aluminum and hafnium, aluminum oxide, hafnium oxide, oxide containing aluminum and hafnium (hafnium aluminate), or the like is preferably used. When the insulator 522 is formed using such a material, the insulator 522 suppresses release of oxygen from the oxide 530 and entry of impurities such as hydrogen from the periphery of the transistor 500 into the oxide 530. act as a layer.

Alternatively, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked over the above insulator.

Insulator 520 is also preferably thermally stable. For example, since silicon oxide and silicon oxynitride are thermally stable, an insulator made of a high-k material and the insulator 520 are combined to form a thermally stable laminated structure with a high relative dielectric constant. can be done.

Note that the insulator 520, the insulator 522, and the insulator 524 may have a stacked structure of two or more layers. In that case, it is not limited to a laminated structure made of the same material, and a laminated structure made of different materials may be used.

In the transistor 500, a metal oxide functioning as an oxide semiconductor is preferably used for the oxide 530 including a channel formation region. For example, as the oxide 530, In-M-Zn oxide (element M is aluminum, gallium, yttrium, copper, vanadium, beryllium, boron, titanium, iron, nickel, germanium, zirconium, molybdenum, lanthanum, cerium, neodymium , hafnium, tantalum, tungsten, magnesium, or the like) may be used. Alternatively, as the oxide 530, an In--Ga oxide or an In--Zn oxide may be used.

A metal oxide that functions as a channel formation region in the oxide 530 preferably has a bandgap of 2 eV or more, preferably 2.5 eV or more. By using a metal oxide with a large bandgap in this manner, off-state current of a transistor can be reduced.

Since the oxide 530 includes the oxide 530a under the oxide 530b, diffusion of impurities from a structure formed below the oxide 530a to the oxide 530b can be suppressed. In addition, by providing the oxide 530c over the oxide 530b, diffusion of impurities from a structure formed above the oxide 530c to the oxide 530b can be suppressed.

Note that the oxide 530 preferably has a layered structure with oxides having different atomic ratios of metal atoms. Specifically, in the metal oxide used for the oxide 530a, the atomic number ratio of the element M among the constituent elements is greater than the atomic number ratio of the element M among the constituent elements in the metal oxide used for the oxide 530b. is preferred. Further, in the metal oxide used for the oxide 530a, the atomic ratio of the element M to In is preferably higher than the atomic ratio of the element M to In in the metal oxide used for the oxide 530b. In addition, the atomic ratio of In to the element M in the metal oxide used for the oxide 530b is preferably higher than the atomic ratio of In to the element M in the metal oxide used for the oxide 530a. In addition, the oxide 530c can be a metal oxide that can be used for the oxide 530a or the oxide 530b.

In addition, it is preferable that the energies of the conduction band bottoms of the oxides 530a and 530c be higher than the energies of the conduction band bottoms of the oxide 530b. Also, in other words, the electron affinities of the oxides 530a and 530c are preferably smaller than the electron affinities of the oxide 530b.

Here, the energy level at the bottom of the conduction band changes smoothly at the junction of the oxide 530a, the oxide 530b, and the oxide 530c. In other words, it can be said that the energy level of the bottom of the conduction band at the junction of the oxide 530a, the oxide 530b, and the oxide 530c continuously changes or continuously joins. In order to achieve this, the defect level density of the mixed layers formed at the interface between the oxides 530a and 530b and the interface between the oxides 530b and 530c should be lowered.

Specifically, the oxide 530a and the oxide 530b, and the oxide 530b and the oxide 530c have a common element (main component) other than oxygen, thereby forming a mixed layer with a low defect level density. be able to. For example, when the oxide 530b is an In--Ga--Zn oxide, the oxides 530a and 530c may be In--Ga--Zn oxide, Ga--Zn oxide, gallium oxide, or the like.

At this time, the main path of carriers is the oxide 530b. When the oxides 530a and 530c have the above structures, defect level densities at the interfaces between the oxides 530a and 530b and between the oxides 530b and 530c can be reduced. Therefore, the influence of interface scattering on carrier conduction is reduced, and the transistor 500 can obtain a high on-state current.

A conductor 542 (a conductor 542a and a conductor 542b) functioning as a source electrode and a drain electrode is provided over the oxide 530b. Conductors 542 include aluminum, chromium, copper, silver, gold, platinum, tantalum, nickel, titanium, molybdenum, tungsten, hafnium, vanadium, niobium, manganese, magnesium, zirconium, beryllium, indium, ruthenium, iridium, strontium, It is preferable to use a metal element selected from lanthanum, an alloy containing the metal elements described above, or an alloy combining the metal elements described above. For example, tantalum nitride, titanium nitride, tungsten, nitride containing titanium and aluminum, nitride containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxide containing strontium and ruthenium, oxide containing lanthanum and nickel, and the like are used. is preferred. Also, tantalum nitride, titanium nitride, nitrides containing titanium and aluminum, nitrides containing tantalum and aluminum, ruthenium oxide, ruthenium nitride, oxides containing strontium and ruthenium, and oxides containing lanthanum and nickel are difficult to oxidize. It is preferable because it is a conductive material or a material that maintains conductivity even after absorbing oxygen.

Further, as shown in FIG. 11A, regions 543 (regions 543a and 543b) are formed as low-resistance regions at the interface between the oxide 530 and the conductor 542 and in the vicinity thereof in some cases. be. At this time, the region 543a functions as one of the source region and the drain region, and the region 543b functions as the other of the source region and the drain region. A channel formation region is formed in a region sandwiched between the regions 543a and 543b.

By providing the conductor 542 so as to be in contact with the oxide 530, the oxygen concentration in the region 543 may be reduced. In some cases, a metal compound layer containing the metal contained in the conductor 542 and the component of the oxide 530 is formed in the region 543 . In such a case, the carrier density in region 543 increases and region 543 becomes a low resistance region.

An insulator 544 is provided to cover the conductor 542 and suppress oxidation of the conductor 542 . At this time, the insulator 544 may be provided so as to cover the side surface of the oxide 530 and be in contact with the insulator 524 .

As the insulator 544, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, or the like can be used. can.

In particular, as the insulator 544, an insulator containing one or both oxides of aluminum and hafnium, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate), is preferably used. In particular, hafnium aluminate has higher heat resistance than hafnium oxide film. Therefore, it is preferable because it is difficult to crystallize in the heat history in the subsequent steps. Note that the insulator 544 is not an essential component when the conductor 542 is made of a material having oxidation resistance or when the conductivity does not significantly decrease even if oxygen is absorbed. It may be appropriately designed depending on the required transistor characteristics.

The insulator 550 functions as a gate insulating film. Insulator 550 is preferably placed in contact with the inside (top and sides) of oxide 530c. The insulator 550 is preferably formed using an insulator from which oxygen is released by heating. For example, in temperature programmed desorption spectroscopy (TDS analysis), the desorption amount of oxygen in terms of oxygen molecules is 1.0×10 ¹⁸ atoms/cm ³ or more, preferably 1.0×10 ¹⁹ . The oxide film has atoms/cm ³ or more, more preferably 2.0×10 ¹⁹ atoms/cm ³ or 3.0×10 ²⁰ atoms/cm ³ . The surface temperature of the film during the TDS analysis is preferably in the range of 100° C. or higher and 700° C. or lower.

Specifically, silicon oxide having excess oxygen, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, and vacancies Silicon oxide can be used. In particular, silicon oxide and silicon oxynitride are preferable because they are stable against heat.

By providing an insulator from which oxygen is released by heating as the insulator 550 in contact with the top surface of the oxide 530c, oxygen is effectively introduced from the insulator 550 to the channel formation region of the oxide 530b through the oxide 530c. can be supplied. Further, similarly to the insulator 524, the concentration of impurities such as water or hydrogen in the insulator 550 is preferably reduced. The thickness of the insulator 550 is preferably 1 nm or more and 20 nm or less.

Further, a metal oxide may be provided between the insulator 550 and the conductor 560 in order to efficiently supply excess oxygen contained in the insulator 550 to the oxide 530 . The metal oxide preferably suppresses diffusion of oxygen from the insulator 550 to the conductor 560 . By providing the metal oxide that suppresses diffusion of oxygen, diffusion of excess oxygen from the insulator 550 to the conductor 560 is suppressed. That is, reduction in the amount of excess oxygen supplied to the oxide 530 can be suppressed. In addition, oxidation of the conductor 560 due to excess oxygen can be suppressed. As the metal oxide, a material that can be used for the insulator 544 may be used.

Although the conductor 560 functioning as a gate electrode has a two-layer structure in FIGS. 11A and 11B, it may have a single-layer structure or a stacked structure of three or more layers.

The conductor 560a has a function of suppressing diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, nitrogen atoms, nitrogen molecules, nitrogen oxide molecules (such as N ₂ O, NO, NO ₂ ), and copper atoms. Materials are preferably used. Alternatively, it is preferable to use a conductive material that has a function of suppressing at least one diffusion of oxygen (eg, oxygen atoms, oxygen molecules, etc.). Since the conductor 560a has a function of suppressing diffusion of oxygen, oxygen contained in the insulator 550 can suppress oxidation of the conductor 560b and a decrease in conductivity. As the conductive material having a function of suppressing diffusion of oxygen, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like is preferably used, for example.

A conductive material containing tungsten, copper, or aluminum as its main component is preferably used for the conductor 560b. In addition, since the conductor 560b also functions as a wiring, a conductor with high conductivity is preferably used. For example, a conductive material whose main component is tungsten, copper, or aluminum can be used. Further, the conductor 560b may have a layered structure, for example, a layered structure of titanium, titanium nitride, and the above conductive material.

The insulator 580 is provided over the conductor 542 with the insulator 544 interposed therebetween. Insulator 580 preferably has excess oxygen regions. For example, the insulator 580 may be silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, or silicon oxide having vacancies. , or resin. In particular, silicon oxide and silicon oxynitride are preferable because they are thermally stable. In particular, silicon oxide and silicon oxide having vacancies are preferable because an excess oxygen region can be easily formed in a later step.

Insulator 580 preferably has excess oxygen regions. By providing the insulator 580 from which oxygen is released by heating in contact with the oxide 530c, oxygen in the insulator 580 can be efficiently supplied to the oxide 530 through the oxide 530c. Note that the concentration of impurities such as water or hydrogen in the insulator 580 is preferably low.

The opening of the insulator 580 is formed so as to overlap a region between the conductors 542a and 542b. Thus, the conductor 560 is formed so as to be embedded in the opening of the insulator 580 and the region sandwiched between the conductors 542a and 542b.

When miniaturizing a semiconductor device, it is required to shorten the gate length, but it is necessary to prevent the conductivity of the conductor 560 from being lowered. Therefore, when the film thickness of the conductor 560 is increased, the conductor 560 can have a shape with a high aspect ratio. In this embodiment mode, since the conductor 560 is embedded in the opening of the insulator 580, the conductor 560 can be formed without collapsing during the process even if the conductor 560 has a high aspect ratio. can be done.

The insulator 574 is preferably provided in contact with the top surface of the insulator 580 , the top surface of the conductor 560 , and the top surface of the insulator 550 . By forming the insulator 574 by a sputtering method, excess oxygen regions can be provided in the insulators 550 and 580 . Accordingly, oxygen can be supplied into the oxide 530 from the excess oxygen region.

For example, the insulator 574 can be a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, or the like. can be done.

In particular, aluminum oxide has a high barrier property and can suppress the diffusion of hydrogen and nitrogen even in a thin film having a thickness of 0.5 nm or more and 3.0 nm or less. Therefore, the aluminum oxide film formed by the sputtering method can function not only as an oxygen supply source but also as a barrier film against impurities such as hydrogen.

An insulator 581 functioning as an interlayer film is preferably provided over the insulator 574 . Like the insulator 524 and the like, the insulator 581 preferably has a reduced concentration of impurities such as water or hydrogen in the film.

In addition, the conductors 540 a and 540 b are arranged in openings formed in the insulators 581 , 574 , 580 , and 544 . The conductor 540a and the conductor 540b are provided to face each other with the conductor 560 interposed therebetween. The conductors 540a and 540b have the same structure as the conductors 546 and 548, which will be described later.

An insulator 582 is provided over the insulator 581 . It is preferable that the insulator 582 use a substance that has a barrier property against oxygen and hydrogen. Therefore, a material similar to that of the insulator 514 can be used for the insulator 582 . For example, the insulator 582 is preferably formed using a metal oxide such as aluminum oxide, hafnium oxide, or tantalum oxide.

In particular, aluminum oxide has a high shielding effect of preventing the penetration of both oxygen and impurities such as hydrogen and moisture, which cause variations in the electrical characteristics of the transistor. Therefore, aluminum oxide can prevent impurities such as hydrogen and moisture from entering the transistor 500 during and after the manufacturing process of the transistor. In addition, release of oxygen from the oxide forming the transistor 500 can be suppressed. Therefore, it is suitable for use as a protective film for the transistor 500 .

An insulator 586 is provided over the insulator 582 . A material similar to that of the insulator 320 can be used for the insulator 586 . Further, by using a material having a relatively low dielectric constant as an interlayer film for the insulating film, parasitic capacitance generated between wirings can be reduced. For example, a silicon oxide film, a silicon oxynitride film, or the like can be used as the insulator 586 .

In addition, the insulator 520, the insulator 522, the insulator 524, the insulator 544, the insulator 580, the insulator 574, the insulator 581, the insulator 582, and the insulator 586 include the conductor 546, the conductor 548, and the like. is embedded.

The conductors 546 and 548 function as plugs or wirings that connect to the capacitor 600 , the transistor 500 , or the transistor 300 . The conductors 546 and 548 can be formed using a material similar to that of the conductors 328 and 330 .

Next, a capacitor 600 is provided above the transistor 500 . A capacitor 600 includes a conductor 610 , a conductor 620 , and an insulator 630 .

A conductor 612 may be provided over the conductor 546 and the conductor 548 . The conductor 612 functions as a plug or wiring connected to the transistor 500 . The conductor 610 functions as an electrode of the capacitor 600 . Note that the conductor 612 and the conductor 610 can be formed at the same time.

The conductors 612 and 610 are metal films containing an element selected from molybdenum, titanium, tantalum, tungsten, aluminum, copper, chromium, neodymium, and scandium, or metal nitride films containing any of the above elements as components. (tantalum nitride film, titanium nitride film, molybdenum nitride film, tungsten nitride film) or the like can be used. Alternatively, indium tin oxide, indium oxide containing tungsten oxide, indium zinc oxide containing tungsten oxide, indium oxide containing titanium oxide, indium tin oxide containing titanium oxide, indium zinc oxide, and silicon oxide are added. Conductive materials such as indium tin oxide can also be applied.

Although the conductors 612 and 610 have a single-layer structure in FIG. 10, they are not limited to this structure and may have a stacked structure of two or more layers. For example, between a conductor with a barrier property and a conductor with high conductivity, a conductor with a barrier property and a conductor with high adhesion to the conductor with high conductivity may be formed.

A conductor 620 is provided so as to overlap with the conductor 610 with an insulator 630 interposed therebetween. Note that the conductor 620 can be made of a conductive material such as a metal material, an alloy material, or a metal oxide material. It is preferable to use a high-melting-point material such as tungsten or molybdenum that has both heat resistance and conductivity, and it is particularly preferable to use tungsten. In addition, when forming simultaneously with another structure such as a conductor, a low-resistance metal material such as Cu (copper) or Al (aluminum) may be used.

An insulator 650 is provided over the conductor 620 and the insulator 630 . The insulator 650 can be provided using a material similar to that of the insulator 320 . In addition, the insulator 650 may function as a planarizing film that covers the uneven shape thereunder.

With the use of this structure, variation in electrical characteristics can be suppressed and reliability can be improved in a semiconductor device including a transistor including an oxide semiconductor. Alternatively, a transistor including an oxide semiconductor with high on-state current can be provided. Alternatively, a transistor including an oxide semiconductor with low off-state current can be provided. Alternatively, a semiconductor device with reduced power consumption can be provided. Alternatively, a semiconductor device including a transistor including an oxide semiconductor can be miniaturized or highly integrated.

<Example of transistor structure>
Note that the transistor 500 of the semiconductor device described in this embodiment is not limited to the above structure. Structural examples that can be used for the transistor 500 are described below.

<Transistor Structure Example 1>
A structural example of the transistor 510A is described with reference to FIGS. FIG. 12A is a top view of the transistor 510A. FIG. 12(B) is a cross-sectional view of the portion indicated by the dashed line L1-L2 in FIG. 12(A). FIG. 12(C) is a cross-sectional view of the portion indicated by the one-dot chain line W1-W2 in FIG. 12(A). Note that in the top view of FIG. 12A, some elements are omitted for clarity of illustration.

12A, 12B, and 12C, the transistor 510A and the insulators 511, 512, 514, 516, 580, 582, and 582 functioning as interlayer films. A body 584 is shown. Also shown are conductors 546 (conductors 546a and 546b) that are electrically connected to the transistor 510A and function as contact plugs.

The transistor 510A includes a conductor 560 (a conductor 560a and a conductor 560b) functioning as a gate electrode, an insulator 550 functioning as a gate insulating film, and an oxide 530 having a region where a channel is formed (an oxide 530a). , oxide 530b, and oxide 530c);

Further, in the transistor 510A illustrated in FIG. 12, the oxide 530c, the insulator 550, and the conductor 560 are placed in an opening provided in the insulator 580 with the insulator 574 interposed therebetween. In addition, oxide 530c, insulator 550, and conductor 560 are placed between conductors 542a and 542b.

The insulators 511 and 512 function as interlayer films.

The interlayer film may be silicon oxide, silicon oxynitride, silicon nitride oxide, aluminum oxide, hafnium oxide, tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO ₃ ) or (Ba, Sr). Insulators such as TiO ₃ (BST) can be used in single layers or stacks. Alternatively, aluminum oxide, bismuth oxide, germanium oxide, niobium oxide, silicon oxide, titanium oxide, tungsten oxide, yttrium oxide, or zirconium oxide may be added to these insulators. Alternatively, these insulators may be nitrided. Silicon oxide, silicon oxynitride, or silicon nitride may be stacked over the above insulator.

For example, the insulator 511 preferably functions as a barrier film that prevents impurities such as water or hydrogen from entering the transistor 510A from the substrate side. Therefore, the insulator 511 is preferably made of an insulating material that has a function of suppressing diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms (the impurities are less likely to permeate). Alternatively, it is preferable to use an insulating material that has a function of suppressing at least one diffusion of oxygen (for example, oxygen atoms, oxygen molecules, etc.) (the above-mentioned oxygen is difficult to permeate). Alternatively, for example, aluminum oxide, silicon nitride, or the like may be used as the insulator 511 . With this structure, impurities such as hydrogen and water can be prevented from diffusing from the substrate side of the insulator 511 toward the transistor 510A side.

For example, insulator 512 preferably has a lower dielectric constant than insulator 511 . By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between wirings can be reduced.

In transistor 510A, conductor 560 may function as a gate electrode.

The insulator 514 and the insulator 516 function as interlayer films similarly to the insulator 511 or the insulator 512 . For example, the insulator 514 preferably functions as a barrier film that prevents impurities such as water or hydrogen from entering the transistor 510A from the substrate side. With this structure, impurities such as hydrogen and water can be prevented from diffusing from the substrate side of the insulator 514 toward the transistor 510A side. Also, for example, the insulator 516 preferably has a lower dielectric constant than the insulator 514 . By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between wirings can be reduced.

Further, the insulator 522 preferably has a barrier property. Since the insulator 522 has a barrier property, it functions as a layer that prevents impurities such as hydrogen from entering the transistor 510A from the periphery of the transistor 510A.

The insulator 522 is made of, for example, aluminum oxide, hafnium oxide, an oxide containing aluminum and hafnium (hafnium aluminate), tantalum oxide, zirconium oxide, lead zirconate titanate (PZT), strontium titanate (SrTiO ₃ ) or ( It is preferable to use an insulator containing a so-called high-k material such as Ba,Sr)TiO ₃ (BST) in a single layer or stacked layers. As transistors are miniaturized and highly integrated, thinning of the gate insulating film may cause problems such as leakage current. By using a high-k material for the insulator that functions as the gate insulating film, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness.

For example, insulator 521 is preferably thermally stable. For example, since silicon oxide and silicon oxynitride are thermally stable, an insulator of a high-k material and the insulator 522 are combined to form a thermally stable laminated structure with a high relative dielectric constant. can be done.

Oxide 530 having a region functioning as a channel forming region includes oxide 530a, oxide 530b over oxide 530a, and oxide 530c over oxide 530b. By providing the oxide 530a under the oxide 530b, diffusion of impurities from a structure formed below the oxide 530a to the oxide 530b can be suppressed. In addition, by providing the oxide 530c over the oxide 530b, diffusion of impurities from a structure formed above the oxide 530c to the oxide 530b can be suppressed. As the oxide 530, an oxide semiconductor which is one of the metal oxides described above can be used.

Note that the oxide 530c is preferably provided in the opening provided in the insulator 580 with the insulator 574 interposed therebetween. When the insulator 574 has a barrier property, diffusion of impurities from the insulator 580 into the oxide 530 can be suppressed.

One of the conductors 542 functions as a source electrode and the other functions as a drain electrode.

The conductors 542a and 542b can be formed using a metal such as aluminum, titanium, chromium, nickel, copper, yttrium, zirconium, molybdenum, silver, tantalum, or tungsten, or an alloy containing any of these as its main component. . In particular, a metal nitride film such as tantalum nitride is preferable because it has a barrier property against hydrogen or oxygen and has high oxidation resistance.

Also, although a single-layer structure is shown in FIG. 12, a laminated structure of two or more layers may be used. For example, a tantalum nitride film and a tungsten film are preferably stacked. Alternatively, a titanium film and an aluminum film may be stacked. A two-layer structure in which an aluminum film is stacked over a tungsten film, a two-layer structure in which a copper film is stacked over a copper-magnesium-aluminum alloy film, a two-layer structure in which a copper film is stacked over a titanium film, a two-layer structure in which a copper film is stacked over a titanium film, A two-layer structure in which copper films are stacked may be used.

In addition, a three-layer structure in which a titanium film or a titanium nitride film is laminated, an aluminum film or a copper film is laminated on the titanium film or the titanium nitride film, and a titanium film or a titanium nitride film is formed thereon, a molybdenum film or a There is a three-layer structure including a molybdenum nitride film, an aluminum film or a copper film laminated on the molybdenum film or the molybdenum nitride film, and a molybdenum film or a molybdenum nitride film formed thereon. Note that a transparent conductive material containing indium oxide, tin oxide, or zinc oxide may be used.

A barrier layer may be provided over the conductor 542 . The barrier layer preferably uses a substance having barrier properties against oxygen or hydrogen. With this structure, oxidation of the conductor 542 can be suppressed when the insulator 574 is formed.

A metal oxide, for example, can be used for the barrier layer. In particular, it is preferable to use an insulating film having a barrier property against oxygen and hydrogen, such as aluminum oxide, hafnium oxide, and gallium oxide. Alternatively, silicon nitride formed by a CVD method may be used.

By having the barrier layer, the selection of materials for the conductor 542 can be expanded. For example, the conductor 542 can be made of a material having low oxidation resistance but high conductivity, such as tungsten or aluminum. Alternatively, for example, a conductor that can be easily formed into a film or processed can be used.

The insulator 550 functions as a gate insulating film. The insulator 550 is preferably provided in the opening provided in the insulator 580 with the oxide 530c and the insulator 574 interposed therebetween.

As transistors are miniaturized and highly integrated, thinning of the gate insulating film may cause problems such as leakage current. In that case, the insulator 550 may have a laminated structure. By making the insulator that functions as the gate insulating film a laminated structure of a high-k material and a thermally stable material, it is possible to reduce the gate potential during transistor operation while maintaining the physical film thickness. becomes. Moreover, it is possible to obtain a laminated structure that is thermally stable and has a high dielectric constant.

A conductor 560 functioning as a gate electrode has a conductor 560a and a conductor 560b over the conductor 560a. For the conductor 560a, a conductive material having a function of suppressing diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms is preferably used. Alternatively, it is preferable to use a conductive material that has a function of suppressing at least one diffusion of oxygen (eg, oxygen atoms, oxygen molecules, etc.). In this specification, the function of suppressing the diffusion of impurities or oxygen means the function of suppressing the diffusion of either one or all of the impurities or oxygen.

Since the conductor 560a has a function of suppressing the diffusion of oxygen, the material selectivity of the conductor 560b can be improved. In other words, with the presence of the conductor 560a, oxidation of the conductor 560b is suppressed, and a decrease in conductivity can be prevented.

As the conductive material having a function of suppressing diffusion of oxygen, tantalum, tantalum nitride, ruthenium, ruthenium oxide, or the like is preferably used, for example. An oxide semiconductor that can be used as the oxide 530 can be used as the conductor 560a. In that case, by forming the conductor 560b by a sputtering method, the electric resistance value of the conductor 560a can be lowered and the conductor 560a can be a conductor. This can be called an OC (Oxide Conductor) electrode.

A conductive material containing tungsten, copper, or aluminum as its main component is preferably used for the conductor 560b. Further, since the conductor 560 functions as a wiring, a conductor with high conductivity is preferably used. For example, a conductive material whose main component is tungsten, copper, or aluminum can be used. Further, the conductor 560b may have a layered structure, for example, a layered structure of titanium or titanium nitride and the above conductive material.

An insulator 574 is placed between insulator 580 and transistor 510A. For the insulator 574, an insulating material having a function of suppressing diffusion of impurities such as water or hydrogen and oxygen is preferably used. For example, it is preferable to use aluminum oxide or hafnium oxide. In addition, metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, or tantalum oxide, silicon nitride oxide, or silicon nitride can also be used.

With the insulator 574, impurities such as water and hydrogen contained in the insulator 580 can be prevented from diffusing into the oxide 530b through the oxide 530c and the insulator 550. FIG. In addition, oxidation of the conductor 560 due to excess oxygen in the insulator 580 can be suppressed.

The insulator 580, the insulator 582, and the insulator 584 function as interlayer films.

Like the insulator 514, the insulator 582 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen from entering the transistor 510A from the outside.

Insulators 580 and 584 preferably have lower dielectric constants than insulator 582, like insulator 516. By using a material with a low dielectric constant as the interlayer film, the parasitic capacitance generated between wirings can be reduced.

Transistor 510A may also be electrically connected to other structures through plugs or wires, such as conductor 546 embedded in insulator 580, insulator 582, and insulator 584. FIG.

As a material of the conductor 546, a single layer or a stacked layer of a conductive material such as a metal material, an alloy material, a metal nitride material, or a metal oxide material can be used. For example, it is preferable to use a high-melting-point material such as tungsten or molybdenum that has both heat resistance and conductivity. Alternatively, it is preferably made of a low-resistance conductive material such as aluminum or copper. Wiring resistance can be reduced by using a low-resistance conductive material.

For example, the conductor 546 has a layered structure of tantalum nitride or the like, which is a conductor having a barrier property against hydrogen and oxygen, and tungsten, which has high conductivity, so that the conductivity of the wiring is increased. Diffusion of impurities from the outside can be suppressed while holding.

With the above structure, a semiconductor device including a transistor including an oxide semiconductor with high on-state current can be provided. Alternatively, a semiconductor device including a transistor including an oxide semiconductor with low off-state current can be provided. Alternatively, it is possible to provide a semiconductor device in which variation in electrical characteristics is suppressed, stable electrical characteristics are obtained, and reliability is improved.

<Transistor structure example 2>
A structural example of the transistor 510B is described with reference to FIGS. FIG. 13A is a top view of the transistor 510B. FIG. 13(B) is a cross-sectional view of the portion indicated by the dashed line L1-L2 in FIG. 13(A). FIG. 13(C) is a cross-sectional view of the portion indicated by the dashed-dotted line W1-W2 in FIG. 13(A). Note that in the top view of FIG. 13A, some elements are omitted for clarity.

Transistor 510B is a variation of transistor 510A. Therefore, in order to avoid repetition of description, differences from the transistor 510A are mainly described.

The transistor 510B has a region where the conductor 542 (the conductor 542a and the conductor 542b) overlaps with the oxide 530c, the insulator 550, and the conductor 560. FIG. With such a structure, a transistor with high on-state current can be provided. Further, a transistor with high controllability can be provided.

A conductor 560 functioning as a gate electrode has a conductor 560a and a conductor 560b over the conductor 560a. For the conductor 560a, a conductive material having a function of suppressing diffusion of impurities such as hydrogen atoms, hydrogen molecules, water molecules, and copper atoms is preferably used. Alternatively, it is preferable to use a conductive material that has a function of suppressing at least one diffusion of oxygen (eg, oxygen atoms, oxygen molecules, etc.).

Since the conductor 560a has a function of suppressing the diffusion of oxygen, the material selectivity of the conductor 560b can be improved. In other words, with the presence of the conductor 560a, oxidation of the conductor 560b is suppressed, and a decrease in conductivity can be prevented.

Further, an insulator 574 is preferably provided so as to cover the top surface and side surfaces of the conductor 560, the side surfaces of the insulator 550, and the side surfaces of the oxide 530c. Note that an insulating material having a function of suppressing diffusion of impurities such as water or hydrogen and oxygen is preferably used for the insulator 574 . For example, it is preferable to use aluminum oxide or hafnium oxide. In addition, metal oxides such as magnesium oxide, gallium oxide, germanium oxide, yttrium oxide, zirconium oxide, lanthanum oxide, neodymium oxide, or tantalum oxide, silicon nitride oxide, or silicon nitride can also be used.

By providing the insulator 574, oxidation of the conductor 560 can be suppressed. In addition, with the insulator 574, water and impurities such as hydrogen contained in the insulator 580 can be prevented from diffusing into the transistor 510B.

An insulator 576 (an insulator 576 a and an insulator 576 b ) having a barrier property may be placed between the conductor 546 and the insulator 580 . By providing the insulator 576, oxygen in the insulator 580 can be prevented from reacting with the conductor 546 and oxidation of the conductor 546 can be suppressed.

In addition, by providing the insulator 576 having a barrier property, the selection range of conductor materials used for plugs and wirings can be widened. For example, a semiconductor device with low power consumption can be provided by using a metal material having a property of absorbing oxygen and having high conductivity for the conductor 546 . Specifically, a material such as tungsten or aluminum that has low oxidation resistance but high conductivity can be used. Alternatively, for example, a conductor that can be easily formed into a film or processed can be used.

<Transistor structure example 3>
A structural example of the transistor 510C is described with reference to FIGS. FIG. 14A is a top view of the transistor 510C. FIG. 14(B) is a cross-sectional view of the portion indicated by the dashed line L1-L2 in FIG. 14(A). FIG. 14(C) is a cross-sectional view of the portion indicated by the one-dot chain line W1-W2 in FIG. 14(A). Note that in the top view of FIG. 14A, some elements are omitted for clarity.

Transistor 510C is a variation of transistor 510A. Therefore, in order to avoid repetition of description, differences from the transistor 510A are mainly described.

A transistor 510C illustrated in FIG. 14 has a conductor 547a between a conductor 542a and an oxide 530b, and a conductor 547b between a conductor 542b and an oxide 530b. Here, the conductor 542a (conductor 542b) has a region extending over the top surface of the conductor 547a (conductor 547b) and the side surface on the conductor 560 side and in contact with the top surface of the oxide 530b. Here, a conductor that can be used for the conductor 542 may be used as the conductor 547 . Furthermore, the film thickness of the conductor 547 is preferably at least thicker than that of the conductor 542 .

With the above structure, the transistor 510C illustrated in FIG. 14 can bring the conductor 542 closer to the conductor 560 than the transistor 510A. Alternatively, the conductor 560 can overlap the end of the conductor 542a and the end of the conductor 542b. Thereby, the substantial channel length of the transistor 510C can be shortened, and the on-current and frequency characteristics can be improved.

The conductor 547a (the conductor 547b) preferably overlaps with the conductor 542a (the conductor 542b). With such a structure, the conductor 547a (conductor 547b) functions as a stopper in etching for forming an opening for embedding the conductor 546a (conductor 546b), and overetching of the oxide 530b is prevented. can be prevented.

In addition, the transistor 510C illustrated in FIG. 14 may have a structure in which the insulator 545 is arranged over and in contact with the insulator 544 . The insulator 544 preferably functions as a barrier insulating film that prevents impurities such as water or hydrogen and excess oxygen from entering the transistor 510C from the insulator 580 side. As the insulator 545, the insulator that can be used for the insulator 544 can be used. Alternatively, the insulator 544 may be a nitride insulator such as aluminum nitride, aluminum titanium nitride, titanium nitride, silicon nitride, or silicon nitride oxide.

<Transistor structure example 4>
A structural example of the transistor 510D is described with reference to FIGS. FIG. 15A is a top view of the transistor 510D. FIG. 15(B) is a cross-sectional view of the portion indicated by the dashed line L1-L2 in FIG. 15(A). FIG. 15(C) is a cross-sectional view of the portion indicated by the dashed line W1-W2 in FIG. 15(A). Note that in the top view of FIG. 15A, some elements are omitted for clarity.

Transistor 510D is a variation of the above transistor. Therefore, in order to avoid repetition of description, mainly the points different from the above transistor will be described.

15A to 15C, an insulator 550 is provided over the oxide 530c and a metal oxide 552 is provided over the insulator 550. FIG. A conductor 560 is provided over the metal oxide 552 and an insulator 570 is provided over the conductor 560 . An insulator 571 is provided over the insulator 570 .

The metal oxide 552 preferably has a function of suppressing oxygen diffusion. By providing the metal oxide 552 that suppresses diffusion of oxygen between the insulator 550 and the conductor 560, diffusion of oxygen to the conductor 560 is suppressed. That is, reduction in the amount of oxygen supplied to the oxide 530 can be suppressed. In addition, oxidation of the conductor 560 by oxygen can be suppressed.

Note that the metal oxide 552 may function as part of the gate. For example, an oxide semiconductor that can be used as the oxide 530 can be used as the metal oxide 552 . In that case, by forming the conductor 560 by a sputtering method, the electrical resistance of the metal oxide 552 can be lowered to form a conductive layer. This can be called an OC (Oxide Conductor) electrode.

In some cases, the metal oxide 552 functions as part of the gate insulating film. Therefore, when silicon oxide, silicon oxynitride, or the like is used for the insulator 550, the metal oxide 552 is preferably a high-k material with a high dielectric constant. With the laminated structure, a laminated structure that is stable against heat and has a high relative dielectric constant can be obtained. Therefore, it is possible to reduce the gate potential applied during transistor operation while maintaining the physical film thickness. Also, the equivalent oxide thickness (EOT) of the insulating layer functioning as the gate insulating film can be reduced.

Although the metal oxide 552 is shown as a single layer in the transistor 510D, it may have a stacked structure of two or more layers. For example, a metal oxide functioning as part of the gate electrode and a metal oxide functioning as part of the gate insulating film may be stacked.

When the metal oxide 552 functions as a gate electrode, the on-state current of the transistor 510D can be improved without weakening the influence of the electric field from the conductor 560. FIG. Alternatively, in the case of functioning as a gate insulating film, the distance between the conductor 560 and the oxide 530 is maintained by the physical thicknesses of the insulator 550 and the metal oxide 552, thereby Leakage current with the oxide 530 can be suppressed. Therefore, by providing the stacked structure of the insulator 550 and the metal oxide 552, the physical distance between the conductor 560 and the oxide 530 and the electric field intensity applied from the conductor 560 to the oxide 530 can be reduced to It can be easily adjusted accordingly.

Specifically, the metal oxide 552 can be used as the metal oxide 552 by reducing the resistance of an oxide semiconductor that can be used for the oxide 530 . Alternatively, a metal oxide containing one or more selected from hafnium, aluminum, gallium, yttrium, zirconium, tungsten, titanium, tantalum, nickel, germanium, magnesium, or the like can be used.

In particular, it is preferable to use an insulating layer containing one or both oxides of aluminum and hafnium, such as aluminum oxide, hafnium oxide, or an oxide containing aluminum and hafnium (hafnium aluminate). In particular, hafnium aluminate has higher heat resistance than hafnium oxide film. Therefore, it is preferable because it is difficult to crystallize in the heat history in the subsequent steps. Note that the metal oxide 552 is not an essential component. It may be appropriately designed depending on the required transistor characteristics.

For the insulator 570, an insulating material having a function of suppressing permeation of impurities such as water or hydrogen and oxygen is preferably used. For example, it is preferable to use aluminum oxide or hafnium oxide. Accordingly, oxidation of the conductor 560 by oxygen from above the insulator 570 can be suppressed. In addition, impurities such as water or hydrogen from above the insulator 570 can be prevented from entering the oxide 530 through the conductor 560 and the insulator 550 .

Insulator 571 functions as a hard mask. By providing the insulator 571, when the conductor 560 is processed, the side surface of the conductor 560 is substantially vertical. Preferably, it can be 80 degrees or more and 95 degrees or less.

Note that the insulator 571 may also function as a barrier layer by using an insulating material which has a function of suppressing permeation of impurities such as water or hydrogen and oxygen. In that case, the insulator 570 may not be provided.

Using the insulator 571 as a hard mask, the insulator 570, the conductor 560, the metal oxide 552, the insulator 550, and part of the oxide 530c are selectively removed so that their sides are substantially flush. and a portion of the oxide 530b surface can be exposed.

Transistor 510D also has regions 531a and 531b on a portion of the exposed oxide 530b surface. One of region 531a or region 531b functions as a source region and the other functions as a drain region.

The regions 531a and 531b are formed by, for example, introducing an impurity element such as phosphorus or boron into the exposed surface of the oxide 530b using ion implantation, ion doping, plasma immersion ion implantation, plasma treatment, or the like. It can be realized by Note that in this embodiment and the like, the term “impurity element” refers to an element other than the main component element.

In addition, after exposing part of the surface of the oxide 530b, a metal film is formed and heat treatment is performed to diffuse an element contained in the metal film into the oxide 530b to form the regions 531a and 531b. You can also

A region of the oxide 530b into which the impurity element is introduced has a lower electrical resistivity. Therefore, the regions 531a and 531b are sometimes referred to as "impurity regions" or "low resistance regions".

By using the insulator 571 and/or the conductor 560 as a mask, the regions 531a and 531b can be formed in a self-aligned manner. Therefore, the region 531a and/or the region 531b does not overlap with the conductor 560, and parasitic capacitance can be reduced. Also, no offset region is formed between the channel forming region and the source/drain region (region 531a or region 531b). By forming the regions 531a and 531b in a self-aligned manner, it is possible to increase the ON current, reduce the threshold voltage, and improve the operating frequency.

Note that an offset region may be provided between the channel formation region and the source/drain region in order to further reduce the off current. The offset region is a region having a high electric resistivity, and is a region where the above-described impurity element is not introduced. The formation of the offset region can be achieved by introducing the impurity element described above after the insulator 575 is formed. In this case, the insulator 575 also functions as a mask like the insulator 571 and the like. Therefore, the impurity element is not introduced into the region of the oxide 530b overlapping with the insulator 575, and the electrical resistivity of the region can be kept high.

In addition, the transistor 510D has an insulator 575 on the sides of the insulator 570, the conductor 560, the metal oxide 552, the insulator 550, and the oxide 530c. The insulator 575 is preferably an insulator with a low dielectric constant. For example, silicon oxide, silicon oxynitride, silicon nitride oxide, silicon nitride, silicon oxide to which fluorine is added, silicon oxide to which carbon is added, silicon oxide to which carbon and nitrogen are added, silicon oxide having vacancies, resin, or the like. Preferably. In particular, it is preferable to use silicon oxide, silicon oxynitride, silicon nitride oxide, or silicon oxide having vacancies for the insulator 575 because an excess oxygen region can be easily formed in the insulator 575 in a later step. In addition, silicon oxide and silicon oxynitride are preferable because they are thermally stable. Further, the insulator 575 preferably has a function of diffusing oxygen.

In addition, the transistor 510D has an insulator 575 and an insulator 574 over the oxide 530 . The insulator 574 is preferably deposited using a sputtering method. By using a sputtering method, an insulator containing few impurities such as water or hydrogen can be formed. For example, aluminum oxide may be used as the insulator 574 .

Note that an oxide film formed by sputtering may extract hydrogen from a structure to be formed. Therefore, the insulator 574 absorbs hydrogen and water from the oxide 530 and the insulator 575, whereby the hydrogen concentrations in the oxide 530 and the insulator 575 can be reduced.

<Transistor structure example 5>
A structural example of the transistor 510E is described with reference to FIGS. FIG. 16A is a top view of the transistor 510E. FIG. 16(B) is a cross-sectional view of the portion indicated by the dashed line L1-L2 in FIG. 16(A). FIG. 16(C) is a cross-sectional view of the portion indicated by the dashed-dotted line W1-W2 in FIG. 16(A). Note that in the top view of FIG. 16A, some elements are omitted for clarity.

Transistor 510E is a variation of the above transistor. Therefore, in order to avoid repetition of description, differences from the above transistor will be mainly described.

In FIGS. 16A-16C, the conductor 542 is not provided, and a portion of the exposed oxide 530b surface has regions 531a and 531b. One of region 531a or region 531b functions as a source region and the other functions as a drain region. An insulator 573 is provided between the oxide 530 b and the insulator 574 .

Regions 531 (regions 531a and 531b) shown in FIG. 16 are regions in which the following element is added to the oxide 530b. Region 531 can be formed by using a dummy gate, for example.

Specifically, it is preferable to provide a dummy gate over the oxide 530b and use the dummy gate as a mask to add an element that reduces the resistance of the oxide 530b. That is, the element is added to a region where the oxide 530 does not overlap with the dummy gate, so that a region 531 is formed. Examples of the method for adding the element include an ion implantation method in which an ionized source gas is added after mass separation, an ion doping method in which an ionized source gas is added without mass separation, a plasma immersion ion implantation method, and the like. can be used.

As an element for reducing the resistance of the oxide 530, typically, boron or phosphorus can be mentioned. Alternatively, hydrogen, carbon, nitrogen, fluorine, sulfur, chlorine, titanium, rare gas, or the like may be used. Representative examples of noble gas elements include helium, neon, argon, krypton, and xenon. The concentration of the element may be measured using secondary ion mass spectrometry (SIMS) or the like.

Boron and phosphorus are particularly preferred because they allow the use of equipment in amorphous silicon or low temperature polysilicon production lines. Existing equipment can be diverted, and equipment investment can be suppressed.

Subsequently, an insulating film to be the insulator 573 and an insulating film to be the insulator 574 may be formed over the oxide 530b and the dummy gate. By stacking the insulating film to be the insulator 573 and the insulating film to be the insulator 574, a region where the region 531 overlaps with the oxide 530c and the insulator 550 can be provided.

Specifically, after an insulating film to be the insulator 580 is provided over the insulating film to be the insulator 574, the insulating film to be the insulator 580 is subjected to CMP (Chemical Mechanical Polishing) treatment, whereby the insulator 580 and the insulator 580 are separated. A part of the insulating film is removed to expose the dummy gate. Subsequently, when removing the dummy gate, part of the insulator 573 in contact with the dummy gate is preferably removed. Therefore, the insulator 574 and the insulator 573 are exposed on the side surfaces of the opening provided in the insulator 580, and part of the region 531 provided in the oxide 530b is exposed on the bottom surface of the opening. do. Next, after an oxide film to be the oxide 530c, an insulating film to be the insulator 550, and a conductive film to be the conductor 560 are sequentially formed in the opening, CMP treatment or the like is performed until the insulator 580 is exposed. By removing part of the oxide film to be the oxide 530c, the insulating film to be the insulator 550, and the conductive film to be the conductor 560, the transistor illustrated in FIG. 16 can be formed.

Note that the insulators 573 and 574 are not essential components. It may be appropriately designed depending on the required transistor characteristics.

An existing device can be used for the transistor shown in FIG. 16, and the cost can be reduced because the conductor 542 is not provided.

Note that this embodiment can be implemented in appropriate combination with any of the other embodiments described in this specification.

(Embodiment 3)
In this embodiment, a structure of a metal oxide that can be used for the OS transistor described in the above embodiment will be described.

<Structure of Metal Oxide>
In this specification and the like, it may be referred to as CAAC (c-axis aligned crystal) and CAC (cloud-aligned composite). Note that CAAC represents an example of a crystal structure, and CAC represents an example of a function or material configuration.

CAC-OS or CAC-metal oxide has a conductive function in a part of the material, an insulating function in a part of the material, and a semiconductor function in the whole material. Note that when CAC-OS or CAC-metal oxide is used for a channel formation region of a transistor, the function of conductivity is to flow electrons (or holes) that serve as carriers, and the function of insulation is to serve as carriers. It is a function that does not flow electrons. A switching function (on/off function) can be imparted to the CAC-OS or CAC-metal oxide by causing the conductive function and the insulating function to act complementarily. By separating each function in CAC-OS or CAC-metal oxide, both functions can be maximized.

Also, CAC-OS or CAC-metal oxide has a conductive region and an insulating region. The conductive regions have the above-described conductive function, and the insulating regions have the above-described insulating function. In some materials, the conductive region and the insulating region are separated at the nanoparticle level. Also, the conductive region and the insulating region may be unevenly distributed in the material. In addition, the conductive region may be observed to be connected like a cloud with its periphery blurred.

In CAC-OS or CAC-metal oxide, the conductive region and the insulating region are each dispersed in the material with a size of 0.5 nm or more and 10 nm or less, preferably 0.5 nm or more and 3 nm or less. There is

Also, CAC-OS or CAC-metal oxide is composed of components having different bandgaps. For example, CAC-OS or CAC-metal oxide is composed of a component having a wide gap resulting from an insulating region and a component having a narrow gap resulting from a conductive region. In the case of this configuration, when the carriers flow, the carriers mainly flow in the component having the narrow gap. In addition, the component having a narrow gap acts complementarily on the component having a wide gap, and carriers also flow into the component having a wide gap in conjunction with the component having a narrow gap. Therefore, when the above CAC-OS or CAC-metal oxide is used for a channel formation region of a transistor, high current drivability, that is, high on-current and high field-effect mobility can be obtained in the on-state of the transistor.

That is, CAC-OS or CAC-metal oxide can also be called a matrix composite or a metal matrix composite.

<Structure of Metal Oxide>
Oxide semiconductors are classified into single-crystal oxide semiconductors and non-single-crystal oxide semiconductors. Non-single-crystal oxide semiconductors include, for example, CAAC-OS (c-axis aligned crystalline oxide semiconductor), polycrystalline oxide semiconductors, nc-OS (nanocrystalline oxide semiconductors), pseudo-amorphous oxide semiconductors (a-like OS: amorphous-like oxide semiconductor), amorphous oxide semiconductor, and the like.

A thin film with high crystallinity is preferably used as an oxide semiconductor used for a semiconductor of a transistor. By using the thin film, the stability or reliability of the transistor can be improved. Examples of the thin film include a thin film of a single crystal oxide semiconductor and a thin film of a polycrystalline oxide semiconductor. However, in order to form a thin film of a single crystal oxide semiconductor or a thin film of a polycrystalline oxide semiconductor over a substrate, a high temperature or laser heating step is required. Therefore, the cost of the manufacturing process increases, and the throughput also decreases.

Non-Patent Document 2 and Non-Patent Document 3 report that an In--Ga--Zn oxide having a CAAC structure (referred to as CAAC-IGZO) was discovered in 2009. Here, it is reported that CAAC-IGZO has c-axis orientation, does not clearly identify grain boundaries, and can be formed on a substrate at low temperatures. Furthermore, it has been reported that transistors using CAAC-IGZO have excellent electrical characteristics and reliability.

In 2013, an In--Ga--Zn oxide having an nc structure (referred to as nc-IGZO) was discovered (see Non-Patent Document 4). Here, it is reported that nc-IGZO has periodicity in atomic arrangement in a minute region (for example, a region of 1 nm or more and 3 nm or less), and no regularity in crystal orientation is observed between different regions. there is

Non-Patent Document 5 and Non-Patent Document 6 show changes in the average crystal size due to electron beam irradiation of each of the CAAC-IGZO, nc-IGZO, and low-crystalline IGZO thin films. In thin films of IGZO with low crystallinity, crystalline IGZO of about 1 nm has been observed even before electron beam irradiation. Therefore, it is reported here that the presence of a completely amorphous structure could not be confirmed in IGZO. Furthermore, it has been shown that CAAC-IGZO thin films and nc-IGZO thin films have higher stability against electron beam irradiation than IGZO thin films with low crystallinity. Therefore, a thin film of CAAC-IGZO or a thin film of nc-IGZO is preferably used as a semiconductor of a transistor.

CAAC-OS has a c-axis orientation and a distorted crystal structure in which a plurality of nanocrystals are connected in the ab plane direction. The strain refers to a portion where the orientation of the lattice arrangement changes between a region with a uniform lattice arrangement and another region with a uniform lattice arrangement in a region where a plurality of nanocrystals are connected.

Although nanocrystals are basically hexagonal, they are not limited to regular hexagons and may have non-regular hexagons. Also, the distortion may have a lattice arrangement of pentagons, heptagons, and the like. In CAAC-OS, a clear crystal grain boundary (also referred to as a grain boundary) cannot be confirmed even in the vicinity of strain. That is, it can be seen that the distortion of the lattice arrangement suppresses the formation of grain boundaries. This is because the CAAC-OS can tolerate strain due to the fact that the arrangement of oxygen atoms is not dense in the ab plane direction and the bond distance between atoms changes due to the substitution of metal elements. It is considered to be for

CAAC-OS is a layered crystal in which a layer containing indium and oxygen (hereinafter referred to as an In layer) and a layer containing the element M, zinc, and oxygen (hereinafter referred to as a (M, Zn) layer) are stacked. It tends to have a structure (also called a layered structure). Note that indium and the element M can be substituted with each other, and when the element M in the (M, Zn) layer is substituted with indium, the layer can also be expressed as an (In, M, Zn) layer. In addition, when indium in the In layer is replaced with the element M, it can also be expressed as an (In, M) layer.

CAAC-OS is an oxide semiconductor with high crystallinity. On the other hand, since a clear grain boundary cannot be confirmed in CAAC-OS, it can be said that the decrease in electron mobility caused by the grain boundary is unlikely to occur. In addition, since the crystallinity of an oxide semiconductor may be deteriorated by contamination with impurities, generation of defects, or the like, a CAAC-OS can be said to be an oxide semiconductor with few impurities and defects (such as oxygen vacancies). Therefore, an oxide semiconductor including CAAC-OS has stable physical properties. Therefore, an oxide semiconductor including CAAC-OS is resistant to heat and has high reliability. CAAC-OS is also stable against high temperatures (so-called thermal budget) in the manufacturing process. Therefore, the use of CAAC-OS for the OS transistor makes it possible to expand the degree of freedom in the manufacturing process.

The nc-OS has periodic atomic arrangement in a minute region (eg, a region of 1 nm to 10 nm, particularly a region of 1 nm to 3 nm). Also, nc-OS shows no regularity in crystal orientation between different nanocrystals. Therefore, no orientation is observed in the entire film. Therefore, an nc-OS may be indistinguishable from an a-like OS or an amorphous oxide semiconductor depending on the analysis method.

An a-like OS is an oxide semiconductor having a structure between an nc-OS and an amorphous oxide semiconductor. An a-like OS has void or low density regions. That is, a-like OS has lower crystallinity than nc-OS and CAAC-OS.

Oxide semiconductors have various structures and each has different characteristics. An oxide semiconductor of one embodiment of the present invention may include two or more of an amorphous oxide semiconductor, a polycrystalline oxide semiconductor, an a-like OS, an nc-OS, and a CAAC-OS.

<Transistor including oxide semiconductor>
Next, the case where the above oxide semiconductor is used for a transistor is described.

Note that by using the above oxide semiconductor for a transistor, a transistor with high field-effect mobility can be realized. Further, a highly reliable transistor can be realized.

Further, a transistor including the above oxide semiconductor has an extremely small leakage current in a non-conducting state, specifically, an off current per 1 μm of channel width of the transistor is on the order of yA/μm (10 ⁻²⁴ A/μm). Non-Patent Document 7 shows that there is. For example, a low-power-consumption CPU and the like that utilize the characteristic of low leakage current of a transistor including an oxide semiconductor have been disclosed (see Non-Patent Document 8).

In addition, application of a transistor including an oxide semiconductor to a display device has been reported, which utilizes a characteristic of a transistor including a low leakage current (see Non-Patent Document 9). In a display device, displayed images are switched several tens of times per second. The number of image switching times per second is called a refresh rate. Also, the refresh rate is sometimes called a drive frequency. Such high-speed screen switching, which is difficult for the human eye to perceive, is considered to be the cause of eye fatigue. Therefore, it has been proposed to reduce the number of times the image is rewritten by lowering the refresh rate of the display device. In addition, power consumption of the display device can be reduced by driving with a reduced refresh rate. Such a driving method is called idling stop (IDS) driving.

An oxide semiconductor with low carrier density is preferably used for a transistor. In the case of lowering the carrier density of the oxide semiconductor film, the concentration of impurities in the oxide semiconductor film may be lowered to lower the defect level density. In this specification and the like, a low impurity concentration and a low defect level density are referred to as high-purity intrinsic or substantially high-purity intrinsic. For example, the oxide semiconductor has a carrier density of less than 8×10 ¹¹ /cm ³ , preferably less than 1×10 ¹¹ /cm ³ , more preferably less than 1×10 ¹⁰ /cm ³ , and a carrier density of 1×10 ⁻⁹ /cm 3 . cm ³ or more.

Further, since a highly purified intrinsic or substantially highly purified intrinsic oxide semiconductor film has a low defect level density, the trap level density may also be low.

In addition, the charge trapped in the trap level of the oxide semiconductor takes a long time to disappear and may behave like a fixed charge. Therefore, a transistor whose channel formation region is formed in an oxide semiconductor with a high trap level density might have unstable electrical characteristics.

Therefore, it is effective to reduce the impurity concentration in the oxide semiconductor in order to stabilize the electrical characteristics of the transistor. In order to reduce the impurity concentration in the oxide semiconductor, it is preferable to also reduce the impurity concentration in adjacent films. Impurities include hydrogen, nitrogen, alkali metals, alkaline earth metals, iron, nickel, silicon, and the like.

<Impurities>
Here, the influence of each impurity in the oxide semiconductor is described.

When an oxide semiconductor contains silicon or carbon which is one of Group 14 elements, a defect level is formed in the oxide semiconductor. Therefore, the concentration of silicon and carbon in the oxide semiconductor and the concentration of silicon and carbon in the vicinity of the interface with the oxide semiconductor (concentration obtained by secondary ion mass spectrometry (SIMS)) are 2. ×10 ¹⁸ atoms/cm ³ or less, preferably 2 × 10 ¹⁷ atoms/cm ³ or less.

Further, when an oxide semiconductor contains an alkali metal or an alkaline earth metal, a defect level may be formed to generate carriers. Therefore, a transistor using an oxide semiconductor containing an alkali metal or an alkaline earth metal is likely to have normally-on characteristics. Therefore, it is preferable to reduce the concentration of the alkali metal or alkaline earth metal in the oxide semiconductor. Specifically, the concentration of alkali metal or alkaline earth metal in the oxide semiconductor obtained by SIMS is set to 1×10 ¹⁸ atoms/cm ³ or less, preferably 2×10 ¹⁶ atoms/cm ³ or less.

In addition, when an oxide semiconductor contains nitrogen, electrons as carriers are generated, the carrier density increases, and the oxide semiconductor tends to be n-type. As a result, a transistor including an oxide semiconductor containing nitrogen as a semiconductor tends to have normally-on characteristics. Therefore, nitrogen content in the oxide semiconductor is preferably reduced as much as possible. For example, the nitrogen concentration in the oxide semiconductor is less than 5×10 ¹⁹ atoms/cm ³ , preferably 5×10 ¹⁸ atoms/cm 3 according to SIMS. atoms/cm ³ or less, more preferably 1×10 ¹⁸ atoms/cm ³ or less, and even more preferably 5×10 ¹⁷ atoms/cm ³ or less.

Further, hydrogen contained in the oxide semiconductor reacts with oxygen that bonds to a metal atom to form water, which may cause oxygen vacancies. When hydrogen enters the oxygen vacancies, electrons, which are carriers, may be generated. In addition, part of hydrogen may bond with oxygen that bonds with a metal atom to generate an electron, which is a carrier. Therefore, a transistor including an oxide semiconductor containing hydrogen is likely to have normally-on characteristics. Therefore, hydrogen in the oxide semiconductor is preferably reduced as much as possible. Specifically, in the oxide semiconductor, the hydrogen concentration obtained by SIMS is less than 1×10 ²⁰ atoms/cm ³ , preferably less than 1×10 ¹⁹ atoms/cm ³ , more preferably less than 5×10 ¹⁸ atoms/cm. Less than ³ , more preferably less than 1×10 ¹⁸ atoms/cm ³ .

By using an oxide semiconductor in which impurities are sufficiently reduced for a channel formation region of a transistor, stable electrical characteristics can be imparted.

The discovery of the CAAC structure and the nc structure has contributed to improvements in electrical characteristics and reliability of transistors using an oxide semiconductor having the CAAC structure or the nc structure, as well as cost reduction and throughput improvement in the manufacturing process. In addition, application research of the transistor to display devices and LSIs is underway, taking advantage of the characteristic of the transistor having a low leakage current.

Note that this embodiment can be implemented in appropriate combination with any of the other embodiments described in this specification.

(Embodiment 4)
In this embodiment, as an example of a semiconductor device, an electronic component, an electronic device including the electronic component, or the like will be described.

<Example of manufacturing method of electronic component>
FIG. 17A is a flow chart showing an example of a method for manufacturing an electronic component. An electronic component is also called a semiconductor package or an IC package. This electronic component has a plurality of standards and names depending on the direction of terminal extraction and the shape of the terminal. Therefore, in the present embodiment, an example thereof will be described.

A semiconductor device composed of transistors is completed by combining a plurality of detachable parts on a printed circuit board through an assembly process (post-process). The post-process can be completed through each process shown in FIG. Specifically, after the element substrate obtained in the preceding process is completed (step S31), the back surface of the substrate is ground (step S32). By thinning the substrate at this stage, warping of the substrate in the previous process is reduced, and miniaturization as a part is achieved.

A dicing process is performed in which the back surface of the substrate is ground and the substrate is separated into a plurality of chips. Then, a die bonding process is performed in which the separated chips are individually picked up, mounted on a lead frame, and bonded (step S33). For the bonding between the chip and the lead frame in this die bonding process, a suitable method such as resin bonding or tape bonding is selected according to the product. In addition, the die bonding process may be carried out by mounting on an interposer and bonding.

Next, wire bonding is performed to electrically connect the leads of the lead frame and the electrodes on the chip with thin metal wires (step S34). A silver wire or a gold wire can be used for the thin metal wire. Ball bonding or wedge bonding can be used for wire bonding.

The wire-bonded chip is subjected to a molding process in which it is sealed with epoxy resin or the like (step S35). By performing the molding process, the inside of the electronic component is filled with resin, which can reduce damage to the built-in circuits and wires due to mechanical external force, and also reduce deterioration of characteristics due to moisture and dust. can.

The leads of the lead frame are then plated. Then, the leads are cut and formed (step S36). This plating treatment prevents the leads from rusting, so that soldering can be performed more reliably when they are later mounted on a printed circuit board.

Next, printing processing (marking) is applied to the surface of the package (step S37). After the final inspection process (step S38), the electronic component is completed (step S39).

The electronic component described above can be configured to include the semiconductor device described in the above embodiments. Therefore, it is possible to realize an electronic component with reduced power consumption and miniaturization.

A schematic perspective view of the completed electronic component is shown in FIG. FIG. 17B shows a schematic perspective view of a QFP (Quad Flat Package) as an example of an electronic component. As shown in FIG. 17B, an electronic component 700 has leads 701 and a circuit portion 703 . The electronic component 700 is mounted on a printed circuit board 702, for example. A plurality of such electronic components 700 can be combined and electrically connected to each other on a printed circuit board 702 to be mounted inside an electronic device. The completed circuit board 704 is provided inside an electronic device or the like. For example, the electronic component 700 can be used as a random access memory that stores data, and a processing unit that performs various processes such as an MCU (microcontroller unit) or an RFID tag.

Therefore, the electronic component 700 can be used for digital signal processing, software defined radio, avionics (communication equipment, navigation systems, autopilots, flight management systems and other aviation electronic equipment), ASIC prototyping, medical image processing, voice recognition, It can be applied to electronic components (IC chips) of electronic devices in a wide range of fields such as cryptography, bioinformatics (biological information science), emulators of mechanical devices, and radio telescopes in radio astronomy. Examples of such electronic devices include display devices, personal computers (PCs), and image reproducing devices equipped with a recording medium (typically, a display capable of reproducing a recording medium such as a DVD (Digital Versatile Disc) and displaying the image. device) can be mentioned. In addition, electronic devices that can use the electronic component according to one embodiment of the present invention include mobile phones, game machines including portable types, portable data terminals, electronic book terminals, cameras (video cameras, digital still cameras, etc.), Wearable display device or terminal (head-mounted type, goggle type, eyeglass type, armband type, bracelet type, necklace type, etc.), navigation system, sound reproduction device (car audio, digital audio player, etc.), copier, facsimile, printer , printer complex machines, automatic teller machines (ATMs), vending machines, and the like. Specific examples of these electronic devices are shown in FIG.

<Electronic equipment>
FIGS. 18A to 18F show examples of battery-powered electronic devices having a display portion.

A portable game machine 900 illustrated in FIG. 18A includes a housing 901, a housing 902, a display portion 903, a display portion 904, a microphone 905, a speaker 906, operation keys 907, and the like. The display unit 903 is provided with a touch screen as an input device, and can be operated with a stylus 908 or the like.

An information terminal 910 illustrated in FIG. 18B includes a housing 911, a display portion 912, a microphone 917, a speaker portion 914, a camera 913, an external connection portion 916, an operation button 915, and the like. The display portion 912 includes a display panel and a touch screen using a flexible substrate. The information terminal 910 can be used as, for example, a smart phone, a mobile phone, a tablet information terminal, a tablet PC, an electronic book terminal, or the like.

A notebook PC 920 illustrated in FIG. 18C includes a housing 921, a display portion 922, a keyboard 923, a pointing device 924, and the like.

A video camera 940 illustrated in FIG. 18D includes a housing 941, a housing 942, a display portion 943, operation keys 944, a lens 945, a connection portion 946, and the like. An operation key 944 and a lens 945 are provided on a housing 941 , and a display section 943 is provided on a housing 942 . The housing 941 and the housing 942 are connected by a connecting portion 946 , and the angle between the housing 941 and the housing 942 can be changed by the connecting portion 946 . Depending on the angle of the housing 942 with respect to the housing 941, the orientation of the image displayed on the display portion 943 can be changed, and the display/non-display of the image can be switched.

FIG. 18E shows an example of a bangle-type information terminal. An information terminal 950 includes a housing 951, a display portion 952, and the like. The display portion 952 is supported by a housing 951 having a curved surface. Since the display panel using a flexible substrate is included in the display portion 952, the information terminal 950 that is flexible, lightweight, and easy to use can be provided.

FIG. 18F shows an example of a wristwatch-type information terminal. The information terminal 960 includes a housing 961, a display portion 962, a band 963, a buckle 964, operation buttons 965, an input/output terminal 966, and the like. Information terminal 960 is capable of running various applications such as mobile phone, e-mail, text viewing and writing, music playback, Internet communication, computer games, and the like.

The display surface of the display portion 962 is curved, and display can be performed along the curved display surface. The display portion 962 includes a touch sensor and can be operated by touching the screen with a finger, a stylus, or the like. For example, an application can be activated by touching an icon 967 displayed on the display portion 962 . The operation button 965 can have various functions such as time setting, power on/off operation, wireless communication on/off operation, manner mode execution/cancellation, and power saving mode execution/cancellation. . For example, the operating system installed in the information terminal 960 can set the functions of the operation buttons 965 .

Also, the information terminal 960 is capable of performing short-range wireless communication conforming to communication standards. For example, by intercommunicating with a headset capable of wireless communication, hands-free communication is also possible. In addition, the information terminal 960 has an input/output terminal 966 and can directly exchange data with another information terminal via a connector. Also, charging can be performed through the input/output terminal 966 . Note that the charging operation may be performed by wireless power supply without using the input/output terminal 966 .

FIG. 18G shows an electric refrigerator-freezer as an example of a home electric product. The electric freezer-refrigerator 970 has a housing 971, a refrigerator compartment door 972, a freezer compartment door 973, and the like.

FIG. 18(H) is an external view showing an example of the configuration of an automobile. An automobile 980 has a body 981, wheels 982, a dashboard 983, lights 984, and the like.

The electronic device described in this embodiment is mounted with an electronic component having the semiconductor device according to any of the above embodiments. Therefore, it is possible to provide an electronic device that consumes less power or can operate stably.

Note that this embodiment can be implemented in appropriate combination with any of the other embodiments described in this specification.

(Additional remarks regarding descriptions in this specification, etc.)
Description of the above embodiment and each configuration in the embodiment will be added below.

The structure described in each embodiment can be combined with any structure described in another embodiment as appropriate to be one embodiment of the present invention. Moreover, when a plurality of configuration examples are shown in one embodiment, the configuration examples can be combined as appropriate.

In addition, the content (may be part of the content) described in one embodiment may be another content (may be part of the content) described in the embodiment, and/or one or more The contents described in another embodiment (or part of the contents) can be applied, combined, or replaced.

In addition, the content described in the embodiment means the content described using various drawings or the content described using sentences described in the specification in each embodiment.

It should be noted that a drawing (may be a part) described in one embodiment refers to another part of the drawing, another drawing (may be a part) described in the embodiment, and/or one or more By combining the figures (or part of them) described in another embodiment, more figures can be configured.

Also, in this specification and the like, in block diagrams, constituent elements are classified by function and shown as blocks independent of each other. However, in an actual circuit or the like, it is difficult to separate the constituent elements by function, and there may be cases where one circuit is related to a plurality of functions or a single function is related to a plurality of circuits. As such, the blocks in the block diagrams are not limited to the elements described in the specification and may be interchanged as appropriate depending on the context.

In the drawings, sizes, layer thicknesses, and regions are shown as arbitrary sizes for convenience of explanation. Therefore, it is not necessarily limited to that scale. Note that the drawings are shown schematically for clarity, and are not limited to the shapes or values shown in the drawings. For example, variations in signal, voltage, or current due to noise, or variations in signal, voltage, or current due to timing shift can be included.

In this specification and the like, when describing the connection relationship of a transistor, one of a source and a drain is referred to as “one of the source or the drain” (or the first electrode or the first terminal). The other is described as "the other of source or drain" (or second electrode or second terminal). This is because the source and drain of a transistor change depending on the structure or operating conditions of the transistor. Note that the names of the source and the drain of a transistor can be appropriately changed to a source (drain) terminal, a source (drain) electrode, or the like, depending on the situation.

In addition, the terms “electrode” and “wiring” in this specification and the like do not functionally limit these constituent elements. For example, an "electrode" may be used as part of a "wiring" and vice versa. Furthermore, the terms "electrode" and "wiring" include the case where a plurality of "electrodes" and "wiring" are integrally formed.

In this specification and the like, voltage and potential can be interchanged as appropriate. A voltage is a potential difference from a reference potential. For example, if the reference potential is a ground voltage, the voltage can be translated into a potential. Ground potential does not necessarily mean 0V. Note that the potential is relative, and the potential applied to the wiring or the like may be changed depending on the reference potential.

Note that in this specification and the like, terms such as “film” and “layer” can be interchanged depending on the case or situation. For example, it may be possible to change the term "conductive layer" to the term "conductive film." Or, for example, it may be possible to change the term "insulating film" to the term "insulating layer".

In this specification and the like, a switch has a function of being in a conducting state (on state) or a non-conducting state (off state) and controlling whether or not current flows. Alternatively, a switch has a function of selecting and switching a path through which current flows.

In this specification and the like, the channel length refers to, for example, a region in which a semiconductor (or a portion of the semiconductor in which current flows when the transistor is on) overlaps with a gate in a top view of a transistor, or a channel is formed. The distance between the source and the drain in the area where the

In this specification and the like, the channel width refers to, for example, a region where a semiconductor (or a portion of the semiconductor where current flows when the transistor is on) overlaps with a gate electrode, or a region where a channel is formed. is the length of the part where the drain and the drain face each other.

In this specification and the like, "A and B are connected" includes not only direct connection between A and B, but also electrical connection. Here, "A and B are electrically connected" means that when there is an object having some kind of electrical action between A and B, an electric signal can be exchanged between A and B. What to say.

100 semiconductor device 101 Si transistor layer 102 OS transistor layer 103 power supply circuit 104 input circuit 111 arithmetic processing circuit 112 timer 113 switch 121 power management circuit 122 memory circuit 123 memory circuit 130 input circuit 130A input circuit 130B input circuit 140 AND gate circuit 141 programmable switch array 150 OR gate circuit 151 programmable switch array 300 transistor 311 substrate 313 semiconductor region 314a low resistance region 314b low resistance region 315 insulator 316 conductor 320 insulator 322 insulator 324 insulator 326 insulator 328 conductor 330 conductor 350 Insulator 352 Insulator 354 Insulator 356 Conductor 360 Insulator 362 Insulator 364 Insulator 366 Conductor 370 Insulator 372 Insulator 374 Insulator 376 Conductor 380 Insulator 382 Insulator 384 Insulator 386 Conductor 500 Transistor 510 insulator 510A transistor 510B transistor 510C transistor 510D transistor 510E transistor 511 insulator 512 insulator 514 insulator 516 insulator 518 conductor 520 insulator 521 insulator 522 insulator 524 insulator 530 oxide 530a oxide 530b oxide 530c oxide Object 531 Region 531a Region 531b Region 540a Conductor 540b Conductor 542 Conductor 542a Conductor 542b Conductor 543 Region 543a Region 543b Region 544 Insulator 545 Insulator 546 Conductor 546a Conductor 546b Conductor 547 Conductor 547a Conductor 547b Conductor 548 Conductor 550 Insulator 552 Metal oxide 560 Conductor 560a Conductor 560b Conductor 570 Insulator 571 Insulator 573 Insulator 574 Insulator 575 Insulator 576 Insulator 576a Insulator 576b Insulator 580 Insulator 581 Insulation Body 582 Insulator 584 Insulator 586 Insulator 600 Capacitor 610 Conductor 612 Conductor 620 Conductor 630 Insulator 650 Insulator 700 Electronic component 701 Lead 702 Printed board 703 Circuit part 704 Circuit board 900 Portable game machine 901 Housing 902 housing 903 display unit 904 display unit 905 microphone 906 speaker 907 operation key 908 style Glass 910 Information terminal 911 Housing 912 Display unit 913 Camera 914 Speaker unit 915 Button 916 External connection unit 917 Microphone 921 Housing 922 Display unit 923 Keyboard 924 Pointing device 940 Video camera 941 Housing 942 Housing 943 Display unit 944 Operation keys 945 Lens 946 Connection part 950 Information terminal 951 Housing 952 Display part 960 Information terminal 961 Housing 962 Display part 963 Band 964 Buckle 965 Operation button 966 Input/output terminal 967 Icon 970 Electric freezer-refrigerator 971 Housing 972 Refrigerating compartment door 973 Freezing compartment door 980 automobile 981 car body 982 wheel 983 dashboard 984 light

Claims (4)

a power circuit;
a power management circuit;
an arithmetic processing circuit;
a power switch;
The power supply circuit has a function of generating a power supply potential,
the power switch has a function of controlling supply and stop of the power supply potential to the arithmetic processing circuit;
The arithmetic processing circuit has a first circuit and a second circuit,
The first circuit has a function of holding data generated by the arithmetic processing circuit,
the second circuit has a function of saving and holding data held in the first circuit and a function of restoring the saved data to the first circuit;
the second circuit and the power management circuit each have a logic circuit composed of a transistor having a metal oxide in a channel formation region ;
The semiconductor device , wherein the second circuit and the power management circuit are arranged above the first circuit and the power switch . In claim 1,
A semiconductor device in which the power management circuit is a programmable logic array having an input circuit, an AND gate circuit, and an OR gate circuit. In claim 2,
Each of the AND gate circuit and the OR gate circuit includes a transistor having a metal oxide in a channel formation region, and the semiconductor device has a function of storing charge according to configuration data by turning off the transistor. The semiconductor device according to any one of claims 1 to 3 ,
An electronic device having at least one of a display device, a touch panel, a microphone, a speaker, operation keys, and a housing.

Images