JP7134911B2 - Solid-state image sensor and imaging system - Google Patents

Description

The present invention relates to a solid-state imaging device and an imaging system having a photoelectric conversion layer formed on a substrate.

2. Description of the Related Art In a solid-state imaging device, a configuration is known in which a photoelectric conversion layer includes a pixel including a light receiving portion formed on a substrate. Patent Document 1 describes that an organic photoelectric conversion layer is used as the photoelectric conversion layer. Patent Document 1 further describes providing a pair of phase difference detection pixels in order to realize pupil division phase difference detection. The phase difference detection pixel has a light shielding film for shielding part of incident light between the protective layer provided on the photoelectric conversion layer and the microlens.

JP 2014-67948 A

In the configuration described in Patent Document 1, since the light-shielding film is provided only in the phase difference detection pixels, each layer provided on the photoelectric conversion film, such as the color filter layer and the microlens, can be uniformly formed. become difficult. As a result, the thickness of the color filter layer and the shape of the microlens are different between the phase difference detection pixels and the imaging pixels, and thus the sensitivity of the pixels may differ from the desired characteristics.

An object of the present invention is to facilitate uniform formation of each layer provided on the photoelectric conversion section.

A solid-state imaging device, which is one aspect of the present invention for achieving the above objects, is a solid-state imaging device having a plurality of pixels arranged two-dimensionally, each of the plurality of pixels comprising: a pixel electrode; a photoelectric conversion section including a photoelectric conversion layer provided on the pixel electrode; and a counter electrode provided so as to sandwich the photoelectric conversion layer with the pixel electrode; a lens, wherein the plurality of pixels includes a first pixel and a plurality of second pixels, the plurality of second pixels having at least one of the pixel electrode and the counter electrode smaller than the first pixels; Further, the structure between the counter electrode and the microlens is the same between the first pixel and the plurality of second pixels.

According to the present invention, it becomes easy to uniformly form each layer provided on the photoelectric conversion section.

It is a block diagram for showing a configuration example of a solid-state imaging device. It is a figure for showing the plane structure example of a pixel array. It is a figure for showing the cross-sectional structure example of a pixel array. 3 is an equivalent circuit diagram for showing a configuration example of a pixel; FIG. FIG. 4 is a potential diagram of a photoelectric conversion unit for explaining a signal readout operation; It is a figure for showing the cross-sectional structure example of a pixel array. It is a figure for showing the cross-sectional structure example of a pixel array. It is a figure for showing the cross-sectional structure example of a pixel array. It is a figure for showing the cross-sectional structure example of a pixel array. 1 is a block diagram for showing a configuration example of an imaging system; FIG.

(First embodiment)
FIG. 1 is a block diagram showing a configuration example of a solid-state imaging device 1000. As shown in FIG. The solid-state imaging device 1000 includes a pixel array 110 in which a plurality of pixels 100 are arranged two-dimensionally, a row driving circuit 120, a vertical signal line 130, a signal processing section 140, a column selection circuit 150, an output amplifier 170 and a constant current source 180. including.

FIG. 1 shows a case of having pixels 100 of 4 rows×4 columns, but the number of pixels 100 included in the pixel array 110 is not limited to this.

The row driving circuit 120 is a circuit that controls the plurality of pixels 100 on a row-by-row basis, and includes, for example, a shift register and an address decoder. In this embodiment, row driver circuit 120 outputs signals pRes(M), PADD(M), Va(M), Vb(M) and pSEL(M). M is a number representing a row.

A plurality of pixels 100 belonging to the same column are connected to a common vertical signal line 130 . A signal output from the pixel 100 is transmitted to the signal processing section 140 via the vertical signal line 130 .

Signal processing section 140 includes a plurality of column signal processing sections each provided for each column of pixel array 110 . Each column signal processing unit may include a CDS circuit for reducing noise, an amplifier for amplifying signals, a sample hold circuit for holding signals, and the like. The column signal processing section outputs a signal when selected by a signal CSEL(N) supplied from the column selection circuit 150 , and the output signal is transmitted to the output amplifier 170 . N is a number representing a column.

In the present embodiment, the plurality of pixels 100 includes imaging pixels IP, which are first pixels, and phase difference detection pixels AP, which are second pixels. FIG. 2 is a diagram for showing an example of the planar structure of the pixel array 110 according to this embodiment. Here, a case is shown in which imaging pixels IP are formed except for the two phase difference detection pixels AP. Each pixel includes a pixel electrode which will be described later, and the phase difference detection pixel AP includes a pixel electrode smaller than the pixel electrode of the imaging pixel IP.

FIG. 3 shows a structural example in the A-A' cross section shown in FIG. The pixel array 110 includes a silicon substrate (Si substrate) 300 , a lower insulating layer 301 provided on the Si substrate 300 and a wiring layer 302 arranged in the lower insulating layer 301 . MOS transistors are formed on Si substrate 300, and interconnection layer 302 includes interconnections for supplying power to the MOS transistors and interconnections for transmitting signals for controlling the MOS transistors. A part of the wiring included in the wiring layer 302 connects a signal readout circuit (not shown) formed on the Si substrate 300 and the pixel electrode 303 . As also shown in FIG. 2, the pixel electrode 303 of the phase difference detection pixel AP is smaller than the pixel electrode 303 of the imaging pixel IP. An interlayer insulating layer 304 , a photoelectric conversion layer 305 , a blocking layer 306 , a counter electrode 307 , a color filter layer 308 and a microlens layer 309 having a plurality of microlenses are provided on the pixel electrode 303 . In this embodiment, the common electrode 307 is provided for a plurality of pixels. A Bayer array can be used for the array of color filters in the color filter layer 308 . Since the phase difference detection pixel AP obtains luminance information, it is preferable to use a G (green) filter rather than an R (red) or B (blue) filter. Therefore, a pixel provided with a G filter in the Bayer array may be used as the phase difference detection pixel AP. Also, for some pixels at positions where R and B filters are provided in the Bayer array, the R and B filters may be replaced with G filters, and the pixels may be used as the phase difference detection pixels AP. Alternatively, the imaging pixels IP may be provided with R (red), G, or B (blue) color filters, and only the phase difference detection pixels AP may be provided with transparent filters.

An interlayer insulating layer 304 provided on the pixel electrode 303 is a layer for preventing passage of electrons and holes between the pixel electrode 303 and the photoelectric conversion layer 305. For example, hydrogenated amorphous silicon nitride is used. (a-SiN:H). The thickness of the interlayer insulating layer 304 is set to a thickness that does not generate electrons and holes due to the tunnel effect. Specifically, the thickness is preferably 50 nm or more.

A photoelectric conversion layer 305 provided on the pixel electrode 303 with an interlayer insulating layer 304 interposed therebetween is a layer having a photoelectric conversion capability of generating electron-hole pairs upon receiving incident light. As a material forming the photoelectric conversion layer 305, intrinsic hydrogenated amorphous silicon (a-Si:H), a compound semiconductor, or an organic semiconductor can be used. Examples of compound semiconductors include III-VI compound semiconductors such as BN, GaAs, GaP, AlSb and GaAlAsP and II-IV compound semiconductors such as CdSe, ZnS and HdTe. Examples of organic semiconductors include phthalocyanine-based materials such as fullerene, coumarin 6 (C6), rhodamine 6G (R6G), quinacridone, zinc phthalocyanine (ZnPc), and naphthalocyanine-based materials.

Furthermore, for the photoelectric conversion layer 305, a quantum dot film using the above compound semiconductor as a raw material can be used. Amorphous silicon films, organic semiconductor films, and quantum dot films are preferable because thin films can be easily formed.

Intrinsic semiconductors have a low carrier density and are therefore excellent in that a wide depletion layer width can be realized by using them for the photoelectric conversion layer 305. Also good.

A blocking layer 306 is provided on the photoelectric conversion layer 305 . The blocking layer 306 of this embodiment is a layer that has a function of blocking holes from being injected from the counter electrode 307 into the photoelectric conversion layer 305, and is made of, for example, N+ type hydrogenated amorphous silicon. In this example, N + -type a-SiH is used to prevent injection of holes, but P + -type a-SiH may be used to prevent injection of electrons. The blocking layer 306 is required to prevent either one of electrons and holes of conductivity type carriers from being injected from the counter electrode 307 into the photoelectric conversion layer 305 . For the blocking layer 306, a P-type or N-type semiconductor of the semiconductor material used for the photoelectric conversion layer 305 can be used. In this case, the impurity concentration in the semiconductor used for the blocking layer 306 is made higher than the impurity concentration in the semiconductor used for the photoelectric conversion layer 305 .

A counter electrode 307 provided on the photoelectric conversion layer 305 with a blocking layer 306 interposed therebetween is formed of a material that transmits light incident through the microlens layer 309 and the color filter layer 308 to the photoelectric conversion layer 305 . be. Specifically, compounds containing indium and tin such as ITO, oxides, and the like are used.

A light transmissive layer may be further provided between the counter electrode 307 and the microlens layer 309 . The microlens layer 309 , the color filter layer 308 and the light-transmissive layer are preferably designed such that the focal point of the microlens layer 309 is on the photoelectric conversion layer 305 . The light transmissive layer may be made of an inorganic material such as Si or silicon nitride, or may be made of an organic material.

FIG. 4 is an equivalent circuit diagram of the pixel 100 according to this embodiment. The imaging pixels IP and the phase difference detection pixels AP have the same configuration as equivalent circuit diagrams. The pixel 100 includes a photoelectric conversion portion including a blocking layer 306 , a photoelectric conversion layer 305 and an interlayer insulating layer 304 and a signal readout circuit 400 .

A signal readout circuit 400 includes a reset transistor 401 , a drive capacitor 402 , an amplification transistor 403 and a selection transistor 404 . A reset voltage is supplied to one main node of the reset transistor 401 , and the other main node is connected to the control node of the amplification transistor 403 . Let this node be a node N1. A control node of the reset transistor 401 is supplied with a reset signal pRES. A bias voltage Vb is applied to one node of drive capacitor 402, and the other node is connected to node N1. The photoelectric conversion unit is connected to the node N1 through the pixel electrode 303. FIG. A fixed voltage is applied to one main node of the amplification transistor 403 , and the other main node is connected to the vertical signal line 130 via the selection transistor 404 . A pixel selection signal pSEL is supplied to the control node of the selection transistor 404 . The amplifying transistor 403 as an in-pixel amplifier operates as a source follower circuit together with the constant current source 180 when the selection transistor 404 is turned on, and a voltage output corresponding to the potential of the node N1 is output as a pixel signal from the pixel 100 to the signal processing section. is entered in The node N1 is the input part of the intra-pixel amplifier. The intra-pixel amplifier is not limited to a source follower circuit, but may be a source-grounded amplifier circuit, an inverter composed of a plurality of transistors, a differential amplifier, or the like.

Next, an operation of reading a signal from the pixel 100 according to this embodiment will be described. FIG. 5 is a potential diagram of the photoelectric conversion unit for explaining the signal readout operation. In the figure, the potential for electrons decreases as it goes down. In the drawing, the state of the potential of each region is drawn in order from the left to the counter electrode 307 (corresponding to the node N1), the photoelectric conversion layer 305, the interlayer insulating layer 304, and the pixel electrode 303. FIG. The blocking layer 306 has been omitted here for simplicity of explanation. In the figure, black circles represent electrons and white circles represent holes.

In this embodiment, the reset voltage is 1 [V], and the photoelectric conversion unit drive bias voltage Vs applied to the upper electrode is 3 [V]. Further, it is assumed that the bias voltage Vb can be switched between 5 [V] and 0 [V] by a control circuit (not shown).

The readout operation of the pixel 100 is realized by performing the following operations a) to f).
a) Pre-accumulation reset b) Photocharge accumulation c) Post-accumulation reset d) N signal read e) Charge transfer f) S signal read

Each of the above steps will be described in detail below.

a) Pre-accumulation reset With the bias voltage Vb set to 0 [V], the node N1 is reset to 1 [V] by turning on the reset transistor 401 . After that, when the reset transistor 401 is turned off, kTC noise (kTC1) is generated due to the operation of the reset transistor. As a result, the potential of the node N1, that is, the pixel electrode 303 becomes 1 [V]+kTC1 (FIG. 5(a)).

b) Photocharge Accumulation When the pre-accumulation reset is completed with light incident on the photoelectric conversion layer 305, the photocharge accumulation operation starts. The bias voltage Vb is maintained at 0 [V] during the period in which photocharge accumulation is being performed. Therefore, the potential of the pixel electrode 303 becomes a negative potential with respect to the counter electrode 307 to which the voltage of 3 [V] is applied. Therefore, electrons in the photoelectric conversion layer 305 are guided toward the counter electrode 307 and discharged from the counter electrode 307 via the blocking layer 306 . On the other hand, holes are guided toward the pixel electrode 303 . Since there is the blocking layer 306, injection from the counter electrode 307 to the photoelectric conversion layer 305 is not performed (FIG. 5(b-1)).

When the photoelectric conversion layer 305 absorbs incident light, electron-hole pairs are generated according to the amount of incident light. The generated electrons are discharged from the counter electrode 307 , while the generated holes move in the photoelectric conversion layer 305 and reach the interface with the interlayer insulating layer 304 . However, since the holes cannot move into the interlayer insulating layer 304, they are accumulated in the photoelectric conversion layer 305 (FIG. 5(b-2)). The holes thus accumulated are used as signal charges based on incident light. The holes accumulated in the photoelectric conversion layer 305 increase the potential of the node N1 by Vp, and the potential of the node N1 becomes 1 [V]+kTC1+Vp1.

c) Reset after accumulation The reset transistor 401 is temporarily turned on to reset the node N1 to 1 [V]. Since noise (kTC2) is generated with the operation of the reset transistor 401, the potential of the node N1 becomes 1 [V]+kTC2. The noise kTC1 generated in the pre-accumulation reset and the noise kTC2 generated in the post-accumulation reset are so-called random noise components that are not correlated with each other.

Even if the reset transistor 401 resets the node N1, the holes accumulated in the photoelectric conversion layer 305 remain in the photoelectric conversion layer 305 (FIG. 5C).

d) N signal readout The selection transistor 404 is turned on, and a signal corresponding to the potential of the node N1 at this time is output to the vertical signal line 130 . The output signal is held by, for example, a column signal processing section.

e) Charge transfer The bias voltage Vb is changed from 0 [V] to 5 [V]. This causes the potential of the node N1 to fluctuate. The amount of change in this potential is determined by the ratio of the capacitance of the photoelectric conversion unit to the capacitance of the drive capacitor 402 . If C1 is the capacitance value of the photoelectric conversion unit, C2 is the capacitance value of the drive capacitor 402, and ΔVb is the amount of positive change in the bias voltage Vb, the amount of change ΔVN1 in the potential of the node N1 is expressed by the following equation. .
ΔVN1=ΔVb×C1/(C1+C2) (1)

In this embodiment, if the capacitance value C1 of the driving capacitor 402 is four times the capacitance value C2 of the photoelectric conversion unit, the amount of change in the potential of the node N1 when the bias voltage Vb is changed by 5 [V] is 4. becomes [V].

When the potential of the node N1 increases by 4 [V] and reaches 5 [V]+kTC2, the potential of the node N1 and the potential of the counter electrode 307 are reversed. As a result, the slope of the potential in the photoelectric conversion layer 305 is reversed. (FIG. 5(e-1)). Thereby, electrons are injected into the photoelectric conversion layer 305 from the counter electrode 307 through the blocking layer 306 . Also, the holes accumulated in the photoelectric conversion layer 305 are guided toward the counter electrode 307, recombine with electrons in the blocking layer 306, and disappear. As a result, all holes accumulated in the photoelectric conversion layer 305 are discharged from the photoelectric conversion layer 305 . That is, complete transfer is performed by completely depleting the photoelectric conversion layer 305 (FIG. 5(e-2)).

Next, when the bias voltage Vb is set to 0 [V] again, the potential of the node N1 becomes negative with respect to the potential of the counter electrode 307. Therefore, when the bias voltage Vb was 5 [V], the photoelectric conversion layer 305 The electrons injected into are discharged from the photoelectric conversion layer 305 through the blocking layer 306 . Since the amount of electrons discharged in this manner and the amount of electrons injected into the photoelectric conversion layer 305 are ideally equal, there is no effect on signal readout. By setting the bias voltage Vb to 0 [V], the potential of the node N1 tries to return to 1 [V]+kTC2, but since the blocking layer 306 is provided between the counter electrode 307 and the photoelectric conversion layer 305, At this time, holes are not injected into the photoelectric conversion layer 305 . Therefore, the signal due to the holes accumulated in the photoelectric conversion layer 305 by the photoelectric charge accumulation operation remains as the optical signal component Vp, so the potential of the node N1 becomes 1 [V]+kTC2+Vp.

f) S signal reading The selection transistor 404 is turned on, and a signal corresponding to the potential of the node N1 at this time is output to the vertical signal line 130 . The output signal is held by, for example, a column signal processing section. When the signal obtained in this step and the signal obtained by reading the N signals in d) are subjected to differential processing, the noise component kTC2 is canceled, resulting in a signal corresponding to the optical signal component Vp.

The select transistor 404 may remain on after reading the N signal.

Through the above operation, the pixel signal can be read.

As can be understood from the above description, holes generated in the region sandwiched between the pixel electrode 303 and the counter electrode 307 in the photoelectric conversion layer 305 are used as signal charges. Therefore, in the phase difference detection pixel AP having the pixel electrode 303 smaller than the pixel electrode 303 of the imaging pixel IP, only a signal corresponding to light incident on a region narrower than the imaging pixel IP can be obtained. As shown in FIG. 2, the two phase difference detection pixels AP are configured such that one has the pixel electrode 303 only on the left side of the pixel and the other has the pixel electrode 303 only on the right side of the pixel. ing. Accordingly, phase difference detection can be realized using the signals obtained from these two phase difference detection pixels AP. In addition to the configuration shown in FIG. 2, the pixel electrode 303 may be provided only in the upper part of the pixel in one of the phase difference detection pixels AP and only in the lower part of the pixel in the other phase difference detection pixel AP. good. In other words, the pixel electrodes 303 may be arranged symmetrically with respect to two phase difference detection pixels.

Furthermore, in this embodiment, the structure between the counter electrode 307 and the microlens is the same between the imaging pixels IP and the phase difference detection pixels AP. Here, two pixels having the same structure means that the two pixels have the same layer structure. For example, if one pixel has layers that the other pixel does not have, the structure is said to be different. Taking the configuration shown in FIG. 2 of Patent Document 1 as an example, a pixel for phase difference detection in which a light shielding film 19 is provided on the counter electrode layer 16 and a light shielding film 19 on the counter electrode layer 16 are provided. The structure is different because there are no pixels.

According to this embodiment, the structure between the counter electrode 307 and the microlens is the same between the imaging pixels IP and the phase difference detection pixels AP. As a result, since the color filter layer 308 and the microlens layer 309 can be easily and uniformly formed, it is possible to prevent the sensitivity of the imaging pixels IP from deviating from desired characteristics.

(Second embodiment)
Another configuration example of the pixel array 110 will be described. FIG. 6 is a cross-sectional view showing the structure of a pixel taken along line AA' in FIG.

The difference from the structure shown in FIG. 3 is that a light shielding film 601 and a protective layer 602 are provided between the counter electrode 307 and the color filter layer 308 .

A light shielding film is provided between adjacent pixels. By providing the light shielding film 601 so as to straddle the boundary between two adjacent pixels, it is possible to reduce the incidence of light on the adjacent pixels. As a result, color mixture is reduced in the imaging pixels IP, and phase difference detection performance is improved in the phase difference detection pixels AP.

The light shielding film 601 may be a single-layer metal film, or may be a multi-layered metal film. Some specific examples include a W single layer, a WSi single layer, an AlCu single layer, a W/TiN stack, an AlCu/TiN stack, and an AlCu/TiN/Ti stack. A film made of the same material as the protective layer 602 may be provided between the light shielding films 601, or a film made of a material different from that of the protective layer 602 may be provided.

The light shielding film 601 may be in contact with the counter electrode, or may be separated by an insulating member. What is important is that the structure of the light shielding film 601 is the same between the phase difference detection pixel AP and the imaging pixel IP. That is, the film thickness of the light shielding film 601 is the same between the phase difference detection pixel AP and the imaging pixel IP.

The protective layer 602 is a layer made of an insulating film such as a SiO film or a SiN film, and is provided so as to cover the light shielding film 601 . By providing the protective layer 602, unevenness caused by providing the light shielding film 601 can be alleviated, which is effective in improving optical characteristics. It is more preferable to planarize the protective layer 602 before forming a color filter over the protective layer 602 .

Even when the protective layer 602 is provided, the structure of the protective layer 602 is the same between the phase difference detection pixel AP and the imaging pixel IP. That is, the film thickness of the protective layer 602 is the same between the phase difference detection pixel AP and the imaging pixel IP.

Although FIG. 6 illustrates the case where the protective layer 602 is provided, the protective layer 602 may be omitted.

According to this embodiment, effects similar to those of the first embodiment can be obtained, and by providing the light shielding film 601 between adjacent pixels, it is possible to reduce color mixture and improve the phase difference detection performance. Furthermore, by providing the protective layer 602, the optical characteristics can be improved.

(Third Embodiment)
Another configuration example of the pixel array 110 will be described. FIG. 7 is a cross-sectional view showing the structure of a pixel taken along line AA' in FIG.

While the photoelectric conversion layer 305 is formed as a continuous layer for a plurality of pixels in FIG. 3, the structure in FIG. It differs in that it has a photoelectric conversion layer separating portion 701 .

By forming the photoelectric conversion layer separation portion 701 so as to straddle the boundary between two adjacent pixels, photoelectric conversion is not performed near the boundary between pixels, so that color mixture is reduced and phase difference detection performance is improved. I can plan.

The photoelectric conversion layer separating portion 701 may be an insulating member made of a SiO film, a SiN film, or the like, or may be a W single layer, a WSi single layer, an AlCu single layer, a W/TiN layer, an AlCu/TiN layer, or an AlCu/TiN/Ti layer. or the like. When a light shielding member is used, it may be in contact with either the pixel electrode 303 or the counter electrode 307, but it should not be in contact with both. By using the photoelectric conversion layer separating portion 701 as a light shielding member, it is possible to further reduce color mixture and further improve the phase difference detection performance.

According to the present embodiment, effects similar to those of the first embodiment can be obtained, and by providing the photoelectric conversion layer separating portion 701, it is possible to reduce color mixture and improve the phase difference detection performance. Furthermore, by using the photoelectric conversion layer separating portion 701 as a light shielding member, it is possible to further reduce color mixture and further improve the phase difference detection performance.

(Fourth embodiment)
Another configuration example of the pixel array 110 will be described. FIG. 8 is a cross-sectional view showing the structure of a pixel taken along line AA' of FIG.

While the photoelectric conversion layer 305 is formed as a continuous layer for a plurality of pixels in FIG. 3, the structure in FIG. is smaller in the photoelectric conversion layer 305A.

As described above, in the photoelectric conversion portion, charges generated in the region of the photoelectric conversion layer 305 sandwiched between the pixel electrode 303 and the counter electrode 307 are used as signal charges. However, in the photoelectric conversion layer 305, photoelectric conversion is also performed in a region not sandwiched between the pixel electrode 303 and the counter electrode 307. Therefore, the charge generated here is sandwiched between the pixel electrode 303 and the counter electrode 307. area may move. As a result, pixel signals read from the phase difference detection pixels AP may contain unnecessary signal components. Therefore, in the present embodiment, in the phase difference detection pixel AP, the photoelectric conversion layer is removed except for the pixel electrode 303 and the vicinity thereof, and the photoelectric conversion layer separating portion 801 is provided. As a result, photoelectric conversion is not performed in a region not sandwiched between the pixel electrode 303 and the counter electrode 307, thereby reducing color mixture and improving phase difference detection performance.

The photoelectric conversion layer separating portion 801 may be an insulating member made of a SiO film, a SiN film, or the like, or may be a W single layer, a WSi single layer, an AlCu single layer, a W/TiN layer, an AlCu/TiN layer, or an AlCu/TiN/Ti layer. or the like. When a light shielding member is used, it may be in contact with either the pixel electrode 303 or the counter electrode 307, but it should not be in contact with both. By using the photoelectric conversion layer separating portion 801 as a light shielding member, it is possible to further reduce color mixture and further improve the phase difference detection performance.

According to the present embodiment, effects similar to those of the first embodiment can be obtained, and by providing the photoelectric conversion layer separating portion 801, it is possible to reduce color mixture and improve the phase difference detection performance. Furthermore, by using the photoelectric conversion layer separating portion 801 as a light shielding member, it is possible to further reduce color mixture and further improve the phase difference detection performance.

Further, in the present embodiment, the photoelectric conversion layer 305I of the imaging pixel IP and the photoelectric conversion layer 305A of the phase difference detection pixel AP are integrated. and the phase difference detection pixel AP. This makes it possible to further reduce color mixture and further improve the phase difference detection performance.

(Fifth embodiment)
Another configuration example of the pixel array 110 will be described. FIG. 9 is a cross-sectional view showing the structure of a pixel taken along line AA' in FIG.

The pixel electrodes 303 have the same size as the phase difference detection pixels AP in that the phase difference detection pixels AP have counter electrodes 307 that are smaller than the imaging pixels IP and that the imaging pixels IP and the phase difference detection pixels AP have the same size. , differs from the structure shown in FIG.

In this embodiment, the counter electrode 307A of the phase difference detection pixel AP is smaller than the counter electrode 307I of the imaging pixel IP. Accordingly, in the phase difference detection pixel AP, the portion sandwiched between the pixel electrode 303 and the counter electrode 307 of the photoelectric conversion layer 305 is smaller than the imaging pixel IP. As with the pixel electrode 303 shown in FIG. 2, one of the two phase difference detection pixels AP has the counter electrode 307 only on the left side of the pixel, and the other has the counter electrode 307 only on the right side of the pixel. With such a configuration, phase difference detection can be realized using the signals obtained from these phase difference detection pixels AP.

Also in this embodiment, the signal can be read by the same operation as in the first embodiment.

FIG. 9 shows a case where the pixel electrodes 303 of the imaging pixels IP and the phase difference detection pixels AP have the same size. It may be smaller than the pixel electrode 303 of the corresponding pixel IP. At least one of the pixel electrode 303 and the counter electrode 307 should be smaller in the phase difference detection pixel AP than in the imaging pixel IP.

Also in this embodiment, the structure between the counter electrode 307 and the microlens is the same between the imaging pixels IP and the phase difference detection pixels AP. As a result, since the color filter layer 308 and the microlens layer 309 can be easily and uniformly formed, it is possible to prevent the sensitivity of the imaging pixels IP from deviating from desired characteristics.

(Sixth embodiment)
FIG. 10 is a diagram illustrating a configuration example of an imaging system. The imaging system 800 includes, for example, an optical section 810, a solid-state imaging device 1000, a video signal processing section 830, a recording/communication section 840, a timing control section 850, a system control section 860, and a reproduction/display section 870. The imaging device 820 has a solid-state imaging device 1000 and a video signal processing section 830 . As the solid-state imaging device 1000, the solid-state imaging device described in each of the previous embodiments is used.

An optical unit 810, which is an optical system such as a lens, forms an image of the object by causing the light from the object to form an image on the pixel unit 10 of the solid-state imaging device 1000, in which a plurality of pixels are arranged two-dimensionally. The solid-state imaging device 1000 outputs a signal according to the light imaged on the pixel section 10 at timing based on the signal from the timing control section 850 . A signal output from the solid-state imaging device 1000 is input to a video signal processing section 830, which is a video signal processing section, and the video signal processing section 830 performs signal processing according to a method determined by a program or the like. A signal obtained by processing in the video signal processing unit 830 is sent to the recording/communication unit 840 as image data. The recording/communication unit 840 sends a signal for forming an image to the reproduction/display unit 870, and causes the reproduction/display unit 870 to reproduce/display moving images and still images. The recording/communication unit 840 also receives a signal from the video signal processing unit 830, communicates with the system control unit 860, and also records a signal for forming an image on a recording medium (not shown). conduct.

The system control section 860 comprehensively controls the operation of the imaging system, and controls driving of the optical section 810 , the timing control section 850 , the recording/communication section 840 , and the reproduction/display section 870 . The system control unit 860 also includes a storage device (not shown) that is, for example, a recording medium, in which programs and the like necessary for controlling the operation of the imaging system are recorded. Also, the system control unit 860 supplies a signal for switching the drive mode and sensitivity according to the user's operation to the imaging system, for example. Specific examples include changing the row to be read out and the row to be reset, changing the angle of view due to electronic zoom, and shifting the angle of view due to electronic image stabilization. When the sensitivity of the imaging system is switched according to the user's input, the sensitivity of the solid-state imaging device 1000 is also switched accordingly. That is, the system control section 860 has a function as a sensitivity selection section for selecting the sensitivity of the imaging system 800, and the sensitivity of the solid-state imaging device 1000 is switched according to the selected sensitivity.

The timing control section 850 controls driving timings of the solid-state imaging device 1000 and the video signal processing section 830 based on control by the system control section 860 . The timing control section 850 can also function as a sensitivity setting section that sets the imaging sensitivity of the solid-state imaging device 1000 .

Each embodiment described above is merely an example, and modifications can be made without departing from the spirit of the present invention.

REFERENCE SIGNS LIST 1000 solid-state imaging device 100 pixel 303 pixel electrode 305 photoelectric conversion layer 307 counter electrode 309 microlens layer

Claims (15)

A photoelectric conversion element having a plurality of pixels arranged two-dimensionally,
each of the plurality of pixels,
A photoelectric conversion part including a first electrode, a photoelectric conversion layer provided on the first electrode, and a second electrode provided so as to sandwich the photoelectric conversion layer with the first electrode. , a microlens arranged on the photoelectric conversion unit, and a color filter arranged on the photoelectric conversion unit,
the plurality of pixels includes a plurality of first pixels and a plurality of second pixels;
In plan view, the first electrodes of the plurality of second pixels are smaller than the first electrodes of the plurality of first pixels,
the first electrodes of the plurality of first pixels and the first electrodes of the plurality of second pixels are provided on wiring layers having the same height,
The first electrode included in one of the plurality of second pixels is unevenly distributed in a first direction with respect to the center of the one second pixel in plan view. and, of the plurality of second pixels, the first electrode included in the other second pixel is oriented with respect to the center of the other second pixel in a plan view. By being unevenly distributed in a second direction opposite to the first direction, the one second pixel and the other second pixel are configured as pixels for phase difference detection ,
The photoelectric conversion element, wherein the color filters provided in the plurality of second pixels are green or transparent filters. A photoelectric conversion element having a plurality of pixels arranged two-dimensionally,
each of the plurality of pixels,
A photoelectric conversion part including a first electrode, a photoelectric conversion layer provided on the first electrode, and a second electrode provided so as to sandwich the photoelectric conversion layer with the first electrode. , a microlens arranged on the photoelectric conversion unit, and a color filter arranged on the photoelectric conversion unit,
the plurality of pixels includes a plurality of first pixels and a plurality of second pixels;
In plan view, the first electrodes of the plurality of second pixels are smaller than the first electrodes of the plurality of first pixels,
the first electrodes of the plurality of first pixels and the first electrodes of the plurality of second pixels are provided on wiring layers having the same height,
The first electrode included in one of the plurality of second pixels extends in a first direction with respect to the center of the one second pixel in plan view. The first electrode, which is unevenly distributed and which the other second pixel has among the plurality of second pixels, is arranged with respect to the center of the other second pixel in a plan view. By being unevenly distributed in a second direction opposite to the first direction, the one second pixel and the other second pixel are configured as phase difference detection pixels ,
The one second pixel and the other second pixel are arranged adjacent to each other in a third direction crossing the first direction and the second direction in plan view. A photoelectric conversion element characterized by: Each of the plurality of pixels includes an amplifying transistor and a capacitor, one node of the capacitor is electrically connected to a control node of the amplifying transistor, and the other node of the capacitor is connected to a predetermined 3. The photoelectric conversion element according to claim 1, wherein a voltage of is applied. 4. The photoelectric conversion according to any one of claims 1 to 3, further comprising a photoelectric conversion layer separating portion that separates the photoelectric conversion layers of two adjacent pixels among the plurality of pixels. element. 5. The photoelectric conversion element according to claim 4, wherein the photoelectric conversion layer separating portion includes at least one of an insulating member and a light shielding member. 6. The photoelectric conversion element according to claim 1 , wherein the photoelectric conversion layer of each of the plurality of second pixels is smaller than the photoelectric conversion layer of the first pixels. 7. The photoelectric conversion element according to claim 6, wherein a light blocking member is provided between the photoelectric conversion layer of the second pixel and the photoelectric conversion layer of the pixel adjacent to the second pixel. 6. The photoelectric conversion element according to claim 1 , further comprising a light shielding film provided between said plurality of pixels. 9. The photoelectric conversion element according to claim 8, wherein the light shielding film is provided between the second electrode and the color filter. 10. The photoelectric conversion element according to claim 1, wherein the photoelectric conversion layer is made of any one of intrinsic amorphous silicon hydride, a compound semiconductor, and an organic semiconductor. Each of the plurality of pixels further has a signal readout circuit,
The signal readout circuit includes an in-pixel amplifier,
11. The photoelectric conversion element according to claim 1, wherein the first electrode is connected to an input portion of the intra-pixel amplifier. 10. The photoelectric conversion device according to claim 8, wherein the light-shielding film does not overlap the first electrodes of the plurality of second pixels in plan view. 13. The photoelectric conversion device according to claim 8, wherein the light shielding film does not overlap the first electrode of the first pixel when viewed from above. 3. The photoelectric conversion device according to claim 2, wherein the color filter of the one of the second pixels and the color filter of the other of the second pixels are green filters. A photoelectric conversion device according to any one of claims 1 to 14,
an optical system that forms an image on the plurality of pixels;
and a video signal processing unit that processes a signal output from the photoelectric conversion element to generate image data.

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