JP7125252B2 - SiC epitaxial wafer and manufacturing method thereof - Google Patents

Description

The present invention relates to a SiC epitaxial wafer and its manufacturing method.

Silicon carbide (SiC) has properties such as a dielectric breakdown field that is one order of magnitude larger than silicon (Si), a bandgap that is three times larger, and a thermal conductivity that is approximately three times higher. Since silicon carbide has these characteristics, it is expected to be applied to power devices, high-frequency devices, high-temperature operation devices, and the like. Therefore, in recent years, SiC epitaxial wafers have come to be used for such semiconductor devices.

Establishment of high-quality crystal growth technology and high-quality epitaxial growth technology is indispensable for promoting the practical use of SiC devices.

SiC devices are manufactured by chemical vapor deposition (Chemical It is generally manufactured using a SiC epitaxial wafer on which a SiC epitaxial film, which will be the active region of the device, is grown by Vapor Deposition (CVD) or the like.

The SiC epitaxial wafer is grown by step flow growth (lateral growth from atomic steps) on a SiC single crystal substrate whose growth surface is a plane having an off angle in the <11-20> direction from the (0001) plane to obtain 4H SiC. It is common to grow epitaxial films.

Step bunching may be formed in a SiC epitaxial film grown by step flow growth (Patent Document 1). Step bunching refers to a phenomenon in which atomic steps (usually about 2 to 10 atomic layers) gather and coalesce on the surface, and sometimes refers to the step itself on the surface. Step bunching is caused by defects and dislocations on the surface of the SiC single crystal substrate, and is caused by variations in the growth rate at the edge of the step.

Further, Patent Document 2 describes that step bunching can be suppressed by setting temperature conditions and supply conditions of Si supply gas and C supply gas when growing a SiC epitaxial film.

JP 2011-49496 A WO2014/125550

The step bunching described in Patent Documents 1 and 2 originates from defects and dislocations, and stochastically occurs on the surface of the SiC epitaxial wafer. Therefore, step bunching has no positional anisotropy.

On the other hand, the present inventors have discovered a new defect mode called outer edge step bunching, which has positional anisotropy in the plane of the SiC epitaxial wafer and occurs extending from the outer peripheral edge. A thermal oxide film may be formed when a SiC epitaxial wafer is used as a device. Outer edge step bunching lowers the withstand voltage of the thermal oxide film and can cause deterioration of the life of the thermal oxide film. Therefore, the outer edge step bunching is not a problem when the SiC epitaxial wafer is used as a Schottky barrier diode (SBD), but becomes a serious problem when the SiC epitaxial wafer is used as a field effect transistor (MOSFET).

SUMMARY OF THE INVENTION It is an object of the present invention to provide a SiC epitaxial wafer having a low density of outer edge step bunching extending from the outer peripheral edge.

The present inventors paid attention to the shape of the end surface of the SiC single crystal substrate. The present inventors have found that if the shape of the surface on which the epitaxial film is formed at the edge of the SiC single crystal substrate has a predetermined shape, the occurrence of outer edge step bunching can be effectively suppressed. That is, the present invention provides the following means in order to solve the above problems.

(1) A SiC epitaxial wafer according to a first aspect includes a 4H-SiC single crystal substrate having a main surface having an off-angle with respect to the c-plane and a bevel portion on the peripheral edge, and the 4H-SiC single crystal and a SiC epitaxial film formed on a substrate, wherein there is no outer edge step bunching extending from the outer peripheral edge of the SiC epitaxial film to a position 3 mm or more inward from the outer peripheral edge.

(2) The SiC epitaxial wafer according to the above aspect may not have outer edge step bunching even in a region within 3 mm from the outer peripheral edge.

(3) A SiC epitaxial wafer according to a second aspect includes a 4H—SiC single crystal substrate having a main surface having an off-angle with respect to the c-plane and a bevel portion on the peripheral edge portion, and the 4H—SiC single crystal and a SiC epitaxial film formed on a substrate, wherein the radius of curvature of the upper surface of the outer peripheral end portion of the bevel portion is 80 μm or less.

(4) In the method for manufacturing a SiC epitaxial wafer according to the third aspect, the upper surface of the outer peripheral end portion of the 4H—SiC single crystal substrate whose main surface is a surface having an off angle with respect to the c-plane is curved to a curvature of 80 μm or less. It has a step of machining to a radius.

According to the SiC epitaxial wafer according to the present embodiment, the density of outer end step bunching extending from the outer peripheral end can be reduced.

It is a cross-sectional schematic diagram of the SiC epitaxial wafer concerning this embodiment. It is a schematic diagram for demonstrating outer edge step bunching. (a) is an atomic force microscope (AFM) image of outer edge step bunching, and (b) is the result of measuring the surface roughness of the epitaxial film along the step flow direction (AA direction). FIG. 10 is a schematic diagram for explaining the mechanism by which outer edge step bunching occurs. FIG. 3 is an enlarged schematic diagram of the vicinity of the bevel portion of the SiC epitaxial wafer according to the present embodiment; 1 is a diagram summarizing the results of Example 1. FIG. It is a confocal microscope image of Example 1-1 and Comparative Example 1-1.

A SiC epitaxial wafer and a method for manufacturing the same, which are embodiments to which the present invention is applied, will be described in detail below with reference to the drawings. In the drawings used in the following description, in order to make the features easier to understand, the characteristic parts may be shown enlarged for convenience, and the dimensional ratios of each component may not necessarily be the same as the actual ones. The materials, dimensions, and the like exemplified in the following description are examples, and the present invention is not limited to them, and can be implemented with appropriate changes within the scope of its effects.

FIG. 1 is a schematic cross-sectional view of a SiC epitaxial wafer 10 according to this embodiment. As shown in FIG. 1, a SiC epitaxial wafer 10 includes a 4H—SiC single crystal substrate 1 (hereinafter referred to as single crystal substrate 1) and a SiC epitaxial film 2 (hereinafter referred to as epitaxial film 2).

A single crystal substrate 1 includes a substrate portion 11 having a main surface 1a having an offset angle (hereinafter referred to as an off angle) with respect to the c-plane, and a bevel portion 12 located on the periphery. Here, the bevel portion 12 is a portion of the peripheral portion of the single crystal substrate 1 which is rounded to prevent chipping of the substrate and generation of particles, and is a portion thinner than the thickness of the substrate.

Epitaxial film 2 is laminated on single crystal substrate 1 . In this specification, the direction in which the epitaxial film 2 of the single crystal substrate 1 is formed is expressed as "upper". When viewed from above, epitaxial film 2 does not have outer edge step bunching extending from outer edge 10e of SiC epitaxial wafer 10 to a position 3 mm or more inward from outer edge 10e. Moreover, it is preferable that the epitaxial film 2 does not have outer edge step bunching in a region within 3 mm from the outer peripheral edge, that is, does not have outer edge step bunching.

FIG. 2 is a schematic diagram for explaining outer edge step bunching. The left diagram in FIG. 2 shows an area where outer edge step bunching is likely to occur, and the right diagram in FIG. 2 is a confocal microscope image of outer edge step bunching.

As shown in FIG. 2 , the outer edge step bunching is in the range of 25° to 155° to 335°.

FIG. 3(a) is an AFM image of outer edge step bunching, and FIG. 3(b) shows the surface roughness of the epitaxial film along the step flow direction (AA direction in FIG. 3(a)) using AFM. This is the result of the measurement.

As shown in FIG. 3A, the outer edge step bunching extends from the outer peripheral edge of SiC epitaxial wafer 10 in a direction crossing step flow direction SF (see FIG. 2). The outer edge step bunching is confirmed as a step on the surface of the epitaxial film 2 (see FIG. 3(b)). As shown in FIG. 3(a), the outer edge step bunching is densely present. Step bunching caused by defects or dislocations is not measured so densely unless the single crystal substrate 1 has a large number of defects or dislocations.

The cause of outer edge step bunching is not clear. However, it is considered that this is caused by a difference in inclination angle between the main surface 1a of the single crystal substrate 1 and the outer peripheral upper end 1b of the bevel portion 12. FIG.

FIG. 4A is a schematic cross-sectional view enlarging the main surface 1a of the single crystal substrate 1. FIG. A main surface 1a of single crystal substrate 1 has an offset angle and is slightly inclined from the (0001) plane. Therefore, the main surface 1a is composed of the atomic-level terraces 22 and the steps 23 .

On the other hand, FIG. 4(b) is a diagram schematically showing the boundary between the main surface 1a of the single crystal substrate 1 and the outer peripheral upper end 1b. As shown in FIG. 4, the main surface 1a and the outer peripheral upper end 1b have different offset angles. Therefore, the terraces 22a and steps 23a forming the main surface 1a and the terraces 22b and steps 23b forming the outer peripheral upper end 1b have different shapes. As a result, the growth rate of the step flow is different between the main surface 1a and the outer peripheral upper end 1b, and in the process of growing the epitaxial film 2, the step 23a based on the main surface 1a and the step 23b based on the outer peripheral upper end 1b are overlapped. It is believed that step bunching is formed.

As described above, the outer edge step bunching is caused by the difference in growth rate between the main surface 1a and the outer peripheral upper edge 1b, and is different from the step bunching caused by defects or the like.

The radius of curvature R of the upper surface of the outer peripheral end portion of the bevel portion 12 of the single crystal substrate 1 according to this embodiment is 80 μm or less. FIG. 5 is an enlarged schematic diagram of the vicinity of the bevel portion of the SiC epitaxial wafer 10 according to the present embodiment.

As shown in FIG. 5, the beveled portion 12 can have various shapes. The bevel portion 12A shown in FIG. 5A has an outer peripheral end portion 31 and a slope portion 32 connecting the outer peripheral end portion 31 and the substrate portion 11 . The outer peripheral end portion 31 shown in FIG. 5(a) has an outer peripheral end surface 31e with a curvature radius R of 80 μm or less. The outer peripheral end surface 31e is symmetrical in the thickness direction of the single crystal substrate 1, and the radius of curvature R of the upper surface of the outer peripheral end portion 31 is also 80 μm or less.

Also, the bevel portion 12B shown in FIG. The outer peripheral end portion 33 shown in FIG. 5(b) has an outer peripheral end surface 33e with a radius of curvature R of 80 μm or less. The outer peripheral end surface 33e is symmetrical in the thickness direction of the single crystal substrate 1, and the curvature radius R of the upper surface of the outer peripheral end portion 33 is also 80 μm or less.

Also, the bevel portion 12C shown in FIG. An outer peripheral end surface 35e of the outer peripheral end portion 35 shown in FIG. 5(c) has an upper surface 35e1, a side surface 35e2, and a lower surface 35e3. The shape of outer peripheral end surface 35 e is asymmetrical in the thickness direction of single crystal substrate 1 . The radius of curvature of the upper surface 35e1 is 80 μm or less.

5(a) to 5(c), the radius of curvature R of the upper surfaces of the outer peripheral end portions 31, 33, 35 is 80 μm or less. When a single crystal substrate 1 in which the radius of curvature R of the upper surface of the outer peripheral edge portions 31 , 33 , 35 is 80 μm or less, outer edge step bunching is less likely to be formed in the epitaxial film 2 .

Outer edge step bunching is considered to be caused by a difference in the growth rate of the step flow between the main surface and the outer peripheral edge. If the radius of curvature R of the top surfaces of the outer peripheral end portions 31 , 33 , 35 is small, it is difficult for an epitaxial film to grow on the upper surfaces of the outer peripheral end portions 31 , 33 , 35 . In other words, if the epitaxial film 2 does not grow on the upper surface of the outer edge, no difference in the growth rate of the step flow will occur, and the outer edge step bunching will not occur.

From the viewpoint of not causing a difference in the growth rate of the step flow, it is preferable that the length of the slope portion 32 in FIG. 5(a) is short. Specifically, the length of the slope portion 32 is preferably 150 μm or less. Further, it is more preferable that the outer peripheral edge does not have the inclined surface 32 as shown in FIGS. 5(b) and 5(c).

Only the upper surface of the single crystal substrate 1 affects the growth of the epitaxial film 2 here. Therefore, the radius of curvature R of the upper surface is 80 μm or less at the outer peripheral edge, and the shapes of the side surface 35e2 and the lower surface 35e3 are not particularly limited as shown in FIG. 5(c). Therefore, as shown in FIG. 5(c), the shape of the outer peripheral end surface 35e may be asymmetrical in the thickness direction of the single crystal substrate 1. As shown in FIG.

The radius of curvature R of the upper surface of the outer peripheral edge may be 80 μm or less, preferably 40 μm or less, and more preferably 20 μm or less.

"Manufacturing method of SiC epitaxial wafer"
In the method for manufacturing a SiC epitaxial wafer according to the present embodiment, the upper surface of the outer peripheral end portion of the 4H-SiC single crystal substrate whose main surface is a surface having an off angle with respect to the c-plane is processed to have a radius of curvature of 80 μm or less. have a process.

First, a 4H—SiC ingot is produced. An ingot of SiC can be made in any known manner. For example, a sublimation method is used to grow a single crystal on a seed crystal.

Next, a single crystal substrate is produced from the SiC ingot. A single crystal substrate is obtained by cutting a SiC ingot with a wire saw or the like. The cutting is performed so as to have an off angle with respect to the c-plane.

Next, the upper surface of the outer peripheral edge of the single crystal substrate is processed to have a radius of curvature of 80 μm or less. Processing can be performed using a known processing method. For example, peripheral grinding using a whetstone, film polishing using a wrapping film to which abrasive grains are fixed, and the like can be used. Contact ring processing or the like can be used as the peripheral grinding using a grindstone.

A chamfer shape observation machine can be used to check whether the end portion after processing satisfies a predetermined shape. For example, EPRO-212EN manufactured by SPEEDFAM can be used.

Then, an epitaxial film is formed on a single-crystal substrate having a predetermined shape at the outer peripheral edge. A known method can be used for forming the epitaxial film.

Although the preferred embodiments of the present invention have been described in detail above, the present invention is not limited to such specific embodiments, and various modifications can be made within the scope of the gist of the present invention described in the scope of the claims. Transformation and change are possible.

"Example 1"
In Example 1, while changing the shape of the bevel portion of the single crystal substrate, the presence or absence of the outer edge step bunching was confirmed. The shape of the bevel portion was the shape shown in FIG. 5(a) when it had a sloped portion, and the shape shown in FIG. 5(c) when it did not have a sloped portion. The radius of curvature R (see FIGS. 5A and 5C), the slope length A1 of the slope portion 32 (see FIG. 5A), and the angle θ1 formed by the connecting point between the substrate portion 11 and the bevel portion 12 different single crystal substrates were prepared. Here, the angle θ1 formed by the connection point between the substrate portion 11 and the bevel portion 12 is the angle formed between the slope of the slope portion 32 and the main surface of the substrate portion 11 in the case of FIG. In the case of c), it is the angle formed by the upper surface 35 e 1 of the outer peripheral end portion 35 and the main surface of the substrate portion 11 . Then, an epitaxial film having a thickness of 10 μm was formed on these single crystal substrates. The results are shown in Table 1. In Table 1, anti-OF means the side opposite to the orientation flat with respect to the center of the SiC epitaxial wafer, and anti-IF means the side opposite to the index flat with respect to the center of the SiC epitaxial wafer.

Moreover, the results of Table 1 are summarized in FIG. FIG. 6(a) is a diagram showing the relationship between the radius of curvature R and the angle θ1 formed by the connection point between the substrate portion and the bevel portion, and FIG. 6(b) is the slope length A , and an angle θ1 formed by a connection point between a substrate portion and a bevel portion. In FIGS. 6A and 6B, the square marks correspond to Comparative Example 1-1. As shown in FIG. 6A, when a SiC epitaxial film was formed on a single crystal wafer having a radius of curvature R of 80 μm or less at the outer peripheral edge, edge step bunching did not occur. FIG. 7 is confocal microscope images of Example 1-1 and Comparative Example 1-1.

"Example 2"
In Example 2, the thickness of the epitaxial film grown on the single crystal substrate was changed. Table 2 shows the results.

As shown in Example 2, even if the thickness of the epitaxial film was changed, there was no change in the presence or absence of outer edge step bunching. On the other hand, in Comparative Example 2-1 in which outer edge step bunching occurred, the length of the outer edge step bunching changed when the thickness of the epitaxial film changed. That is, even when using a single crystal substrate in which outer edge step bunching occurs to some extent, if the thickness of the epitaxial film is reduced, it is possible to suppress outer edge step bunching from reaching an area that affects device fabrication.

10 SiC epitaxial wafer 1 Single crystal substrate 2 Epitaxial film 11 Substrate portion 12 Bevel portion 1a Main surface 1b Peripheral upper edge 10e Peripheral edges 22, 22a, 22b Terraces 23, 23a, 23b Steps 31, 33, 35 Peripheral edge portion 32 Slope portion 31e , 33e, 35e outer peripheral end surface 35e1 upper surface 35e2 side surface 35e3 lower surface

Claims (4)

a 4H—SiC single crystal substrate having a main surface having an off-angle with respect to the c-plane and having a bevel portion in the peripheral edge portion;
a SiC epitaxial film formed on the 4H-SiC single crystal substrate;
The SiC epitaxial film is formed on the main surface and the bevel portion,
A SiC epitaxial wafer having no outer edge step bunching extending from the outer peripheral edge of the SiC epitaxial film to a position 3 mm or more inward from the outer peripheral edge. 2. The SiC epitaxial wafer according to claim 1, which does not have outer edge step bunching even in a region within 3 mm from said outer peripheral edge . a 4H—SiC single crystal substrate having a main surface having an off-angle with respect to the c-plane and having a bevel portion in the peripheral edge portion;
a SiC epitaxial film formed on the 4H-SiC single crystal substrate;
An SiC epitaxial wafer, wherein the radius of curvature of the upper surface of the outer peripheral edge of the bevel portion is 80 μm or less. A method for producing a SiC epitaxial wafer, comprising the step of processing the upper surface of the outer peripheral end portion of a 4H—SiC single crystal substrate having a principal surface having an off-angle with respect to the c-plane so as to have a curvature radius of 80 μm or less.

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