JP2009043969A - Processing method for semiconductor wafer outer peripheral part, and device therefor - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a processing method for semiconductor wafer outer peripheral portion, and a device therefor, which are crystallographically superior such that an outer peripheral part of a semiconductor wafer of SiC, GaN, etc., is beveled through plasma CVM with high efficiency and the semiconductor wafer does not have a processing deterioration layer due to microcracking, residual stress, etc. <P>SOLUTION: A ring electrode 2 is disposed at the outer peripheral part of the semiconductor wafer 1 leaving a predetermined gap 3 therebetween and while process gas of nearly atmospheric pressure obtained by mixing reactant gas with inert gas is supplied to the gap, a high-frequency voltage is applied between the semiconductor wafer and ring electrode to generate plasma locally nearby the outer peripheral part of the semiconductor wafer and nearly equally over the entire circumference thereof. Then a volatile substance produced by radical reaction between a neutral radical generated in the plasma and based upon the reactant gas and atoms constituting the semiconductor wafer outer peripheral part is vaporized to be removed, thereby performing the beveling processing. <P>COPYRIGHT: (C)2009,JPO&INPIT

Description

  The present invention relates to a method and apparatus for processing a peripheral portion of a semiconductor wafer, and more specifically, it is possible to chamfer an edge of a peripheral portion of a next-generation semiconductor wafer such as SiC or GaN without introducing a work-affected layer. The present invention relates to a processing method and an apparatus therefor.

  In general, a semiconductor single crystal such as Si, GaAs, SiC, or GaN is grown as a cylindrical semiconductor single crystal ingot. Usually, a semiconductor single crystal ingot is cylindrically ground on its outer peripheral surface and processed into a columnar shape with a uniform diameter, and an orientation flat (hereinafter referred to as an orientation flat) showing a certain crystal orientation is formed by grinding with a grindstone. The Thereafter, the ingot is sliced with a wire saw device or the like by bonding the orientation flat surface to the contact plate and processed into a wafer shape. The orientation flat is a linear notch serving as a mark indicating the crystal direction, and is used as a reference for positioning a circular semiconductor wafer in a semiconductor processing apparatus. A circular outer peripheral portion of the semiconductor wafer other than the orientation flat is called a bevel.

  In the manufacturing process of a semiconductor wafer, when the wafer is sliced from a single crystal ingot, there are sharp edges and work-affected layers on the outer periphery of the wafer. It is known that damages are caused to the polishing surface by the chipping and the chipped pieces being caught between the polishing surface and the abrasive. Therefore, before these processes, a process of chamfering the edge of the outer peripheral portion (generally referred to as “beveling process”) is required. Conventionally, mechanical processing methods (grinding, polishing, etc.) have been used for beveling, but it is still effective for next-generation semiconductor wafers such as SiC and GaN because of their high hardness and chemical stability. No beveling method has been established.

  For example, Patent Document 1 discloses that a beveling wheel capable of reducing metal contamination by heavy metals is used as a mechanical processing method for a Si wafer. That is, a silicon wafer outer periphery processing beveling wheel in which an abrasive layer having one or more grooves formed on the outer periphery of a base metal is fixed, and the bonding material of the abrasive layer is a metal bond In addition, a metal beveling wheel for processing the outer periphery of a silicon wafer is disclosed in which the metal species and the ratio constituting the metal powder in the metal bond are specified and the bending strength of the metal bond is 400 to 800 MPa. Further, in Patent Document 2, when an outer peripheral edge portion is beveled while rotating a disk-shaped workpiece, an electrolyte aqueous solution is supplied to the outer peripheral portion of the workpiece, and this electrolyte aqueous solution is supplied. A beveling processing method is disclosed in which a high-temperature plasma jet is ejected to the outer periphery. In this processing method, since the outer peripheral portion of the wafer is locally heated, a large internal stress is generated, so that a microcrack grows and a residual stress is generated. However, Patent Documents 1 and 2 do not show that SiC or GaN can be processed, and there is no specific disclosure regarding the processing of orientation flats.

  Further, although not beveling, Patent Document 3 discloses an apparatus for removing a deposited film adhering from the vertical portion of the edge portion to the back surface portion by plasma treatment when the wafer surface is etched in the etching apparatus. Has been. Specifically, the wafer is placed on and held on the electrode except for the outer peripheral portion thereof, and a conductive focus ring is disposed at an interval on the outer peripheral portion of the wafer so that the electrode and the focus ring are placed in a hydrogen gas atmosphere. A plasma processing apparatus is disclosed in which one of the two is grounded and high frequency power is supplied to the other to generate plasma between the edge of the wafer and the focus ring to remove (etch) the deposited film. Here, the focus ring is formed by connecting a silicon ring to the upper surface of the conductor ring, and is fixed around the electrode via an insulating ring. Plasma etching in such a low-pressure atmosphere is generally used as a semiconductor device manufacturing process. However, since the etching rate is low, even if the Si deposited film can be removed, the peripheral portion of the Si wafer can be beveled. In addition, beveling is almost difficult for SiC and GaN.

On the other hand, as disclosed in Patent Documents 4 and 5, there is a processing method called plasma CVM (Chemical Vaporization Machining) in which the generation pressure of plasma is increased to atmospheric pressure. In this processing method, since the plasma generation pressure is high, the density of active species in the plasma is large and high processing efficiency can be expected. Also, the mean free path of gas molecules is short, and the plasma generation region is localized. There is an advantage that only the portion to be processed can be processed without using. Accordingly, this machining method is used to form a random curved surface including a flat surface by moving the unit machining trace by relatively scanning the machining electrode and the workpiece by numerical control and spatially controlling the machining amount. It has been mainly used for. In other words, plasma CVM has never been applied to beveling processing.
Japanese Patent No. 3456979 Japanese Patent Laid-Open No. 06-210454 JP2007-081221A Japanese Patent No. 2521127 Japanese Patent No. 2816365

  Therefore, in view of the above-mentioned situation, the present invention intends to solve the problem that beveling processing of the outer peripheral portion of a semiconductor wafer such as SiC or GaN, which has been difficult in the past, can be performed with high efficiency using plasma CVM. Another object of the present invention is to provide a method and apparatus for processing the outer periphery of a semiconductor wafer that is excellent in crystallography and that does not generate a work-affected layer such as a microcrack or residual stress in the semiconductor wafer.

  In order to solve the above-mentioned problems, the present invention provides a ring electrode having a predetermined gap with respect to the outer peripheral portion of a semiconductor wafer, and a process gas in the vicinity of atmospheric pressure in which a reactive gas is mixed with an inert gas. And a high-frequency voltage applied between the semiconductor wafer and the ring electrode to generate a plasma that is localized in the vicinity of the outer peripheral portion of the semiconductor wafer and substantially uniformly over the entire periphery, and is generated in the plasma. Established a semiconductor wafer peripheral processing method that vaporizes and removes volatile substances generated by radical reaction between neutral radicals based on gas and atoms constituting the semiconductor wafer peripheral portion, and performs beveling processing. (Claim 1).

  Here, it is preferable that the semiconductor wafer is a SiC or GaN wafer.

Further, it is more preferable to flow a process gas having a pressure of 0.01 to 1 MPa through the gap between the semiconductor wafer and the ring electrode since the processing speed can be increased. In addition, when the process gas is a mixture of He and CF ₄ and O ₂ or SF _{6 in an amount} of 0.5 to 20% by volume, a semiconductor wafer such as SiC or GaN, which is a difficult-to-process material, can be efficiently used. It can be beveled (Claim 4).

  The present invention also includes a chamber, a ring electrode fixed inside the chamber and having an insulating layer formed on an inner peripheral surface thereof, a support base positioned inside the ring electrode and holding a semiconductor wafer; A gap adjusting mechanism for positioning the semiconductor wafer with respect to a support base so as to form a gap of the same width over the entire circumference between the outer peripheral portion of the semiconductor wafer and the inner peripheral surface of the ring electrode, and inactive through the gap A gas supply means for supplying a process gas in the vicinity of atmospheric pressure in which a reaction gas is mixed with a gas; and a high-frequency power source for applying a high-frequency voltage between the semiconductor wafer and the ring electrode, and a local area near the outer periphery of the semiconductor wafer. Exist and generate a plasma substantially uniformly over the entire circumference, and neutral radicals based on the reaction gas generated in the plasma and atoms constituting the outer periphery of the semiconductor wafer Of removing vaporized volatiles produced by radical reaction, to constitute a processing apparatus for a semiconductor wafer outer peripheral portion, characterized in that performing the beveling (claim 5).

  Here, a cylindrical surface portion and a flat surface portion are formed on the inner peripheral surface of the ring electrode according to the shapes of the bevel and orientation flat of the outer peripheral portion of the semiconductor wafer, and the cross-sectional shape of the inner peripheral surface of the ring electrode is a semiconductor wafer. It is more preferable that the shape is similar to the shape of the outer peripheral portion.

  As the gap adjusting mechanism, the inner peripheral surface of the ring electrode has a tapered shape that narrows as it goes downward, and a support base that holds the semiconductor wafer can be raised and lowered, and the semiconductor wafer is statically mounted on the support base. The semiconductor wafer is automatically centered by bringing the outer periphery of the semiconductor wafer into close contact with the tapered surface of the ring electrode, and the semiconductor wafer is sucked and supported by a vacuum chuck on a support base. By using a mechanism that raises the table and sets a predetermined gap, the gap between the outer peripheral portion of the semiconductor wafer and the ring electrode can be easily set to the same width over the entire periphery.

Further, the semiconductor wafer is a SiC or GaN wafer, and the process gas is a gas having a pressure of 0.01 to 1 MPa in which a mixed gas of CF ₄ and O ₂ or 0.5 to 20% by volume of SF ₆ is mixed with He. (Claim 8).

  The processing method and apparatus for the outer peripheral portion of the semiconductor wafer according to the present invention as described above have the following remarkable effects. The plasma CVM, which is the processing principle of the present invention, is a processing method having spatial controllability and processing efficiency comparable to machining while using a chemical reaction. Therefore, it is difficult to process a semiconductor wafer such as SiC or GaN. The outer peripheral portion can be efficiently beveled without introducing a work-affected layer.

  In addition, the work-affected layer at the outer peripheral portion caused by machining such as slicing during semiconductor wafer fabrication can be removed by the beveling process according to the present invention. This processing method is optimal for SiC or GaN wafers that are difficult to mechanically polish because the surface is chemically removed without being affected by hardness and brittleness. Furthermore, the shape of the outer peripheral portion of the semiconductor wafer can be arbitrarily processed by changing the shape of the ring electrode or controlling the plasma.

  First, the processing principle of the present invention will be briefly described. A ring electrode is provided with a predetermined gap with respect to the outer peripheral portion of the semiconductor wafer, and a process gas near the atmospheric pressure in which a reactive gas is mixed with an inert gas is supplied to the gap, while the semiconductor wafer and the ring electrode are connected. A high frequency voltage is applied to the electrode to generate plasma in the gap. Since plasma has a high density of charged particles and neutral particles, the mean free path of those particles is very short and is generated locally in a spatially narrow range. Further, the higher the frequency of the high-frequency voltage applied between the semiconductor wafer and the ring electrode, the more ions and electrons can be trapped in a narrow region, so that the plasma generation region can be controlled. Therefore, by using a process gas near atmospheric pressure and applying a high frequency voltage, it is possible to generate plasma that is localized in the vicinity of the outer peripheral portion of the semiconductor wafer and substantially uniformly over the entire periphery. In the generated plasma, ions and electrons and neutral particles continuously collide and interact with each other, and the neutral particles derived from the reaction gas are excited, resulting in high levels of chemically reactive neutral radicals. Generated to density. This neutral radical reaches the outer periphery of the semiconductor wafer without being affected by the high-frequency electric field, and generates a reaction product by a radical reaction with the atoms constituting the semiconductor wafer. Here, the reaction gas is selected so that the reaction product becomes a volatile substance. And the volatile substance produced | generated by the outer peripheral part of the semiconductor wafer is vaporized and removed, and a beveling process is performed.

  Here, in the present invention, a SiC or GaN wafer is an object as a semiconductor wafer. That is, difficult-to-process materials that have been difficult for conventional mechanical polishing and dry etching using low-pressure plasma are targets. In the case of a 4H—SiC wafer, it is known that the etching rate varies depending on the plane orientation and crystal orientation at room temperature. It is also known that the difference in etching rate decreases at higher temperatures. In the beveling processing method of the present invention, the outer peripheral portion of the SiC wafer is exposed to plasma, and thus has a high temperature. As a result, the outer peripheral portion of the wafer is beveled at substantially the same rate without being greatly affected by the plane orientation and crystal orientation. Further, since SiC has a very high thermal conductivity, the temperature of the central portion of the wafer is also instantaneously increased, the temperature difference from the outer peripheral portion is reduced, and it is assumed that the thermal distortion during the beveling process is small.

  Next, the present invention will be described in more detail based on the embodiments shown in the accompanying drawings. A method and apparatus for processing a semiconductor wafer outer peripheral portion according to the present invention will be described with reference to FIGS.

  In order to process the outer peripheral portion of the wafer 1 at a time, in the present invention, a cylindrical ring electrode 2 is used as an electrode, and the wafer 1 is arranged coaxially inside the ring electrode 2. In this case, the positioning of the wafer 1 is important. In order to generate plasma uniformly around the wafer 1 and make the etching rate substantially the same over the entire periphery, the gap 3 between the outer peripheral portion of the wafer 1 and the inner peripheral surface of the ring electrode 2 must be made uniform over the entire periphery. There is. Here, as described above, the bevel 4 and the orientation flat 5 are provided on the outer peripheral portion of the wafer 1. In order to make the gap 3 uniform including the orientation flat 5, the cross-sectional shape of the inner peripheral surface of the ring electrode 2 is not limited to the wafer. It is necessary to make the shape similar to the outer shape of 1, that is, a shape in which the cylindrical surface portion 6 and the flat surface portion 7 are combined. The cylindrical surface portion 6 of the ring electrode 2 corresponds to the bevel 4 of the wafer 1, and the flat portion 7 of the ring electrode 2 corresponds to the orientation flat 5 of the wafer 1. And the relative position of the ring electrode 2 and the wafer 1 is set correctly, and the state is maintained during processing. Here, when the wafer 1 has the first orientation flat and the second orientation flat, the inner surface of the ring electrode 2 is also made to correspond to the first planar portion and the second planar portion.

  However, since the dimensions of the wafer 1 have non-negligible variations, it is necessary to provide a mechanism that can adjust the position accurately and easily for each wafer to be processed. Further, since the surface of the wafer 1 on which the electronic circuit is formed cannot be used for positioning, it is necessary to position using the outer peripheral portion. In the present invention, the inner peripheral surface of the ring electrode 2 is tapered downward (tapered surface 8), and the wafer 1 is placed on an insulating support base 9 disposed in the ring electrode 2. Is lowered so that the outer peripheral portion of the wafer 1 is brought into close contact with the tapered surface 8 in the ring electrode 2 and the position of the wafer 1 is set as the center, and then a vacuum chuck (not shown) provided on the upper surface of the support base 9 is operated. Then, the wafer 1 is fixed by suction, and then the support 3 is raised by a predetermined height to adjust the gap 3. Then, the pad electrode 10 is placed on the upper surface of the wafer 1 fixed to the support base 9 in order to supply high frequency power to the wafer 1.

  The entire apparatus will be described in more detail with reference to FIG. The processing apparatus of the present invention includes a chamber 11, a ring electrode 2 that is fixed inside the chamber 11, an insulating layer 12 is formed on the inner peripheral surface thereof, and an inner side of the ring electrode 2. The semiconductor wafer 1 with respect to the support table 9 so as to form a gap 3 having the same width over the entire circumference between the support table 9 that holds the outer periphery of the semiconductor wafer 1 and the inner peripheral surface of the ring electrode 2. A high-frequency voltage between the semiconductor wafer 1 and the ring electrode 2, a gap adjusting mechanism 13 for positioning the gas, a gas supply means 15 for supplying a process gas in the vicinity of atmospheric pressure obtained by mixing a reactive gas with an inert gas through the gap 3, A high frequency power supply 16 to be applied and a matching circuit 17 for matching impedance are provided.

  Here, as the gap adjusting mechanism 13, the inner peripheral surface of the ring electrode 2 has a tapered shape that narrows downward, and the support base 9 that holds the semiconductor wafer 1 can be raised and lowered. The semiconductor wafer 1 is lowered in a stationary state, and the semiconductor wafer 1 is automatically centered by bringing the outer peripheral portion of the semiconductor wafer 1 into close contact with the tapered surface 8 of the ring electrode 2. A mechanism for setting a predetermined gap 3 by operating the vacuum chuck 9 to adsorb it and raising the support 9. The gap adjusting mechanism 13 can easily set the gap 3 between the outer peripheral portion of the semiconductor wafer 1 and the ring electrode 2 to have the same width over the entire circumference.

  The ring electrode 2 is fixed to the lower part inside the chamber 11, and the support 9 is attached to the bottom surface of the chamber 11 via an elevating mechanism 18. The gas supply means 15 is provided with a supply port 19 for supplying a process gas prepared at a predetermined ratio by a mixer from an appropriate gas supply source at the lower end of the chamber 11, and after passing through the gap 3, The exhaust gas is exhausted from an exhaust port 20 provided in the upper part of the chamber 11. In order to always supply a new process gas to the gap 3 during the beveling process and to efficiently remove the generated volatile substances, it is preferable to flow the process gas.

  As shown in FIG. 5, plasma is generated in the gap 3 between the outer peripheral portion of the semiconductor wafer 1 and the inner peripheral surface of the ring electrode 2. This plasma generation region P is represented by thin dots. Here, there is a substantially right-angled edge 1A at the end of the unprocessed semiconductor wafer 1, and the electric field concentrates in the vicinity of the edge 1A, resulting in a high plasma density. This high-density plasma region P1 is represented by dark dots. The plasma density is increased in the vicinity of the edge 1A of the semiconductor wafer 1, and the density of neutral radicals is also higher than in other regions. As a result, the processing speed in the vicinity of the edge 1A is increased, and the edge 1A is selectively processed. Is removed. When the edge is rounded, the plasma density difference is also spatially reduced at the outer peripheral portion of the semiconductor wafer 1 and the processing speed is substantially uniform, so that the processing proceeds in a similar manner.

  The outer peripheral shape of the semiconductor wafer 1 after the beveling process can be changed by positively controlling the generation of plasma. In order to process the edge 1A of the semiconductor wafer 1 more and form the inclined surface, an electrode structure that can maintain high-density plasma in the vicinity of the edge 1A for a longer time may be used. FIG. 6 shows an example thereof, in which a V-groove 21 is formed on the inner peripheral surface of the ring electrode 2, and the edges 1 </ b> A are opposed to the two inclined surfaces of the V-groove 21. In this case, the process gas is exhausted uniformly from the exhaust groove 22 provided at the bottom of the V groove 21 to the periphery.

  The gap 3 is set to be approximately equal to the thickness of the wafer because the outer peripheral portion of the semiconductor wafer 1 is uniformly beveled. In the present embodiment, the gap 3 is adjusted to be 500 μm.

  As the frequency of the high-frequency power source 16, those of 150 MHz and 13.56 MHz are often used, but each has advantages and disadvantages. In the case of 150 MHz, charged particles can be captured in a minute space, and there is a merit that the influence of collision of charged particles on the processing surface is small. However, the matching circuit is complicated and the configuration of the apparatus is also complicated. There are disadvantages. In the case of 13.56 MHz, there is a merit that the matching circuit is simple and the device configuration is simple and inexpensive. On the other hand, the charged particle capture space is larger than 150 MHz. There is a disadvantage that there is a risk of giving. By the way, as described above, the gap 3 is relatively wide as 500 μm, and in the case of plasma, the mean free path is short, and the processing region is an outer peripheral portion that is not used as a device. As a result of considering the above, the frequency of the high-frequency power supply 16 was set to 13.56 MHz.

  Since the plasma CVM uses capacitively coupled plasma (CCP), boosting is necessary to cause breakdown. In addition, the output impedance of the 13.56 MHz high frequency power supply is 50 + 0j (Ω), and if both the real part and imaginary part do not match this value, reflection occurs and the input power is lost. In the embodiment, a matching circuit 17 capable of adjusting both the real part and the imaginary part is used.

  A high frequency power incident from an introduction terminal 23 provided in the chamber 11 from the high frequency power supply 16 through the matching circuit 17 is transmitted to the wafer by the pad electrode 10 placed on the upper surface of the semiconductor wafer 1, and the outer periphery of the semiconductor wafer 1. Plasma is generated between the ring electrode 2 and the grounded electrode.

  Since a semiconductor wafer, for example, a SiC wafer, which is a subject of the present invention, has a thickness of about 300 to 400 μm, an electric field tends to concentrate on the outer peripheral portion and arc discharge easily occurs. The insulating layer 12 is formed by surface treatment. In this embodiment, the material of the ring electrode 2 is aluminum, and at least the inner peripheral surface is anodized to form the insulating layer 12. For this surface treatment, alumina spraying is also possible in addition to the alumite treatment. In this way, by forming the insulating layer 12 (dielectric film) on the inner peripheral surface of the ring electrode 2, arc discharge due to thermionic emission and secondary electron emission is prevented, and stable generation of plasma at a low temperature is achieved. Make it possible.

  It is also known that the processing speed and the plasma generation region change depending on the input power. Therefore, from the viewpoint of plasma control, the range of power values that can be set should be widened. Therefore, the maximum incident power in a range where arc discharge does not occur by changing the flow rate (SLM) of the process gas between the aluminum electrode and the anodized electrode was examined. In the case of the aluminum electrode, the maximum incident power was 100 W when the flow rate of the process gas was 10 SLM, and the maximum incident power was 160 W when the flow rate was 20 SLM. When the flow rate of the anodized electrode was 20 SLM, the maximum incident power was 400 W. It is considered that the anodized electrode can make the processing speed faster.

Using the processing apparatus shown in FIG. 1, the outer peripheral portion of a 2 inch 4H—SiC wafer was subjected to beveling processing under processing conditions 1 shown in Table 1. Here, the frequency of the high frequency power supply is 13.56 MHz. In the PCVM processing of SiC, SF ₆ or CF ₄ + O ₂ is used as a reaction gas, and these reaction gases are diluted with He. The two types of gas compositions used in this example are He: CF ₄ : O ₂ = 98: 1: 1 and He: SF ₆ = 99: 1, and other processing conditions are common. In the 4H—SiC wafer used in this embodiment, the Si surface (0001) is lapped and the C surface (000-1) is a sliced surface that has been sliced.

FIG. 7 shows the result of measuring the cross-sectional shape of the outer periphery of the Si surface and C surface with a confocal laser microscope after processing. FIG. 7A shows the case where CF ₄ + O ₂ is used, and FIG. 7B shows the case where SF ₆ is used. From FIG. 7, it can be seen that the processing using CF ₄ + O ₂ as the reaction gas is processed to a portion closer to the center than the processing using SF ₆ . This is because the CF ₄ + O ₂ plasma is generated in a wide range, so that the portion near the center is beveled. On the contrary, the plasma generated by SF ₆ has a narrow generation region, and therefore, beveling is performed only in a narrow range of the outer peripheral portion of the wafer.

In addition, since SF ₆ plasma is sensitive to an electric field, the gap dependency is high in processing. The reason is that the diameter varies from wafer to wafer, and that a high-accuracy drive mechanism is required to position the wafer at the level of several tens of micrometers and set the gap with the same accuracy. Therefore, beveling with CF ₄ + O ₂ plasma is suitable from a practical and economical viewpoint.

Using the processing apparatus shown in FIG. 1, the outer peripheral portion of a 2 inch 4H—SiC wafer was subjected to beveling processing under processing conditions 2 shown in Table 2. The gas composition was He: CF ₄ : O ₂ = 98: 1: 1, and the processing conditions were the same as in Example 1 except that the processing time was set to 15, 30, 45, 60, and 70 minutes. is there.

  FIG. 8 shows the result of measuring the cross-sectional shape of the outer periphery of the Si surface and C surface with a confocal laser microscope after processing. FIG. 8A shows the result on the Si surface side, and FIG. 8B shows the result on the C surface side. 8 (a) and 8 (b), the edge portion becomes round as processing progresses, but it can be seen that after the processing progresses to some extent, the beveling processing progresses isotropically while maintaining the shape. . This is because at the initial stage of processing, the corner portion has a large electric field strength, so many radicals are generated, the corners are processed intensively, and as the processing proceeds, the wafer side surface has a curvature, and the electric field strength is increased. This is because a large difference does not occur and isotropically processed.

  FIG. 9 shows the observation results of the outer periphery of the 4H—SiC wafer before processing, and (a) and (b) are the observation results of the Si surface and the C surface near the first orientation flat boundary, respectively, using a Nomarski differential interference microscope. Yes, (c) is the observation result of the cut surface by SEM. Moreover, FIG. 10 shows the observation result of the outer periphery of the 4H—SiC wafer after processing, (a) to (c) are the observation results with a Nomarski differential interference microscope, and (a) is near the first orientation flat boundary. (B) is the observation result of the Si surface of the first orientation flat, (c) is the observation result of the C surface near the first orientation flat boundary, and (d) is the observation result of the cut surface by SEM.

It is a conceptual sectional view of the processing device of the present invention. It is a top view which shows the relationship between a ring electrode and a wafer. It is a perspective view of a ring electrode. It is a fragmentary sectional view which shows the process of adjusting the gap between a ring electrode and a wafer outer periphery. It is a fragmentary sectional view which shows a mode that the plasma is generated in the gap between a ring electrode and a wafer outer periphery. FIG. 7 is a partial cross-sectional view showing another embodiment of the ring electrode and showing a state in which plasma is generated in the gap between the ring electrode and the outer periphery of the wafer. It is the result of having measured the peripheral part of 4H-SiC wafer after beveling processing with a confocal laser microscope, (a) shows the case where CF ₄ + O ₂ is used, and (b) shows the case where SF ₆ is used, respectively. ing. It is the result of having measured the outer peripheral part of the 4H-SiC wafer after beveling processing by changing processing time with the confocal laser microscope, (a) shows Si surface side, (b) shows C surface side, respectively. Yes. The observation results of the outer periphery of the 4H-SiC wafer before processing are shown, (a) is a Nomarski differential interference microscope image of the Si surface near the first orientation flat boundary, and (b) is the Nomarski differential of the C plane near the first orientation flat boundary. An interference microscope image, (c) is an SEM image of the cut surface. The observation result of the outer peripheral part of the 4H-SiC wafer after processing is shown, (a) is a Nomarski differential interference microscope image of the Si surface near the first orientation flat boundary, (b) is a Nomarski differential interference microscope of the Si surface of the first orientation flat. (C) is a Nomarski differential interference microscope image of the C plane near the first orientation flat boundary, and (d) is an SEM image of the cut surface.

Explanation of symbols

DESCRIPTION OF SYMBOLS 1 Semiconductor wafer 1A Edge 2 Ring electrode 3 Gap 4 Bevel 5 Orientation flat 6 Cylindrical surface part 7 Flat part 8 Tapered surface 9 Supporting base 10 Pad electrode 11 Chamber 12 Insulating layer 13 Gap adjustment mechanism 15 Gas supply means 16 High frequency power supply 17 Matching circuit 18 Elevation Mechanism 19 Supply port 20 Exhaust port 21 V groove 22 Exhaust groove 23 Introduction terminal P Plasma generation region P1 High density plasma region

Claims (8)

  A ring electrode is provided with a predetermined gap with respect to the outer peripheral portion of the semiconductor wafer, a process gas in the vicinity of atmospheric pressure in which a reaction gas is mixed with an inert gas is supplied to the gap, and between the semiconductor wafer and the ring electrode. A high-frequency voltage is applied to the semiconductor wafer to generate a plasma that is localized in the vicinity of the outer periphery of the semiconductor wafer and substantially uniformly over the entire periphery of the semiconductor wafer. A method for processing an outer peripheral portion of a semiconductor wafer, characterized by vaporizing and removing a volatile substance generated by a radical reaction with constituent atoms and performing a beveling process.   The method of processing an outer peripheral portion of a semiconductor wafer according to claim 1, wherein the semiconductor wafer is a SiC or GaN wafer.   The method for processing an outer peripheral portion of a semiconductor wafer according to claim 1 or 2, wherein a process gas having a pressure of 0.01 to 1 MPa flows through a gap between the semiconductor wafer and the ring electrode. The process gas, the processing method of the semiconductor wafer periphery portion according to any one of claims 1 to 3 mixed gas or SF ₆ in CF ₄ and O ₂ in He is a mixture 0.5 to 20% by volume. A chamber;
A ring electrode fixed inside the chamber and having an insulating layer formed on the inner peripheral surface;
A support that is located inside the ring electrode and holds the semiconductor wafer;
A gap adjusting mechanism for positioning the semiconductor wafer with respect to the support base so as to form a gap having the same width over the entire circumference between the outer peripheral portion of the semiconductor wafer and the inner peripheral surface of the ring electrode;
A gas supply means for supplying a process gas near atmospheric pressure obtained by mixing a reactive gas with an inert gas through the gap;
A high frequency power source for applying a high frequency voltage between the semiconductor wafer and the ring electrode;
The plasma is generated substantially uniformly over the entire periphery of the semiconductor wafer, and neutral radicals based on the reaction gas generated in the plasma and atoms constituting the periphery of the semiconductor wafer. An apparatus for processing an outer peripheral portion of a semiconductor wafer, characterized by vaporizing and removing a volatile substance generated by a radical reaction and performing a beveling process.   A cylindrical surface portion and a flat surface portion are formed on the inner peripheral surface of the ring electrode according to the shapes of the bevel and orientation flat of the outer peripheral portion of the semiconductor wafer, and the cross-sectional shape of the inner peripheral surface of the ring electrode is the outer peripheral portion of the semiconductor wafer. 6. The processing apparatus for an outer peripheral portion of a semiconductor wafer according to claim 5, which has a shape similar to the shape of the semiconductor wafer.   As the gap adjusting mechanism, the inner surface of the ring electrode is tapered as it goes downward, and a support table for holding the semiconductor wafer can be raised and lowered, and the semiconductor wafer is placed on the support table. The semiconductor wafer is automatically centered by bringing the outer periphery of the semiconductor wafer into close contact with the taper surface of the ring electrode, and the semiconductor wafer is sucked to the support by operating the vacuum chuck. 7. The semiconductor wafer peripheral portion processing apparatus according to claim 5, wherein a mechanism for raising the gap to set a predetermined gap is used. The semiconductor wafer is a SiC or GaN wafer, and the process gas is a gas having a pressure of 0.01 to 1 MPa in which a mixed gas of CF ₄ and O ₂ or SF ₆ is mixed in an amount of 0.5 to 20% by volume with He. The processing apparatus of the outer peripheral part of a semiconductor wafer in any one of Claims 5-7.