JP7113554B2 - Semiconductor device manufacturing method and semiconductor substrate - Google Patents

Description

The present invention relates to a semiconductor device manufacturing method and a semiconductor substrate. More specifically, the present invention relates to a semiconductor device manufacturing method for manufacturing a semiconductor device having a thin thickness and a high withstand voltage by using a temporary substrate, and a semiconductor substrate on which a high withstand voltage semiconductor device is formed.

Silicon carbide (SiC) semiconductor substrates with a wide bandgap width have attracted attention as substrates for semiconductor devices for high-voltage applications. FIG. 16(a) shows a cross-sectional structure of a general vertical Schottky diode (91) made of SiC. An active layer 902 is formed by epitaxial growth on a support substrate 901 made of a single crystal, and P-type impurity layers 911 and 912 serving as guard rings and a Schottky electrode 913 are formed in the region of the active layer 902 . A current i flows between the Schottky electrode 913 and the back electrode 903 formed on the bottom surface of the support substrate 901 .
In addition, FIG. 4(b) shows a cross-sectional structure of a general vertical structure MOSFET (92) made of SiC. An active layer 902 is formed by epitaxial growth on a supporting substrate 901 made of a single crystal, and a source 921, a drain 922 and a gate 923 are formed in the active layer 902 region. A gate 923 controls the conduction and interruption of current between the source 921 and the drain 922 . A drain current i during conduction flows between the drain 922 and the back surface electrode 903 formed on the bottom surface of the support substrate 901 .
Further, FIG. 9(c) shows a cross-sectional structure of a MOSFET (94) in which a single-crystal buffer layer 904 with a high nitrogen concentration is provided at the initial stage of forming an active layer 902 by epitaxial growth. The single crystal buffer layer 904 is formed to make the crystal defect density of the epitaxial layer lower than that of the support substrate 901 .
The support substrate 901 is a region in which current flows in the vertical direction (vertical direction in the drawing), and has a low resistivity of 20 mΩ·cm or less. On the other hand, since the active layer 902 needs to withstand a high voltage, it has a resistivity higher than that of the supporting substrate 901 by two to three orders of magnitude. Since a semiconductor element using SiC has a large bandgap width, it is characterized in that the thickness of the active layer 902 can be made as thin as about 5 to 10 μm. Since the active layer 902 is formed by epitaxial growth on the supporting substrate 901, its crystallinity depends on the underlying supporting substrate 901. FIG. Therefore, the SiC crystal quality of the support substrate 901 is important. The thickness of the supporting substrate 901 is required to be approximately 300 μm for a 6-inch substrate in order to prevent cracking during handling of the single crystal substrate. After elements are formed on the front surface of the substrate, the back surface is ground to reduce the thickness to 100 μm or less in order to reduce the resistance of the support substrate.

Since SiC is a compound composed of carbon and silicon having different lattice constants, many crystal defects occur in the element substrate. In particular, crystal defects are fatal in power device applications, and various measures have been taken to reduce crystal defects, but this increases the cost of device substrates. Therefore, it is a problem to reduce the crystal defects of the support substrate 901 which is the base of the epitaxially grown active layer 902 and to reduce the cost. Further, in the case of a device having a vertical structure as shown in FIG. 16, the support substrate 901 is made of an N-type semiconductor by adding high-concentration nitrogen to lower the resistivity. In addition, the resistance of the supporting substrate layer is further reduced by thinning the supporting substrate 901 after element formation.
In this way, an expensive single crystal substrate is used as the substrate of the semiconductor device, and the thickness of the single crystal substrate is not thickened for the active layer, but for the handling of the substrate in the device formation process. It is Furthermore, the current situation is that the substrate is thinned after the device is formed, and most of the single crystal substrate is removed by grinding.

As for the substrate of the semiconductor element made of SiC, only the active layer on the surface layer should be a single crystal. The support substrate layer may be monocrystalline, polycrystalline, or amorphous regardless of crystallinity. Conventionally, there is a substrate manufacturing method in which a single-crystal active layer and a non-single-crystal support substrate layer are bonded. For example, there is a substrate manufacturing method in which amorphous silicon is deposited on a polycrystalline SiC support, the polycrystalline SiC support and a single crystal SiC substrate are bonded, and integrated by direct bonding (see Patent Document 1). ). An example of bonding substrates by a surface activation method is also disclosed (see Patent Document 3).

Special Table No. 2004-503942 Japanese Patent Application Laid-Open No. 2002-280531 JP 2015-15401

As described above, conventional substrates for semiconductor devices for high voltage applications have a thin film layer made of a single crystal formed as an active layer on a support substrate (support layer) having a constant thickness. The active layer is manufactured by epitaxial growth. Since this support substrate may be a single crystal or a polycrystal, a method of bonding a thin single crystal layer and an inexpensive polycrystalline semiconductor substrate by a bonding technique has been proposed (Patent Documents 1, 2, 3, etc.). . However, bonding substrates made of dissimilar materials tend to warp significantly due to differences in thermal expansion coefficients and non-uniformity of crystals, which poses many practical problems.

Also, conventionally, a thick single crystal SiC substrate of about 350 μm is used for handling during processing, and the thickness of the supporting layer is reduced to about 100 μm in order to finally obtain good device characteristics. However, this poses a problem that the expensive single crystal substrate is not fully utilized. Considering that the support layer is ground to be thin after the element is formed, it is conceivable to use a thin substrate as the element substrate in the first place. For example, in the case of SiC device substrates, since the material has a wide bandgap width, the thickness of the substrate is sufficient for the epitaxial layer portion of the surface layer even for high-voltage devices. can be noticed. However, there is a problem that a thin substrate is easily bent and warped greatly.

Further, it is known that even if the crystal defects in the epitaxial layer 902 are reduced by providing a single-crystal buffer layer 904 as shown in FIG. ing. For this reason, it is preferable to remove the single-crystal buffer layer 904 after the device is formed, but removing the single-crystal buffer layer 904 underlying the epitaxial layer 902 on which the MOSFET device is formed is impossible with a general structure. is.

SUMMARY OF THE INVENTION The present invention has been made in view of the above-mentioned current situation, and provides a method for manufacturing a semiconductor device that is thin and has a high breakdown voltage by using a provisional substrate, and a semiconductor device that has a high breakdown voltage. It is an object of the present invention to provide a semiconductor substrate with a

The present invention is as follows.
1. A second substrate having a surface thin film layer made of one or more thin films of an insulating material or a semiconductor material formed on at least one plane thereof, and a surface of the surface thin film layer formed on the second substrate. a first single-crystal layer made of a single crystal of a first semiconductor material and having a predetermined thickness bonded to the first single-crystal layer; and a second single-crystal layer made of a single crystal of a second semiconductor material formed on the first single-crystal layer. a single crystal layer, a semiconductor element formed on the second single crystal layer, and a buffer layer made of a semiconductor material further formed on the one plane side of the second substrate as the surface thin film layer. A semiconductor substrate comprising:
2. 1. A silicon oxide film or a semiconductor film containing Ga is formed on the one plane of the second substrate as the surface thin film layer. A semiconductor substrate as described.
3. 1. The second substrate is a substrate that transmits light, and the surface thin film layer is a semiconductor material containing Ga. 3. The semiconductor substrate according to 2.
4. 1. The second substrate is a substrate made of sapphire or SiC. to 3. The semiconductor substrate according to any one of 1.
5. 1. wherein said first semiconductor material is one of SiC, GaN and gallium oxide, and said second semiconductor material is one of SiC, GaN and gallium oxide; to 4. The semiconductor substrate according to any one of 1.
6. a first deposition step of depositing a surface thin film layer comprising one or more thin films of an insulating material or a semiconductor material on at least one plane of a second substrate; a bonding step of bonding one plane of the substrate and the surface of the surface thin film layer formed on the second substrate; and the first substrate at a predetermined depth from the one plane of the first substrate. a separating step of leaving the one plane side of the first substrate as a first single crystal layer on the surface thin film layer formed on the second substrate by separating the substrate of the first substrate; A second film forming step of forming a second single crystal layer made of a single crystal of a second semiconductor material on the single crystal layer; and an element forming step of forming a semiconductor element in the second single crystal layer. 1. A method for manufacturing a semiconductor device, wherein in said first film forming step, a buffer layer made of a semiconductor material is further formed as said surface thin film layer on said one plane side of said second substrate.
7. a hydrogen layer forming step of forming a hydrogen-implanted layer at a predetermined depth from the one plane of the first substrate; leaving the first single crystal layer on the surface thin film layer formed on the second substrate, and forming the surface thin film layer and the first single crystal layer on the second substrate by the second film forming step; and the second single crystal layer are laminated in order to form a multi-layer substrate. A method of manufacturing the semiconductor device described.
8. 6. forming a silicon oxide film or a semiconductor film containing Ga on the one plane of the second substrate as the surface thin film layer; or 7. 3. A method for manufacturing the semiconductor device according to 1.
9. 6. The second substrate is a substrate that transmits light, and the surface thin film layer is a semiconductor material containing Ga. to 8. A method for manufacturing a semiconductor device according to any one of the above.
10. 6. The second substrate is a substrate made of sapphire or SiC. to 9. A method for manufacturing a semiconductor device according to any one of the above.
11. 6. Said first semiconductor material is one of SiC, GaN and gallium oxide, and said second semiconductor material is one of SiC, GaN and gallium oxide. to 10. A method for manufacturing a semiconductor device according to any one of the above.
For reference, the method for manufacturing a semiconductor device of the present disclosure can be configured as follows.
( 1 ) a first film forming step of forming a surface thin film layer comprising one or more thin films of an insulating material or a semiconductor material on at least one plane of a second substrate to be used as a temporary supporting substrate; a bonding step of bonding one plane of a first substrate made of a single crystal of a semiconductor material and a surface of the surface thin film layer formed on the second substrate; The surface thin film layer formed on the second substrate by separating the first substrate at a predetermined depth from the plane so that the one plane side of the first substrate serves as a first single crystal layer. a second film forming step of forming a second single crystal layer made of a single crystal of a second semiconductor material on the first single crystal layer; and a semiconductor element on the second single crystal layer. a second bonding step of bonding a third substrate onto the second single crystal layer on which the semiconductor element is formed; and after bonding the third substrate, the second substrate and a substrate removing step of removing the first film forming step, further forming a buffer layer made of a semiconductor material on the one plane side of the second substrate as the surface thin film layer. A method of manufacturing a semiconductor device to
( 2 ) The method of manufacturing a semiconductor device according to ( 1 ) , wherein in the substrate removing step, the surface thin film layer is further removed and the first single crystal layer is further removed.
( 3 ) including a hydrogen layer forming step of forming a hydrogen-implanted layer to a predetermined depth from the one plane of the first substrate, and separating the first substrate by the hydrogen-implanted layer in the separating step; Thus, the first single crystal layer is left on the surface thin film layer formed on the second substrate, and the second film formation step forms the surface thin film layer and the first single crystal layer on the second substrate. The method for manufacturing a semiconductor device according to ( 1 ) or ( 2 ) above, wherein a multilayer substrate is formed in which a single crystal layer and the second single crystal layer are laminated in order.
( 4 ) In the second film forming step, the second single crystal layer is formed after forming a single crystal buffer layer made of a single crystal of the second semiconductor material, and in the substrate removing step, the single crystal The method for manufacturing a semiconductor device according to any one of ( 1 ) to ( 3 ) , wherein the buffer layer is further removed.
( 5 ) The method of manufacturing a semiconductor device according to any one of ( 1 ) to ( 4 ) , including a silicide layer forming step of forming a silicide layer on the one plane of the first substrate.
( 6 ) In the first film forming step, a silicon oxide film or a compound semiconductor film containing Ga is formed as the surface thin film layer on the one plane of the second substrate according to ( 1 ) to ( 5 ) . A method for manufacturing a semiconductor device according to any one of the above.
( 7 ) Any one of ( 1 ) to ( 6 ) , wherein in the first film forming step, a polycrystalline SiC film made of polycrystalline SiC is formed on the other plane of the second substrate as the surface thin film layer. 2. A method of manufacturing a semiconductor device according to claim 1.
( 8 ) The second substrate is a substrate that transmits light, the surface thin film layer is a semiconductor material containing Ga, and in the substrate removal step, a laser beam is irradiated from the second substrate side to form Ga. The method for manufacturing a semiconductor device according to any one of ( 1 ) to ( 7 ) , wherein the second substrate is removed by depositing .
( 9 ) The method of manufacturing a semiconductor device according to any one of ( 1 ) to ( 8 ) , wherein the second substrate is a substrate made of sapphire or SiC.
( 10 ) The second substrate is a substrate made of carbon, and in the first film forming step, the surface thin film layer is formed so as to cover the side surface of the second substrate ( 1 ) to ( 7 ) A method for manufacturing a semiconductor device according to any one of (7).
( 11 ) The method of manufacturing a semiconductor device according to any one of ( 1 ) to ( 10 ) , wherein the third substrate is a metal substrate.
( 12 ) The method of manufacturing a semiconductor device according to any one of ( 1 ) to ( 10 ) , wherein the third substrate is made of one of alkali-free glass, sapphire and Si.
( 13 ) The method for manufacturing a semiconductor device according to any one of ( 1 ) to ( 12 ) , comprising a back electrode forming step of forming a back electrode layer of the semiconductor device on the surface exposed by the substrate removing step. .
( 14 ) The method according to ( 12 ) or ( 13 ) , further comprising, after the second bonding step or the substrate removing step, forming a through-hole in the third substrate to form an electrode portion of the semiconductor element. A method of manufacturing a semiconductor device according to claim 1.
( 15 ) The method of manufacturing a semiconductor element according to ( 14 ) , wherein in the opening step, the through hole is formed in a tapered shape expanding toward the surface side of the third substrate.
( 16 ) The first semiconductor material is one of SiC, GaN and gallium oxide, and the second semiconductor material is one of SiC , GaN and gallium oxide. 15 ) A method for manufacturing a semiconductor device according to any one of 15).

A method of manufacturing a semiconductor device according to the present invention comprises a second film forming step of forming a second single crystal layer made of a single crystal of a second semiconductor material on a second substrate to be used as a temporary support substrate; and an element forming step of forming a semiconductor element in the second single crystal layer. Therefore, a multi-layer substrate having the second single crystal layer formed on the second substrate as a base can be obtained, and the substrate can withstand high temperatures and has little warpage. As a result, in the element formation step, a semiconductor element can be formed in the second single crystal layer using a general-purpose photolithography apparatus or the like. In particular, since a semiconductor such as SiC suitable for high power applications has a small impurity diffusion coefficient, it is difficult to dope both N-type and P-type impurities by thermal diffusion. In addition, self-alignment processing by thermal diffusion as in the Si semiconductor manufacturing process is impossible. Therefore, a high-precision exposure machine such as a stepper is required to determine the doping positions of the N-type and P-type impurities, and the warpage and bending of the semiconductor substrate must be suppressed to about 20 μm or less. Since warping and bending of the multilayer substrate can be suppressed to a small extent by the second substrate, it is possible to use a stepper to form a semiconductor element composed of an impurity region or the like in the second single crystal layer.
For reference , this method of manufacturing a semiconductor device includes a second bonding step of bonding a third substrate onto the second single crystal layer on which the semiconductor device is formed, and a substrate removing step of removing the second substrate. , can be provided . Therefore, the second substrate used for forming the semiconductor element can be removed after bonding the third substrate, which is the final support substrate for the semiconductor element. This makes it possible to provide the back electrode of the semiconductor element on the exposed back surface.

a bonding step of bonding one plane of a first substrate made of a single crystal of a first semiconductor material to the second substrate; a separating step of leaving the one plane side of the first substrate as a first single crystal layer on the second substrate by separating the substrates of the When the second single crystal layer is formed on the first single crystal layer formed on the second substrate, the thin first single crystal layer and the thin second single crystal layer are formed on the second substrate as a base. A multilayer substrate in which layers are laminated is obtained, and the amount of the first substrate made of a single crystal of the first semiconductor material (eg, SiC) can be minimized. Conventionally, as a semiconductor substrate for general high-power applications, a single-crystal SiC substrate having a thickness of about 350 μm and having a high concentration of N-type is used as a support layer, and a single crystal having a thickness of about 5 μm is grown epitaxially thereon. A SiC layer (low-concentration N-type layer) is formed. Then, after semiconductor elements are formed on the single-crystal SiC layer, the substrate is polished to a thickness of about 100 μm in order to reduce the resistance value of the support layer portion, and then electrodes are processed on the rear surface of the substrate. . According to the method of manufacturing a semiconductor device of the present invention, the first single crystal layer constitutes the N-type layer, and the thickness thereof can be reduced to about 0.5 μm. On top of this, a second single crystal layer having a necessary thickness and a necessary impurity concentration can be formed by epitaxial growth or MOCVD (Metal Organic Chemical Vapor Deposition) from the standpoint of withstand voltage of the semiconductor element.
In the substrate removing step, when the first single crystal layer is further removed, a back electrode of the semiconductor element can be provided on the exposed surface of the second single crystal layer.

a hydrogen layer forming step of forming a hydrogen-implanted layer to a predetermined depth from the one plane of the first substrate; and one or more layers of an insulating material or a semiconductor material on at least one plane of the second substrate. and a first film forming step of forming a surface thin film layer composed of a thin film, wherein the surface thin film layer formed on the one plane of the first substrate and the second substrate in the bonding step. and, in the separating step, separating the first substrate by the hydrogen-implanted layer, so that the first single crystal layer is formed on the surface thin film layer formed on the second substrate. However, in the case where the surface thin film layer, the first single crystal layer, and the second single crystal layer are laminated in order on the second substrate by the second film formation step, a multi-layer substrate is formed . can easily bond the first substrate to the second substrate on which the surface thin film layer is formed. In addition, the first substrate can be easily separated at the hydrogen-implanted layer, and the thin first single crystal layer can be left on the second substrate. For reference, the surface thin film layer can be removed in the substrate removing step, and the back electrode of the semiconductor device can be provided on the surface of the first single crystal layer exposed thereby.

For reference, in the second film formation step, the second single crystal layer is formed after forming a single crystal buffer layer made of a single crystal of the second semiconductor material, and in the substrate removal step, the single crystal buffer layer is formed. If the buffer layer is further removed, the crystal defect density of the second single crystal layer formed on the single crystal buffer layer can be reduced. After the third substrate, which serves as a support substrate for the semiconductor element, is bonded, the second substrate used for forming the semiconductor element is removed, and the single-crystal buffer layer is also removed. Even if a forward current flows through the PN junction, it is possible to suppress an increase in defects due to recombination of minority carriers.

For reference, when the silicide layer forming step of forming a silicide layer on the one plane of the first substrate is included, the silicidation treatment is not required when forming the back electrode layer of the semiconductor element with metal later. It is possible to simplify the heat treatment at the time of forming the back electrode.

In the first film forming step, when a silicon oxide film or a compound semiconductor film containing Ga is formed as the surface thin film layer on one plane of the second substrate, the first substrate in the bonding step and bonding, removal of the second substrate in the substrate removal step, and removal of the surface thin film layer after removal of the second substrate can be facilitated. In addition, by combining the surface thin film layer and the second single crystal layer laminated thereon, it is possible to form a substrate for an element which can withstand high temperatures as a multi-layer substrate and has little warpage.

In the first film forming step, a buffer layer made of a semiconductor material is further formed as the surface thin film layer on the one plane side of the second substrate. It is possible to form a surface thin film layer consisting of two layers, one layer and a buffer layer as a second layer.

For reference, when a polycrystalline SiC film made of polycrystals of SiC is formed on the other plane of the second substrate as the surface thin film layer in the first film forming step, the surface thin film layer forms the second surface thin film layer. The entire surface of the second substrate can be covered, and the second substrate can be protected from high-temperature processing or the like during the formation of semiconductor elements. In addition, by adjusting the film thickness of the polycrystalline SiC layer, even if the thickness of the second substrate is reduced, the stress on both surfaces can be balanced, so that a thin multi-layer substrate with little warpage can be obtained. .
In the first film formation step as described above, if the edge of the second substrate is chamfered, a surface thin film layer is formed on the plane of the second substrate so that the thickness is uniform to the edge of the plate. It can be formed into a film and can be bonded to the first substrate without polishing its surface.

When the second substrate is a substrate that transmits light, and the surface thin film layer is a semiconductor material containing Ga, in the substrate removal step, laser light is irradiated from the second substrate side. The second substrate can be easily removed by depositing Ga. The removed second substrate can be reused after removing the Ga-containing material residue.

When the second substrate is a substrate made of sapphire or SiC, it can be used as a base of the multilayer substrate for element formation, which can withstand high temperatures and has little warpage.
For reference, when the second substrate is a substrate made of carbon and the surface thin film layer is formed so as to cover the side surface of the second substrate in the first film forming step, carbon Since the entire surface of the substrate is covered with the surface thin film layer, it is possible to protect the carbon from being burnt out in an environment of high temperature and oxygen. As a result, high-temperature heat treatment, high-density oxygen-containing film formation, and the like can be performed in the device formation process. Also, even if the thickness of the carbon substrate is reduced, the stresses on both sides can be balanced, so that a thin multilayer substrate with little warpage can be obtained.

For reference, when the third substrate is a metal substrate, the metal substrate that serves as the support substrate for the semiconductor element can be used as it is as an electrode terminal for external connection. For example, when the semiconductor element is a Schottky diode, the metal substrate can be used as the anode electrode, and the cathode electrode can be formed on the surface from which the second substrate has been removed. Moreover, when the semiconductor element is a MOSFET, the metal substrate can be used as the source electrode as it is. In these cases, it becomes easy to mount the metal substrate on the mounting substrate after element division.

For reference, when the third substrate is made of one of non-alkali glass, sapphire, and Si, it is easy to bond and suitable as a support substrate for semiconductor devices.
Further, in the case of providing the back electrode forming step of forming the back electrode layer of the semiconductor element on the surface exposed by the substrate removing step, the surface exposed after removing the second substrate (first single crystal layer, buffer layer or second monocrystalline layer) can be provided with a back electrode layer.

For reference, in the case of providing a hole opening step of forming a through-hole to be an electrode portion of the semiconductor element in the third substrate after the second bonding step or the substrate removing step, when mounting the semiconductor element electrode wiring can be facilitated.
Further , in the opening step, when the through-hole is formed in a tapered shape expanding toward the surface side of the third substrate, a wiring made of aluminum or the like is formed on the wall surface of the through-hole which is inclined. It is possible to form electrical wiring on the surface of the third substrate.

When the first semiconductor material is one of SiC, GaN, and gallium oxide, and the second semiconductor material is one of SiC, GaN, and gallium oxide, a first semiconductor material having a large bandgap is used. Since a second single crystal layer made of a second semiconductor material having a large bandgap is deposited on one single crystal layer, SiC devices, GaN devices, gallium oxide devices, etc. suitable for high power applications can be used. can be manufactured. For example, if the first semiconductor material and the second semiconductor material are SiC, single-crystal SiC layers are stacked, which is more preferable.

For reference, according to the semiconductor substrate of the present invention, a supporting substrate made of one of an insulating material, a semiconductor material, and a metal, and a second semiconductor material layered on the supporting substrate with a bonding layer interposed therebetween. A second single crystal layer made of crystals may be provided, a semiconductor element may be formed on the second single crystal layer, and a back electrode layer of the semiconductor element may be provided on the second single crystal layer. Since the back electrode layer of the semiconductor element is formed directly on the second single crystal layer, it has excellent conductivity. Moreover, if the buffer layer is formed of a polycrystalline layer containing a high nitrogen concentration, a lower ohmic contact can be obtained.

According to the semiconductor substrate of the present invention, since the first single crystal layer made of the single crystal of the first semiconductor material is provided on the second single crystal layer, the first single crystal made of the single crystal of the first semiconductor material is provided. A low-cost semiconductor substrate can be obtained by minimizing the thickness of the layers. In addition, the second single-crystal layer is formed with a necessary thickness and a necessary impurity concentration in terms of the breakdown voltage of the semiconductor element, and the supporting substrate, which is a permanent supporting layer of the semiconductor substrate, can have an arbitrary thickness. can. Further, since the back electrode layer can be provided on the first single crystal layer or on a buffer layer made of a semiconductor material provided on the first single crystal layer, the electrical conductivity in the vertical direction is reduced . It has excellent thermal conductivity and is suitable for semiconductor devices for high power applications.
When the first semiconductor material is one of SiC, GaN, and gallium oxide, and the second semiconductor material is one of SiC, GaN, and gallium oxide, a first semiconductor material having a large bandgap is used. Since a second single crystal layer made of a second semiconductor material having a large bandgap is deposited on one single crystal layer, SiC devices, GaN devices, gallium oxide devices, etc. suitable for high power applications are possible. is formed on the semiconductor substrate.

Schematic top view and side view showing a first substrate and a second substrate Schematic cross-sectional view showing the configuration of a multilayer substrate for element formation Cross-sectional image of the edge of the second substrate (carbon substrate) coated with the surface thin film layer Schematic cross-sectional view showing a step of forming a multilayer substrate using a second substrate having surface thin film layers formed on both sides as a base. Schematic cross-sectional view showing a semiconductor element formed in a second single crystal layer constituting a multilayer substrate. Schematic cross-sectional view showing a step of bonding a third substrate and forming a through-hole after forming a semiconductor element; Schematic cross-sectional view showing another semiconductor element formed in a second single crystal layer constituting a multilayer substrate Schematic cross-sectional view showing a step of forming a tapered through-hole by bonding a third substrate after forming another semiconductor element. Schematic cross-sectional view showing a step of removing the second substrate from the multilayer substrate to which the third substrate is bonded and forming a back electrode layer to be a back electrode. Schematic cross-sectional view showing a step of removing the second substrate and the first layer of the surface thin film layer from the multilayer substrate to which the third substrate is bonded, and forming the back electrode layer on the buffer layer. Schematic cross-sectional views showing the manufacturing process of a Schottky diode Schematic cross-sectional views showing manufacturing steps of a MOSFET Schematic cross-sectional view showing a manufacturing process of a semiconductor substrate (MOSFET element) using a metal supporting substrate Schematic cross-sectional view showing the basic structure of a semiconductor substrate Schematic cross-sectional view showing the structure of a semiconductor substrate Schematic cross-sectional view showing the structure of a general vertical semiconductor device

In the method for manufacturing a semiconductor device according to the present embodiment, for example, a carbon substrate, a SiC substrate, or the like is used as a provisional support substrate (second substrate (2)) to manufacture a semiconductor device suitable for high-power applications. It is manufactured. Carbon substrates and SiC substrates are characterized in that they have little warpage and can withstand high temperatures. In the present embodiment, the carbon substrate (2) or the like is used as a temporary support layer, and a single crystal layer such as SiC (first single crystal layer (11 )), and then form a thin film layer (second single crystal layer (5)) made of single crystal such as SiC for forming a semiconductor element (see FIGS. 2A and 2B). A polycrystalline film (polycrystalline SiC film (42)) made of SiC or the like can be formed on the other surface of the carbon substrate (2). A semiconductor element can be formed on the second single crystal layer (5) by using the multi-layer substrate (6) formed on the basis of the carbon substrate (2) or the like in this way. After the formation of the semiconductor element, a substrate (third substrate (3)) that will be the final supporting layer is bonded, and the temporary substrate such as the carbon substrate (2) is removed. This makes it possible to manufacture a semiconductor substrate in which the third substrate (3) is used as a permanent support layer and semiconductor elements are formed on the second single crystal layer (5) laminated thereon. Further, on the back surface of the semiconductor element (the surface from which the carbon substrate or the like has been removed and the silicon oxide film has been removed), a back electrode layer that serves as the back electrode of the semiconductor element can be formed. This allows the fabrication of semiconductor devices and semiconductor substrates suitable for high power applications.
The carbon substrate (2) can have a coefficient of thermal expansion substantially equal to that of the second single crystal layer (5) made of SiC and the polycrystalline SiC film (42) made of SiC. Also, if the thickness of the carbon substrate (2) is set to several millimeters, it is possible to obtain a multi-layer substrate (6) with high rigidity and no warp. Furthermore, if the thickness of the second single crystal layer (5) made of SiC laminated on one surface of the carbon substrate (2) and the thickness of the polycrystalline SiC film (42) formed on the other surface are approximately the same. For example, even if the thickness of the carbon substrate (2) is 1 mm or less, a multilayer substrate (6) with little warpage can be obtained.

The carbon substrate (2) is formed by forming a silicon oxide film (41), forming a polycrystalline SiC film (42), bonding a first single crystal layer (11), and forming a second single crystal layer (5). It plays a role of a base from film formation to formation of the above semiconductor element. After bonding the third substrate (3) to the multi-layered substrate (6), the carbon substrate (2) and the silicon oxide film (41) are removed to form the back surface of the multi-layered substrate (6). , the first single crystal layer (11) is exposed and can form the back electrode of the semiconductor device. After that, the third substrate (3) plays the role of the supporting substrate, which is the base. In the conventional structure (see FIG. 16), a single crystal layer for forming a semiconductor element is provided on a thick support substrate made of single crystal, and the support substrate is further processed to be thin. According to the manufacturing method of the present invention, the conventional support substrate can be eliminated, and the thinning process can be eliminated. In addition, a high-quality second single crystal layer (5) can be formed as an active layer of a semiconductor element on the first single crystal layer (11) made of a single crystal with good crystallinity. By taking advantage of the characteristics of each layer in this way, it is possible to facilitate the formation of semiconductor elements and reduce the cost.

A single-crystal single-crystal buffer layer (52) containing high-concentration nitrogen is formed on a first single-crystal layer (11) formed on a carbon substrate (2) or the like as a base, and then a second single-crystal layer ( 5) may be formed. The single crystal buffer layer (52) can reduce crystal defects in the second single crystal layer (5) from crystal defects in the first single crystal layer (11). After bonding the third substrate (3) to the multi-layer substrate (6) thus formed, the carbon substrate (2) and the silicon oxide film (41) are removed, and further the first single crystal layer is formed. By removing (11) and the single crystal buffer layer (52), the second single crystal (5) is exposed on the back surface of the multilayer substrate (6), and a back electrode of the semiconductor element is formed on the back surface. be able to.

After forming the semiconductor device, the third substrate (3), which will be the final supporting layer of the semiconductor device, is bonded, and the second substrate (2), which was a provisional substrate, is removed. When the third substrate (3) is a metal substrate, the third substrate (3) can be used as electrode terminals for external connection of the semiconductor element. For example, if the semiconductor element is a Schottky diode, it can be its anode electrode. Moreover, in the case of a MOSFET, it can be used as its source electrode.

As the second substrate (2), a substrate that transmits laser light, such as a SiC substrate (25) or a sapphire substrate (26), can be used. In that case, it is preferable to form a surface thin film layer (for example, a GaN film (413)) with a semiconductor material containing Ga. By doing so, Ga can be precipitated by irradiating laser light, and the second substrate (2) can be easily removed. A SiC substrate or a sapphire substrate can be repeatedly used as the second substrate (2) after removing the Ga-based thin film.

Hereinafter, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.
As shown in FIGS. 1, 2, 4, 6, etc., the method of manufacturing a semiconductor device according to the present embodiment is a first substrate 1 made of a single crystal of a first semiconductor material. a hydrogen layer forming step of forming a hydrogen-implanted layer 15 on the second substrate 2; a film formation step, a bonding step of bonding one plane 101 of the first substrate 1 and the surface of the surface thin film layer 4 formed on the second substrate 2 , and a hydrogen-implanted layer 15 on the first substrate 1 . a separation step of leaving one plane 101 side of the separated first substrate 1 as the first single crystal layer 11 on the surface thin film layer 4 formed on the second substrate 2 by separating in ing. Then, a second single-crystal layer 5 made of a single crystal of a second semiconductor material is formed on the surface of the first single-crystal layer 11 , so that the surface thin film layer 4 and the first single crystal layer 4 are formed on the second substrate 2 . A second film formation step of obtaining a multilayer substrate 6 in which a crystal layer 11 and a second single crystal layer 5 are laminated in order, and an element formation step of forming a semiconductor element in the second single crystal layer 5 of the multilayer substrate 6. , is equipped with Furthermore, a second bonding step of bonding the third substrate 3 to the surface of the multilayer substrate 6 on which the semiconductor elements are formed, and a substrate removing step of removing the second substrate 2 are provided.
In the first film forming step, the surface thin film layer 41 can be formed on one plane 201 of the second substrate 2 . Also, the surface thin film layer 42 can be formed on the other plane 202 of the second substrate 2 .

In the second film formation step, a single crystal buffer layer 52 made of a single crystal of a second semiconductor material is formed on the surface of the first single crystal layer 11, and then the second single crystal layer 5 is formed. The removal step can be such that the monocrystalline buffer layer 52 is removed after the second substrate 2 is removed. The single crystal buffer layer 52 can be formed, for example, from a single crystal of a second semiconductor material containing nitrogen at a high concentration.

SiC will be described below as an example of the first semiconductor material and the second semiconductor material. That is, the first substrate 1 is assumed to be a single crystal SiC substrate. A carbon substrate is used as the second substrate 2, and the surface thin film layer 41 formed on one surface 201 thereof is a silicon oxide film (SiO ₂ ). Moreover, the material of the surface thin film layer 42 formed on the other surface 202 is preferably the same as the second semiconductor material, and its crystallinity is not critical. Below, the surface thin film layer 42 is assumed to be a polycrystalline SiC film made of polycrystalline SiC.
1A is a top view and a side view showing an example of a carbon substrate 2, a silicon oxide film 41, a polycrystalline SiC film 42, and a single-crystal SiC substrate 1 serving as a base material for the first single-crystal layer 11. FIG. One plane of the carbon substrate 2 is a top surface 201 , the other plane is a bottom surface (or back surface) 202 , and the entire side surface is a side surface 203 . In this figure, a silicon oxide film 41 is formed on the upper surface 201 and the side surface 203 of the carbon substrate 2 (the side surface 203 is not shown), and a polycrystalline SiC film 42 is formed on the lower surface 202 and the side surface 203 of the carbon substrate 1. (the side surface 203 is not shown), showing a state in which a hydrogen-implanted layer 15 is formed at a predetermined depth from the lower surface 101 of the single-crystal SiC substrate 1 . The carbon substrate 2 and the single-crystal SiC substrate 1 may be of any shape, but they are preferably disc-shaped or columnar substrates. Also, the sizes of the carbon substrate 2 and the single-crystal SiC substrate 1 are not limited, but the carbon substrate 2 is one size larger than the single-crystal SiC substrate 1 in terms of handleability. It is preferable that the diameter of carbon substrate 2 is larger than the diameter of single crystal SiC substrate 1 by about 1 to 10 mm. For example, if the single crystal SiC substrate 1 has an outer diameter of 6 inches (about 150 mm), the carbon substrate 2 may have an outer diameter of about 160 mm.
In the bonding step, the surface of the silicon oxide film 41 provided on the surface 201 of the carbon substrate 2 and the lower surface 101 of the single crystal SiC substrate 1 are bonded.

FIG. 1(b) shows an example in which a SiC substrate (or sapphire substrate) 25 is used as the second substrate, and a GaN film 413 is formed as a surface thin film layer on one surface 201 thereof. Since SiC is stable in an atmosphere such as oxygen, it is not necessary to form a surface thin film layer on the lower surface 202 . In the bonding step, the surface of the GaN film 413 formed on the SiC substrate 25 and the bottom surface 101 of the single crystal SiC substrate 1 are bonded. The diameter of SiC substrate 25 is preferably larger than the diameter of single crystal SiC substrate 1 by about 1 mm.

2A and 2B show a surface thin film layer 41, a first single crystal layer (single crystal SiC layer) 11 and a second single crystal layer (single crystal SiC layer) on one surface 201 of the carbon substrate 2. FIGS. 5 is a schematic cross-sectional view showing a multilayer substrate 6 in which 5 are laminated in order. The multi-layer substrate 6 (6a) shown in FIG. 2(a) has a silicon oxide film 41 as a surface thin film layer, a first single crystal layer 11 and a second single crystal layer 5 on an upper surface 201 of a carbon substrate 2. A polycrystalline SiC film 42 is formed on the other surface (lower surface) 202 of the carbon substrate 2 . In the manufacturing process of this multilayer substrate 6, first, a silicon oxide film 41 is formed on the upper surface 201 and side surfaces 203 of the carbon substrate 2, and then a polycrystalline SiC film 42 is formed on the lower surface 202 and side surfaces 203 of the carbon substrate 2. filmed. Then, the carbon substrate 2 and the first single crystal layer 11 (single crystal SiC substrate 1) are bonded via the silicon oxide film 41, and the SiC layer ( 5, 51) are deposited to form a multilayer substrate 6a. Since the diameter of the first substrate 1 is smaller than the diameter of the carbon substrate 2 when forming the second single-crystal layer 5 made of SiC, the second single-crystal layer 11 is formed on the upper surface of the first single-crystal layer 11 . Although the single crystal layer 5 is formed, a layer made of polycrystal ( A second polycrystalline layer) 51 is formed.

The surface thin film layer formed on one surface 201 of the second substrate 2 can be composed of two layers of thin films. The multilayer substrate 6 (6b) shown in FIG. 2(b) is different from the multilayer substrate 6a shown in FIG. different. In the multilayer substrate 6b, a silicon oxide film 41 is formed as a first layer on the upper surface 201 of the carbon substrate 2, and a SiC layer is formed thereon as a second layer (a buffer layer made of a semiconductor material). . This SiC layer is made of polycrystal. The multi-layered substrate 6b provided with a buffer layer includes, on the upper surface 201 of the carbon substrate 2, a silicon oxide film 41 as a surface thin film layer, a buffer layer 412 made of SiC polycrystal, a first single crystal layer 11 and a second single crystal. layer 5 are formed in this order, and a polycrystalline SiC film 42 is formed on the other surface (lower surface) 202 of the carbon substrate 2 . The side surface 203 side of the carbon substrate 2 is covered with a silicon oxide film 41 , a buffer layer 412 made of SiC polycrystal, and a polycrystalline SiC film 42 .

The buffer layer 412 may be a nitrogen-rich polycrystalline SiC layer. By forming a polycrystalline SiC layer with a high nitrogen concentration, it is possible to improve the ohmic contact when forming the rear surface electrode later. Between the high-nitrogen concentration polycrystalline SiC layer and the first single crystal layer 11, there is a possibility that an ohmic connection may be hindered due to a potential barrier caused by a difference in band width. In that case, the extremely thin surface layer of the first single crystal layer 11 may be made to have a high nitrogen concentration before bonding.

FIG. 2(c) shows a multi-layer substrate 6 (6c) in which a SiC substrate (or sapphire substrate) 25 is used as the second substrate, and a GaN film 413 is formed as a surface thin film layer on one surface 201 thereof. is shown. The multi-layer substrate 6c is constructed by sequentially forming a GaN film 413, a first single crystal layer 11, and a second single crystal layer 5 on an upper surface 201 of a SiC substrate 25. As shown in FIG. Although not shown, a second polycrystalline layer 51 is formed on the peripheral portion when the second single crystal layer 5 is formed.
In the multilayer substrate 6 (6a, 6b, 6c), before forming the second single crystal layer 5 made of SiC, a single crystal buffer layer 52 made of a single crystal of SiC containing a high concentration of nitrogen is formed. may FIG. 2D shows a composite structure in which a single-crystal buffer layer 52 made of a single crystal of a second semiconductor material is formed on the surface of the first single-crystal layer 11, and then a second single-crystal layer 5 is formed. Layer substrate 6 (6d) is shown.
FIG. 2( e ) shows a GaN film 413 , a polycrystalline SiC layer 53 with a high nitrogen concentration as a buffer layer, a first single crystal layer 11 and a second single crystal layer 5 on the upper surface 201 of the SiC substrate 25 . are formed in order to form a multilayer substrate 6 (6e). By forming the polycrystalline SiC layer 53 with a high nitrogen concentration, it is possible to improve the ohmic contact when forming the rear surface electrode later. Between the polycrystalline SiC layer 53 with a high nitrogen concentration and the first single crystal layer 11, there is a possibility that a potential barrier is generated due to a difference in band width, which hinders the ohmic connection. In that case, the extremely thin surface layer of the first single crystal layer 11 may be made to have a high nitrogen concentration before bonding.

(Hydrogen layer forming step)
The first substrate 1 consists of a single crystal of a first semiconductor material. The first semiconductor material is not limited to SiC, and may be SiC, GaN, gallium oxide, or the like, for example. Since the second single crystal layer 5 is formed on the first single crystal layer 11 separated from the first substrate 1 in a later step, the first semiconductor material is the material of the second single crystal layer 5. It is preferably the same as some second semiconductor material or SiC.
The hydrogen layer forming step is a step of forming the hydrogen-implanted layer 15 from the lower surface 101 of the first substrate 1 to a predetermined depth. The hydrogen-implanted layer 15 can be formed by implanting hydrogen ions to the predetermined depth (for example, 0.2 to 1.5 μm, preferably about 0.5 μm).

(Silicide layer forming step)
In the multi-layer substrate 6 (6a, 6b, 6c, 6d, 6e) shown in FIG. 2, a silicide layer can be formed in advance on the surface of the first single crystal layer 11 on the second substrate side. For example, a silicide layer is formed on the lower surface 101 of the first substrate 1 before bonding with the second substrate. By doing so, it is possible to omit the silicidation process when the second substrate is removed later to form the back electrode layer of the semiconductor element.

(First film formation step)
The first film forming step is a step of forming a surface thin film layer 4 made of a thin film of an insulating material or a semiconductor material on at least one plane of the second substrate 2 . The insulating material or semiconductor material to be used may be appropriately selected according to the bondability with the first substrate 1, the need to protect the second substrate 2, etc. Examples include silicon oxide (SiO ₂ ), SiC, GaN, etc. can be mentioned.
When a carbon substrate is used as the second substrate 2, a silicon oxide film 41 or a buffer layer 412 made of silicon oxide film 41 and SiC is formed on one plane 201 of the carbon substrate 2 as the surface thin film layer 4. can be made to In addition, a polycrystalline SiC film ( 42 ) can be formed on the other plane 202 of the carbon substrate 2 . Any of the surface thin film layers 41, 412 and 42 may be formed first. When forming the surface thin film layers (41, 412, 42), the same thin film layers (41, 412, 41) are formed on the side surface 203 of the second substrate 2 as well.
When a sapphire substrate is used as the second substrate 2 , a GaN film or a silicon oxide film can be formed on one plane 201 as the surface thin film layer 4 . Since the sapphire substrate does not need to be protected from heat treatment during the device formation process, it is not necessary to form the surface thin film layer 4 on the other flat surface 202 and side surface 203 .

The same is true when a SiC substrate 25 having optical transparency is used as the second substrate 2 . A semiconductor layer containing Ga (for example, a GaN film, a Ga oxide film) can be formed as the surface thin film layer 4 on one plane 201 of the SiC substrate 25 . Since the SiC substrate 25 also does not need to be protected from the heat treatment in the element formation process, it is not necessary to form the surface thin film layer 4 on the other flat surface 202 and side surface 203 . Moreover, the sapphire substrate and the SiC substrate have rigidity, and warp is also suppressed.

In order to form a semiconductor device for high power applications, a high temperature process of about 1700° C. is required to activate impurities such as nitrogen, phosphorus, and aluminum. A carbon substrate can be used as the second substrate 2 serving as a base for forming the semiconductor element. Carbon is a material that can withstand such high temperatures in inert gas. However, carbon burns out above 400° C. in the presence of oxygen. In order to protect such carbon, a method of covering the entire surface of the carbon substrate 2 can be adopted. Specifically, in the first film forming step, the silicon oxide film 41 covers the upper surface 201 and side surfaces 203 of the carbon substrate 2, and the polycrystalline SiC film 42 is formed so as to cover the lower surface 202 and side surfaces 203 of the carbon substrate 2. A film is preferred. Furthermore, in a later process, the top surface 201 side and side surface 203 side of the carbon substrate 2 are covered with thin film layers (the second single crystal layer 5 and the second polycrystal layer 51) made of a second semiconductor material. In this way, the entire surface of the carbon substrate 2 is covered with the polycrystalline SiC film 42, the second single crystal layer 5, the second polycrystalline layer 51, etc., and the carbon substrate 2 is not exposed to the outside, so that oxygen is not released. Processing can be carried out at the high temperatures that exist. Further, by balancing the thickness of each of these thin films formed on both surfaces of the carbon substrate 2, the warping of the carbon substrate 2 can be made extremely small. The thickness of the polycrystalline SiC film 42 formed on the rear surface 202 of the carbon substrate 2 is formed on the upper surface 201 side of the carbon substrate 2 for the purpose of covering the carbon substrate 2 and reducing warping of the multilayer substrate 6. The thickness of the silicon oxide film 41, etc., which corresponds to the respective thicknesses of the first single crystal layer 11 and the second single crystal layer 5 and is necessary to balance the thicknesses so as not to cause warpage (for example, about 1 to 10 μm). It is possible to In that case, the thickness of the carbon substrate 2 can be set to the minimum necessary thickness (for example, about 250 to 1000 μm) for suppressing warpage and facilitating handling.

FIG. 3 is a cross-sectional image of the substrate edge when the carbon substrate 2 is covered with the silicon oxide film 41 and the polycrystalline SiC film 42 . When the silicon oxide film 41 is formed on the upper surface 201 of the carbon substrate 2 using a thermal CVD apparatus, the silicon oxide film 41 is also formed on the side surface 203 side of the carbon substrate 2 . After that, when the polycrystalline SiC film 42 is formed on the lower surface 202 of the carbon substrate 2 from above with the silicon oxide film 41 facing downward, the polycrystalline SiC film 42 is also formed on the side surface 203 side of the carbon substrate 2 . In FIG. 3, a boundary portion 43 between the polycrystalline SiC film 42 and the silicon oxide film 41 is indicated by a broken line. As described above, unevenness occurs at the edges of the carbon substrate 2 and the film thickness is not constant. It is preferable to make the thickness of the silicon oxide film 41 and the polycrystalline SiC film 42 uniform up to the edge of the carbon substrate 2 by appropriately determining the shape and size of the chamfer.

(Joining process)
In the bonding step, the lower surface 101 of the first substrate (single crystal SiC substrate) 1 and the surface of the surface thin film layer 4 (silicon oxide film 41) formed on the second substrate (carbon substrate) 2 are bonded. It is a process. The bonding method is not particularly limited. For example, bonding can be performed by activating both surfaces with an argon beam or the like. When the surface thin film layer 4 (the silicon oxide film 41 and the buffer layer 412 made of SiC) is formed on the carbon substrate 2, the bonding can be performed in the same manner.

When the second substrate is the SiC substrate 25 (or a sapphire substrate) and the GaN film 413 is formed as the surface thin film layer 4, the lower surface 101 of the first substrate 1 and the SiC substrate 25 are bonded together in the bonding step. is bonded to the surface of the GaN film 413 formed on . The bonding method is not particularly limited. For example, bonding can be performed by activating both surfaces with an argon beam or the like.

(Separation process)
In the separating step, the first substrate is separated from the bonding surface with the second substrate, that is, the lower surface 101 of the first substrate at a predetermined depth, thereby separating the lower surface side of the first substrate from the first single crystal. It is the step of leaving it on the second substrate as a layer. That is, the first single crystal layer having a thickness corresponding to the predetermined depth is left on the second substrate.
For example, the first substrate (single crystal SiC substrate) 1 can be separated by the hydrogen-implanted layer 15 . As a result, the lower surface 101 side of the separated first substrate 1 is left as the first single crystal layer 11 on the surface thin film layer 4 (silicon oxide film 41) formed on the second substrate (carbon substrate) 2. be able to. Separation at the hydrogen-implanted layer 15 is possible by heating the bonded substrates to a high temperature. For example, when the first substrate 1 is a single-crystal SiC substrate, blisters are generated in the hydrogen-implanted layer 15 at 900 to 1000° C., and the single-crystal SiC substrate 1 is separated with the hydrogen-implanted layer 15 as a boundary. .
The same applies when the second substrate is the SiC substrate 25 (or sapphire substrate) and the GaN film 413 is formed as the surface thin film layer 4 .

(Second film formation step)
The second film formation step is a step of forming a second single crystal layer 5 made of a single crystal of a second semiconductor material on a second substrate, which is a temporary support substrate. Specifically, the second single crystal layer 5 made of a single crystal of the second semiconductor material is formed on the surface of the first single crystal layer 11 formed on the second substrate 2 (25). can be done. The second semiconductor material is not particularly limited, and one of SiC, GaN, gallium oxide, and the like can be adopted, for example. In the second film formation step, for example, a silicon oxide film 41 and a single crystal SiC layer (first single crystal layer) 11 are formed on a carbon substrate (second substrate) 2 (second single crystal layer). A multi-layer substrate 6 in which the crystal layer 5 is laminated in order can be obtained. In the second film formation step, the single crystal layer 5 of the second semiconductor material is formed on the first single crystal layer 11, and the portion where the first single crystal layer 11 does not exist (that is, the second substrate 2) is formed. A polycrystalline layer 51 of a second semiconductor material is formed on the outer peripheral portion where the first single crystal layer 11 is absent on the upper surface 201 side of the second substrate 2 and on the side surface 203 side of the second substrate 2 .
The first single crystal layer 11 with good crystallinity is suitable as a base for the second single crystal layer 5 formed thereon. A specific method for forming the second single crystal layer 5 is not particularly limited. For example, the second single crystal layer 5 can be formed on the first single crystal layer 11 by epitaxial growth. Depending on the type of second semiconductor material, it is also possible to deposit the film by the MOCVD method. Since the second single-crystal layer 5 is formed on the first single-crystal layer 11 with good crystallinity, it can be a high-quality single-crystal layer, which is suitable for forming a semiconductor element. The thickness of the second single-crystal layer 5 may be as large as the thickness necessary for the active layer of the semiconductor element (about 5 to 10 μm when the second semiconductor material is SiC).
Through the steps described above, the multilayer substrate 6 shown in FIG. 2 is formed.

In the second film formation step, a single-crystal buffer layer 52 containing nitrogen at a high concentration is formed on the first single-crystal layer 11, and then the second single-crystal layer 5 with a low nitrogen concentration is epitaxially grown. can also

(Element formation process)
The device forming step is a step of forming the semiconductor device 7 on the second single crystal layer 5 which is the surface layer of the multilayer substrate 6 obtained by the second film forming step. The step of forming a semiconductor element is a step of forming an impurity region, an insulator region, a surface electrical wiring region, etc. necessary for forming a desired semiconductor device 7 such as a Schottky diode, MOSFET, or JFET. (See Figures 11 and 12). Since bending and warping of the multilayer substrate 6 are suppressed by the thickness of the carbon substrate 2 and the balance of the thin films formed on both sides thereof, the semiconductor element 7 can be formed using a general-purpose photolithography apparatus.
When the second substrate is a SiC substrate or a sapphire substrate, bending or warping of the multilayer substrate 6 is suppressed by the rigidity of the SiC substrate or the sapphire substrate itself.

(Second bonding step)
The second bonding step is a step of bonding the third substrate 3 to the second single crystal layer 5 side surface of the multilayer substrate 6 on which the semiconductor element 7 is formed by the element forming process. The bonding method of the third substrate 3 is not particularly limited. can be joined together (see FIGS. 6 and 8).
As the third substrate 3, a substrate (31) made of an insulating material such as alkali-free glass or sapphire can be used. Also, as the third substrate 3, a substrate using a semiconductor material such as a Si substrate (32) can be used. When using a non-semiconductor material such as non-alkaline glass or sapphire, for example, an adhesive layer 34 coated with a photocurable adhesive is provided on the surface of the second single crystal layer 5 for which the device formation process has been completed, and the adhesive layer 34 is coated thereon. A third substrate 31 can be attached and bonded by ultraviolet curing. When a Si substrate or the like is used, for example, a TEOS oxide film (Tetra Ethyl Ortho Silicate oxide film) is formed on the surface of the second single crystal layer 5 for which the element forming process is completed, and after planarization, the Si substrate 32 and the silicon substrate 32 are formed. can be spliced. Bonding is possible by plasma activation or the like.

When a metal substrate 33 is used as the third substrate 3, a bonding layer 34 and a metal bonding layer 38 are provided on the surface of the second single crystal layer 5 on which the semiconductor element 7 is formed, and the metal substrate 33 is bonded thereon. (See FIGS. 6(c) and 8(c)). The metal bonding layer 38 may be formed by forming a thick plated layer on a metal such as Ni by sputtering, and after flattening the thick plated layer, metal-to-metal bonding may be performed with the metal substrate 33 . When the metal substrate 33 is used, the hole opening process described below is not necessary.

(Opening process)
After the second bonding step or after the substrate removing step, a hole opening step of forming through holes to be electrode portions of the semiconductor element 7 in the third substrate 3 can be provided. The hole opening step is a step of forming through holes (36, 37) in the third substrate 3 after bonding the multilayer substrate 6 and the third substrate 3 (31, 32) in the second bonding step. (See Figures 6 and 8). When the third substrate 3 is made of non-alkali glass, sapphire, or the like, through holes can be provided at portions required as electrode portions by photolithography. Further, even when the third substrate 3 is made of a semiconductor material such as Si, through holes can be provided by photolithography. In this case, a taper having an angle of 54 degrees can be formed by setting the plane orientation of Si to 100 and performing etching with a KOH solution. By using this taper to form an electrode on the surface of the Si substrate later, it becomes possible to lead the electrode of the semiconductor element to the surface of the Si substrate. This perforation step can also be performed after removing the second substrate 2 from the multilayer substrate 6 .

(Substrate removal step)
The substrate removing step is a step of removing the second substrate (carbon substrate) 2 from the multilayer substrate 6 bonded to the third substrate 3 (see FIGS. 9 and 10). A specific method for removing the substrate is not particularly limited. For example, when the lower surface 202 of the carbon substrate 2 is covered with the polycrystalline SiC film 42, first, the peripheral portion of the multilayer substrate 6 (at least the second polycrystalline layer 51 formed on the side surface 203 side of the carbon substrate 2) , the silicon oxide film 41 and the polycrystalline SiC film 42) are cut away to expose the side portion 203' of the carbon substrate 2. As shown in FIG. After that, the carbon substrate 2 is removed by incineration or the like. Carbon can be easily incinerated at a high temperature of about 500°C. After removing the carbon substrate 2, the remaining surface thin film layer (silicon oxide film) 41 can be removed by acid, dry etching, or the like.

In the substrate removing step, when the second substrate 2 is the sapphire substrate or the SiC substrate 25 and the surface thin film layer is the GaN film 413, the GaN film is removed by irradiating laser light from the second substrate 2 side. Ga can be deposited from 413 and the second substrate 2 can be easily removed. The removed second substrate 2 can be reused as the second substrate 2 after removing the surface thin film layer by etching or the like.
In the substrate removing step, the surface thin film layer 4 remaining after removing the second substrate 2 (carbon substrate, SiC substrate, etc.) may be removed, and further the first single crystal layer 11 may be removed.
Further, when the single-crystal buffer layer 52 is formed before forming the second single-crystal layer 5 (see FIG. 2(d)), the second substrate 2 and the surface thin film layer 41 are removed. Then, the first single crystal layer 11 is exposed on the back surface side of the semiconductor element 7 . In this case, the first single crystal layer 11 and the single crystal buffer layer 52 may be removed. A specific removal method is not particularly limited, and the removal can be performed, for example, by polishing such as CMP.

(Rear electrode formation process)
The back electrode forming step is a step of forming the back electrode layer 8 (81, 82) on the back surface of the semiconductor element 7, that is, the surface from which the second substrate 2 and the surface thin film layer 41 have been removed (see FIG. 9). . When the second substrate 2 and the surface thin film layer 41 are removed by the substrate removing step, the first single crystal layer 11 is exposed on the back side of the semiconductor element 7 . In the back surface electrode forming step, a metal thin film for silicidation such as Ni is formed on the back surface of the semiconductor element 7, and then the interface between the first single crystal layer 11 and the metal such as Ni is subjected to a silicidation treatment at a high temperature. Thus, a silicide layer 81 can be formed. For silicidation, it is desirable to use a technique such as laser annealing in which only the surface layer is heated to a high temperature. A metal layer 82 can be formed thereon by copper plating or silver plating. Formation of the silicide layer 81 and formation of the metal layer 82 are possible even if the substrate is warped. In addition, when the buffer layer 412 is provided on the surface thin film layer of the second substrate 2 (see FIG. 2(b)), when the second substrate 2 and the surface thin film layer 41 are removed by the substrate removing process, the semiconductor element Buffer layer 412 is exposed on the back surface side of 7 . The formation of the back electrode layer 8 in this case will be described later.

The silicidation process can also be performed before the element formation process (the silicide layer formation process). That is, a very thin Ni thin film is formed on one surface 101 of the first substrate 1 before bonding to the second substrate 2 . Then, heat treatment is performed to form a silicide layer on one surface 101 of the first substrate 1, and then the Ni thin film layer is removed. After that, one surface 101 of the first substrate 1 whose surface is silicided and the second substrate 2 are bonded. Through subsequent processes, the silicide layer on one surface 101 of the first substrate 1 is exposed in a state where the second substrate 2 and the surface thin film layer 41 are removed after bonding the third substrate 3 . A metal layer 82 can be formed on the exposed silicide layer by copper plating or silver plating in the back electrode forming process.

If the first single-crystal layer 11 and the single-crystal buffer layer 52 have been removed in the substrate removing step, the back electrode layer 8 is the second single-crystal layer 5 exposed by removing the single-crystal buffer layer 52 . is formed on the surface of

Hereinafter, the manufacturing process of the semiconductor device according to this embodiment will be specifically described. In this example, a carbon substrate 2 having a thickness of about 0.5 mm is used as the second substrate, and its coefficient of thermal expansion is adjusted to be approximately the same as that of polycrystalline SiC. The thermal expansion coefficient of carbon can be adjusted by adjusting its density and firing temperature. In addition, the carbon substrate 2 is a high-purity material with a low metal impurity density of 10 ¹⁰ /cm ³ or less. Also, in this example, the first substrate is the single crystal SiC substrate 1 .

(Manufacturing process of multilayer substrate 6)
FIG. 4 shows the manufacturing process of the multi-layer substrate 6 shown in FIG. The first substrate 1 is made of single crystal SiC, and the second single crystal layer 5 is also made of SiC.
4A shows a substrate 61 in which a silicon oxide film 41 is formed on the upper surface 201 and side surfaces 203 of the carbon substrate 2, and a polycrystalline SiC film 42 is formed on the lower surface 202 and side surfaces 203 of the carbon substrate 2. FIG. ing. FIG. 4(b) shows a state in which a hydrogen-implanted layer 15 is formed by implanting hydrogen ions to a depth of 0.5 μm from the lower surface 101 of the single-crystal SiC substrate 1. FIG. The amount of hydrogen ions is about 1×10 ¹⁷ /cm ² , and the hydrogen density of the hydrogen-implanted layer 15 is as high as about 1×10 ²² /cm ³ . The plane 101 side from the hydrogen-implanted layer 15 becomes the first single-crystal layer 11 made of single-crystal SiC.
FIG. 1(c) shows a state in which the substrate 61 and the single crystal SiC substrate 1 are bonded. The surface of the silicon oxide film 41 formed on the surface of the carbon substrate 2 and the flat surface 101 of the single-crystal SiC substrate 1 are bonded after activating both surfaces.
FIG. 4(d) shows a state in which the single crystal SiC substrate 1 is separated with the hydrogen-implanted layer 15 as a boundary by heating the bonded substrates to a high temperature of about 1000° C. (separated single crystal The base material side of the SiC substrate 1 is not shown). A substrate 62 is formed by stacking the first single crystal layer 11 on the surface of the silicon oxide film 41 formed on the carbon substrate 2 .
In the multi-layer substrate 6 shown in FIG. 4E, the second single crystal layer 5 is formed by epitaxially growing single crystal SiC on the surface of the first single crystal layer 11 of the substrate 62 . Simultaneously with the formation of the second single-crystal layer 5, polycrystals grow on the peripheral portion of the silicon oxide film 41 where the first single-crystal layer 11 does not exist and on the side surface of the carbon substrate 2 (on the polycrystalline SiC film 42). Then, a second polycrystalline layer 51 having the same thickness as the second single crystal layer 5 is formed. In the multi-layer substrate 6, the thickness of the second single crystal layer 5 varies depending on its material and application, and in the case of SiC, it is approximately 5 μm (for a withstand voltage of 600 V) to 10 μm (for a withstand voltage of 1500 V).
A single crystal buffer layer 52 may be formed after forming the substrate 62 shown in FIG. 2D and before epitaxially growing the second single crystal 5 (see FIG. 2D).

(Process of forming semiconductor element)
A desired semiconductor element 7 can be formed on the second single crystal layer 5 formed on the multilayer substrate 6, as shown in FIGS.
FIG. 5 shows an example in which a Schottky diode 71 is formed as the semiconductor element 7 in the second single crystal layer 5 . 1A shows only one element portion (A portion) formed on the multilayer substrate 6, and FIG. 1B is an enlarged view of the one element portion.
7 shows an example in which a MOSFET 75 is formed as the semiconductor element 7 in the second single crystal layer 5. As shown in FIG. 1A shows only one element portion (A portion) formed on the multilayer substrate 6, and FIG. 1B is an enlarged view of the one element portion.
5 and 7 omit the detailed structure of the element portion.

5(a) and 5(b) show an example in which a carbon substrate 2 is used as the second substrate and surface thin film layers 41 and 42 are formed. FIG. 5(c) shows an example in which the SiC substrate 25 is used as the second substrate and the Schottky diode 71 is formed using the GaN film 413 as the surface thin layer.
7A and 7B show an example in which a carbon substrate 2 is used as the second substrate and surface thin film layers 41 and 42 are formed. FIG. 7(c) shows an example in which the SiC substrate 25 is used as the second substrate and the MOSFET 75 is formed using the GaN film 413 as the surface thin film layer. The illustrated through electrode 85 will be described later.

(Step of Bonding Third Substrate)
After forming the semiconductor element 7, the third substrate 3, which is a permanent support substrate for the semiconductor element 7, is bonded to the surface of the multilayer substrate 6 on the second single crystal layer 5 side in a second bonding step. As a material for the third substrate 3, an insulating material such as alkali-free glass or sapphire, or a semiconductor material such as Si can be used. After the bonding of the third substrate 3, a hole opening step for forming through holes for forming electrode portions of the semiconductor element 7 in the third substrate 3 can be performed.
FIG. 6 shows a second bonding step and a hole opening step when using a non-alkali glass substrate 31 as the third substrate 3 . In FIG. 4(a), a photocurable adhesive layer 34 is coated as a bonding layer on the surface of the multilayer substrate 6 (see FIG. 5) on which a Schottky diode 71 is formed in the portion A on the second single crystal layer 5 side. , shows a state in which the non-alkali glass substrate 31 is adhered via the bonding layer. The photocurable adhesive layer 34 is cured by irradiation with ultraviolet light.
FIG. 3(b) shows the non-alkali glass substrate 31 having through holes 36 for forming the electrodes of the semiconductor element. The through holes 36 can be formed by photolithography. When mounting the semiconductor element, the surface electrode of the Schottky diode 71 can be electrically connected to an external package through the through hole 36 by wire bonding or the like.

Also, as shown in FIG. 6C, a metal substrate 33 can be used as the third substrate 3 . This figure shows an example in which a SiC substrate 25 (or a sapphire substrate) is used as the second substrate and a GaN film 413 is used as the surface thin film layer. may be formed. The element surface of the Schottky diode 71 is protected with a silicon oxide film, the anode electrode portion is opened by photolithography, a nickel thin film is formed on the entire surface, and if necessary, the film is increased by plating to form a metal bonding layer. 38 is formed. By directly bonding the metal substrate 33 to the metal bonding layer 38, the metal substrate 33 can be used as an anode electrode for external connection.

FIG. 8 shows the second bonding step and the opening step when using the Si substrate 32 as the third substrate 3 . 7A, a TEOS oxide film 35 is formed as a bonding layer on the second single crystal layer 5 side surface of the multi-layer substrate 6 (see FIG. 7) on which the MOSFET 75 is formed in the portion A, and the The state where the Si substrate 32 is bonded is shown. The TEOS oxide film 35 and the Si substrate 32 can be bonded after both surfaces to be bonded are planarized and activated by plasma irradiation.
FIG. 4(b) shows a state in which through holes 37 for forming electrodes of a semiconductor element are provided in the Si substrate 32. FIG. The through holes 37 can be formed by photolithography. In this example, the through hole 37 is formed with a taper angle of 54 degrees. By performing taper etching using the Si substrate 32 with a plane orientation of (100), the wall surface of the through hole 37 can be formed as a gentle slope with an inclination angle of 54 degrees. An electrode can be formed on the surface of the Si substrate 32 by forming an aluminum wiring on this slope. It is also possible to provide a heat sink on the upper surface of the Si substrate 32 .

Also, as shown in FIG. 8(c), a metal substrate 33 can be used as the third substrate 3. FIG. This figure shows an example in which a SiC substrate (or sapphire substrate) 25 is used as the second substrate and a GaN film 413 is used as the surface thin film layer. As shown, the carbon substrate 2 may be used and the surface thin film layers 41 and 42 may be formed. An interconnection layer 36 is formed on the element surface of the MOSFET 75 to perform necessary electrical wiring. The interconnection layer 36 also serves as the bonding layer 34 . A metal junction layer 38 electrically connected to the source of the MOSFET 75 is formed on the surface of the interconnection layer 36 . By directly bonding the metal substrate 33 to the metal bonding layer 38, the metal substrate 33 can be used as a source electrode for external connection.

(Formation of back electrode)
FIG. 9 shows a process of forming the semiconductor element 7 on the multi-layer substrate 6, bonding the third substrate 3, and then forming the back electrode layer 8 (81, 82) that will be the back electrode of the semiconductor element 7. there is FIG. 9(a) is the same view as FIG. 6(b), and part A shows a portion corresponding to one semiconductor element. In FIG. 9(a), the outer peripheries of the single crystal layers 11 and 5, which are circular in top view, are represented by boundaries z1-z1' and z2-z2'. Remove the outer peripheral portion of the substrate that exceeds. FIG. 9(b) shows a state in which the outer peripheral portion is removed by performing a circle cut along the boundary. In this state, the side surface 203' of the cut carbon substrate 2 is exposed. When the carbon substrate 2 is removed by burning in an oxygen atmosphere and the silicon oxide film 41 is removed by etching, the rear surface of the first single crystal layer (single crystal SiC layer) 11 is exposed. Therefore, as shown in FIG. 1(c), an extremely thin Ni film is formed on the exposed surface of the single-crystal SiC layer 11, and the interface between the Ni and the single-crystal SiC layer is silicided by laser annealing. A layer 81 is formed. Then, a metal layer 82 that becomes a back electrode can be formed on the silicide layer 81 by plating. Further, when the silicide layer 81 is formed in advance on the surface of the first single crystal layer 11 on the side of the second substrate 2, the metal layer 82 to be the back electrode can be formed by direct plating.

10 removes the second substrate 2 and the first layer 41 of the surface thin film layer from the multilayer substrate 6 (6b) shown in FIG. 82) is shown. In this example, a silicon oxide film 41 and a buffer layer 412 made of SiC are formed as surface thin layers on the upper surface of the carbon 2 . In FIG. 10(a), after forming the semiconductor element 7 on the multilayer substrate 6 (6b) and bonding the third substrate 3, It shows a state in which the outer peripheral portion of the substrate exceeding the boundary is removed by performing a circle cut with the substrate. A portion corresponds to one semiconductor element. In this state, the side surface 203' of the cut carbon substrate 2 is exposed. Then, the carbon substrate 2 is removed by burning in an oxygen atmosphere, and the silicon oxide film 41 is removed by etching to expose the buffer layer 412 made of SiC polycrystal. Therefore, as shown in FIG. 4B, a very thin Ni film is formed on the exposed buffer layer 412, and the space between the Ni and the single-crystal SiC layer 11 is silicided by laser annealing, thereby forming a silicide layer 81. to form Then, on the silicide layer 81, a metal layer 82 can be formed as a back electrode by plating. The buffer layer 412 made of SiC polycrystal formed as a surface thin film layer serves as a thermal buffer layer to the aluminum electrode of the semiconductor element 7 when the temperature of the electrode interface becomes high due to laser annealing.

In the above, when the single-crystal buffer layer 52 is formed on the single-crystal SiC layer 11, a very thin Ni film is formed on the surface of the second single-crystal layer 5 exposed after removing them. The silicide layer 81 can be formed by siliciding the interface between the second single crystal layer 5 and the second single crystal layer 5 .
As described above, the silicide layer 81 and the metal layer 82 serving as the back electrode can be formed regardless of the structure of the multilayer substrate 6 (FIGS. 2A to 2E). Also, when a metal substrate 33 is used as the third substrate 3 (see, for example, FIG. 6C), a silicide layer 81 and a metal layer 82 serving as a back electrode can be similarly formed. Immediately before the surface of the single-crystal SiC layer 11 to be silicidized, ions may be implanted to increase the nitrogen concentration. Alternatively, a very thin high nitrogen concentration layer may be provided in advance on the surface layer. For example, a very thin high nitrogen concentration layer can be formed on the lower surface 101 of the first substrate 1 before bonding to the second substrate 2 in the bonding step.

Vertical electrical and thermal conductivity is important in semiconductor substrates for forming vertical devices for high power applications. In the present embodiment, the electrical conductivity of the semiconductor substrate depends on the resistance between the first single crystal layer 11 and the metal layer 82 that serves as the back electrode, but this resistance is eliminated by silicidation. . Also, the electrical resistance of the support layer is substantially minimized because the carbon substrate 2 is removed. The same applies to thermal conductivity, and since the carbon substrate 2 is removed to leave only the metal layer 82, the thermal conductivity is not hindered.

(Formation of Schottky diode element)
FIG. 11 shows a step of forming a Schottky diode element 71 on the second single crystal layer 5 formed on the surface layer of the multilayer substrate 6. As shown in FIG. The first substrate 1 is single crystal SiC. FIG. 11(a) shows the multilayer substrate 6 shown in FIG. 2 in a simplified manner, and the first single crystal layer 11 and the polycrystalline SiC layer 51 are not shown. A portion in the figure is a region corresponding to one semiconductor element in the multilayer substrate 6 . In the following figures (b) to (g), the A portion is enlarged to show the formation process of one element.
First, as shown in FIG. 7B, a SiO ₂ film is formed on the surface of the N-type second single crystal layer 5, and a necessary portion is opened by photolithography to form a mask 701. Next, as shown in FIG. Then, while being heated to about 500° C., P-type impurity ions are implanted into the openings of the mask 701, and then the mask 701 is removed. As a result, a P-type impurity region 711 is formed in the surface layer portion of the second single crystal layer 5, as shown in FIG.
Next, as shown in FIG. 4D, a SiO ₂ film is formed on the surface of the second single crystal layer 5, and a necessary portion is opened by photolithography to form a mask 702. Next, as shown in FIG. Then, while being heated to about 500° C., P-type impurity ions of a different concentration are implanted into the openings of the mask 702, and then the mask 702 is removed. As a result, another P-type impurity region 712 is formed in the surface layer portion of the second single crystal layer 5, as shown in FIG. After the P-type impurity region 711 and another P-type impurity region 712 are formed, a high temperature annealing process is performed to activate these impurities. When the second single crystal layer 5 is SiC, it is annealed at about 1700.degree.
After that, a SiO ₂ film having a thickness of about 1 μm is formed on the surface of the second single crystal layer 5 by thermal CVD, and the portions to be electrodes are removed by etching to form openings. As a result, an interlayer insulating film 713 of SiO ₂ is formed on the second single crystal layer 5, as shown in FIG.
Then, as shown in FIG. 7G, an electrode film 714 is formed by patterning after depositing a metal such as nickel. In this state, a Schottky interface is formed by instantaneously increasing the temperature to over 1000° C. by lamp annealing or the like. The electrode film 714 can also be thickened using aluminum or the like. Through the above steps, a multi-layer substrate having the main portion of the Schottky diode 71 formed thereon is obtained.
Subsequently, after joining a third substrate, a rear surface electrode is formed on the surface of the first single crystal layer 11 exposed by removing the carbon substrate 2 and the silicon oxide film 41 in the same manner as in the example shown in FIG. By forming layer 8, a Schottky diode 71 of vertical structure can be formed.

Further, when a metal substrate 33 is used as the third substrate 3, as shown in FIG. A layer 38 is provided on which the metal substrate 33 can be bonded. The metal bonding layer 38 can be formed by forming a thick plated layer on a metal such as Ni formed by sputtering, and planarizing the surface of the plated layer. The metal bonding layer 38 and the metal substrate 33 can be directly bonded by metal-to-metal bonding.

(Formation of MOSFET element)
FIG. 12 shows a step of forming a MOSFET element 75 in the second single crystal layer 5 formed on the surface layer of the multilayer substrate 6. As shown in FIG. The first substrate 1 is single crystal SiC. FIG. 12(a) simply shows the multilayer substrate 6 shown in FIG. 2, and the first single crystal layer 11 and the polycrystalline SiC layer 51 are not shown. A portion in the figure is a region corresponding to one semiconductor element in the multilayer substrate 6 . In the following figures (b) to (e), the A portion is enlarged to show the formation process of one element.
First, a SiO ₂ film is formed on the surface of the N-type second single crystal layer 5, and a necessary portion is opened by photolithography to form a mask. Then, while being heated to about 500° C., P-type impurity ions are implanted into the openings of the mask, and then the mask is removed. As a result, a P-well 751 is formed in the surface layer portion of the second single crystal layer 5, as shown in FIG. Subsequently, an N+ region can be formed by similarly implanting an impurity using the pattern of the SiO ₂ film as a mask. As a result, a source portion, a drain portion, and the like are formed. FIG. 7(b) shows a state in which a P-well 751, a source portion 752, a drain portion 753, etc. are formed. After the P-well made of P-type impurities and the source and drain made of N+ impurities are formed, high-temperature annealing is performed to activate these impurities. When the second single crystal layer 5 is SiC, it is annealed at about 1700.degree.
After that, a SiO ₂ film having a thickness of about 1 μm is formed on the surface of the second single crystal layer 5 by thermal CVD, and the portions to be electrodes are removed by etching to form openings. Subsequently, the insulating film is partially removed by etching around the gate portion 755 . As a result, an interlayer insulating film 754 is formed on the second single crystal layer 5, as shown in FIG. The figure shows the state before the formation of the gate oxide film. Next, as shown in FIG. 4D, a gate oxide film 756 is formed. Since the carbon substrate 2 is completely covered with the polycrystalline SiC layers 42 and 51, the gate oxide film 756 can be formed in an oxygen atmosphere. After forming the gate oxide 756, the contacts are opened. A gate metal is formed on the gate oxide film 756 between the source portion 752 and the drain portion 753 in a region to be the gate portion 755 (not shown).
FIG. 4(e) shows a structure in which an electrode film 758, a wiring layer 759 and the like are further formed. A multi-layer substrate on which the main part of the MOSFET 75 is formed is obtained by the above steps. Subsequently, in the same manner as the example shown in FIG. 9, a back surface electrode layer 8 is formed on the surface of the first single crystal layer 11 exposed by removing the carbon substrate 2 and the silicon oxide film 41, thereby vertically A type structure MOSFET 75 can be formed.
Although FIG. 12 shows an example of the structure of a MOSFET having a planar structure, a MOSFET having a trench structure can also be formed by modifying the element formation process described above.

FIG. 13 shows a step of forming a MOSFET element 76 in the second single crystal layer 5 formed on the surface layer of the multilayer substrate 6. As shown in FIG. The semiconductor substrate 66 (MOSFET element 76) shown in FIG. 8(e) uses the metal substrate 33 as the third substrate (support substrate) 3, and the second semiconductor material is laminated on the metal substrate 33 in order. A semiconductor element is formed on the second single crystal layer 5, and a back electrode layer 82 is provided on the upper side of the second single crystal layer 5 (FIG. 13 shows , the metal substrate 33 is on the upper side, and the back electrode layer 82 is on the lower side.). The back surface electrode layer 82 may be formed on the first single crystal layer 11 made of single crystals of the first semiconductor material provided on the second single crystal layer 5, or may be formed on the first single crystal layer. It may be formed on a buffer layer made of a semiconductor material provided on 11 . That is, the configuration of the multilayer substrate 6 forming the MOSFET element 76 may be any of the multilayer substrates 6a, 6b, 6c, 6d, and 6e shown in FIG.
FIG. 13 shows an example in which a SiC substrate 25 is used as the second substrate 2 and the second semiconductor material (and the first semiconductor material) is SiC. Each figure in FIG. 13 shows a region corresponding to one semiconductor element, and the single crystal buffer layer 52, the first single crystal layer 11, the buffer layers (41, 412, 413) and the like are omitted.
12(a), a P-well 751, a source portion 752, a drain portion 753, an interlayer insulating film 754, and a gate oxide film are formed in the second single crystal layer 5 by the same steps as in the case of the MOSFET element 75 shown in FIG. 756, an electrode film 758, a wiring layer 759, and the like are formed. The SiC substrate 25 need not be covered with a polycrystalline SiC layer 42 or the like. A gate metal is formed on the gate oxide film 756 between the source portion 752 and the drain portion 753 in a region to be the gate portion 755 (not shown).
FIG. 13(b) shows a state in which through holes 851 penetrating through the second single crystal layer 5 are formed. The through hole 851 can be formed with a trench structure. Then, as shown in FIG. 8C, the inner wall surface of the through hole 851 is covered with an insulating film 852, and the through electrode 85 is formed by, for example, vapor-depositing metal. Through-holes 851 can also be tapered to improve connectivity of the metal layers.
FIG. 4D shows a state in which an interconnection layer 36 and a metal bonding layer 38 are provided on the device, and a metal substrate 33 is bonded onto the metal bonding layer 38 as a support substrate. In the interconnection layer 36, the gate portion 755, which is the metal film portion on the gate oxide film, and the through electrode 85 are electrically connected. Also, the metal bonding layer 38 is electrically connected to the source portion 752 by the interconnection layer 36, and the metal substrate 33 becomes the source electrode S for external connection. The metal bonding layer 38 can be formed by forming a thick plated layer on a metal such as Ni formed by sputtering, and planarizing the surface of the plated layer. The metal bonding layer 38 and the metal substrate 33 can be directly bonded by metal-to-metal bonding.
Then, the SiC substrate 25 bonded to the lower surface side of the second single crystal layer 5 is removed. As described above, when the GaN film 413 is formed on the surface of the SiC substrate 25, the SiC substrate 25 can be removed by irradiating laser light. Further, as described above, the first single crystal layer 11, the single crystal buffer layer 52, and the like can be removed by polishing or the like.
In FIG. 4(e), a back insulating layer 83 is selectively formed on the surface of the second single crystal layer 5 exposed by removing the SiC substrate 25 and the like, and a back electrode layer 82 is further selectively formed. It shows the state of As a result, the back electrode layer 82 portion in contact with the lower surface side (back drain portion) of the second single crystal layer 5 becomes the drain electrode D for external connection, and the back electrode layer 82 portion in contact with the through electrode 85 is the gate for external connection. It becomes the electrode G. Through the steps described above, the semiconductor substrate 66 on which the MOSFET element 76 is formed can be obtained.

In the above structure, the surface portion between the source portion 752 and the drain portion 753, which is the channel portion where heat is generated in the element, is preferably close to the metal substrate 33 for heat conduction. Therefore, it is preferable that the thickness of the interconnection layer 36 is thin. In order to reduce the thickness of the interconnection layer 36, the region of the second single crystal layer 5 under the gate interconnection portion in the interconnection layer 36 is arranged to have the source or P-well potential close to the gate potential. preferably. In order to improve heat conduction from the channel portion to the metal substrate 33, the length from the surface of the second single crystal layer 5 where the source portion and the P-well portion are present to the metal substrate 33 is short and the wiring area is large. preferably. Therefore, it is preferable to make the gate wiring portion as small as possible.
In this example, the through electrode 85 is formed before joining the metal substrate 33, but it is also possible to form the through electrode 85 by performing trench processing from the back side after joining the metal substrate 33. is. Further, the manufacturing process of the MOSFET of this example can be applied to a MOSFET having a trench structure by modifying the element forming process.

In the above embodiments, the case where the second substrate 2 is a carbon substrate and the first semiconductor material and the second semiconductor material are SiC has been mainly described. When the second substrate 2 is made of carbon, the coefficient of thermal expansion can be adjusted by the density and the size of crystal grains. Thereby, the thermal expansion coefficient of the carbon substrate can be matched according to the thermal expansion coefficients of the first semiconductor material and the second semiconductor material. As a result, crystal defects in the second single crystal layer 5 formed on the first single crystal layer 11 can be reduced. The same applies when the second semiconductor material is GaN, gallium oxide, gallium oxide, or the like.
When the material of the second substrate 2 is sapphire or SiC, it is preferable to form a compound semiconductor film containing Ga as the surface thin film layer 4 . Examples of Ga-containing compound semiconductor films include GaN, gallium oxide, and GaAs. When the GaN film is formed, after bonding the third substrate 3, laser light is irradiated from the surface of the second substrate 2 to precipitate Ga from GaN, and the second substrate 2 is separated by the GaN film. (so-called laser lift-off) is also easy.

In the above embodiments, the same applies when the first semiconductor material and the second semiconductor material are GaN, gallium oxide, or the like. Also, the case where the first semiconductor material and the second semiconductor material are SiC and the vertical structure semiconductor element is formed has been described. It can be manufactured similarly. Specifically, a silicon oxide film 41 is formed on the second substrate 2, the first substrate 1 is bonded thereon, and a GaN layer is formed as the second single crystal layer 5 to form a horizontal element. However, after bonding the third substrate 3, the second substrate 2 can be removed. In this case, in order to form the GaN layer, which is a piezoelectric material, the thermal expansion coefficient of the carbon substrate, which is the second substrate 2 serving as a base, is matched to that of GaN, thereby minimizing the internal stress of the GaN layer. It is possible. This is because the thermal expansion coefficient of the carbon substrate can be adjusted by adjusting the density and the size of the crystal grains.

The multilayer substrate 6 (6a, 6b, 6c, 6d, 6e) shown in FIG. 2 is suitable as a semiconductor substrate for forming elements for high power applications. By applying the method for manufacturing a semiconductor element as described above, a semiconductor substrate having semiconductor elements formed thereon can be configured based on the multilayer substrate 6 . Figures 14 and 15 represent a semiconductor substrate 65 using a multi-layer substrate 6 and using a substrate made of one of insulating material, semiconductor material and metal as support substrate 3 (said third substrate 3). ing. A semiconductor element 7 is formed on the semiconductor substrate 65 . (FIGS. 14 and 15 are drawn with the support substrate 3 on the bottom and the back electrode layer 8 on the top.)
A semiconductor substrate 65 shown in FIG. 14 includes a support substrate 3 (31, 32 or 33) made of one of an insulating material, a semiconductor material, and a metal, and a bonding layer 34 (35, 36) sandwiched on the support substrate 3. and a second single crystal layer 5 made of single crystals of a second semiconductor material stacked in a stack. A semiconductor element 7 is formed on the second single crystal layer 5 , and a back electrode layer 8 ( 81 , 82 ) of the semiconductor element 7 is provided on the second single crystal layer 5 . The semiconductor element 7 may be of any type, and may be, for example, the aforementioned Schottky diode 71, MOSFETs 75, 76, or the like.

FIG. 15 shows another form of semiconductor substrate 65 (65a, 65b, 65c). In the semiconductor substrates (65a, 65b, 65c), the first single crystal layer 11 made of a single crystal of the first semiconductor material is provided on the second single crystal layer 5, and the back electrode layer 8 (81, 82) is: It is provided on the first single crystal layer 11 or on the buffer layer 412 made of a semiconductor material provided on the first single crystal layer 11 . That is, the second single crystal layer 5 and the first single crystal layer 11 are provided on the support substrate 3 (31, 32 or 33) with the bonding layer 34 (35, 36) interposed therebetween. A semiconductor element 7 is formed on the .
4A shows an example of a semiconductor substrate 65a having a back electrode layer 8 of the semiconductor element 7 on the first single crystal layer 11. FIG. The back electrode layer 8 may be provided on the first single crystal layer 11 with a buffer layer 412 made of a semiconductor material interposed therebetween, as shown in FIG. As the support substrate 3, a substrate made of non-alkali glass, sapphire, Si, or the like can be used. Further, through holes 3 ( 36 , 37 ) serving as electrode portions of the semiconductor element 7 may be formed in the support substrate 3 .
FIG. 6(c) shows a semiconductor substrate 65c in which the metal substrate 33 as the support substrate 3 is bonded via the metal bonding layer 38. FIG. By using the metal substrate 33, a power semiconductor with excellent thermal conductivity can be obtained.
Preferably, the first semiconductor material used for the semiconductor substrate is one of SiC, GaN and gallium oxide, and the second semiconductor material is one of SiC, GaN and gallium oxide.
In the semiconductor substrates (65a, 65b, 65c), the thickness of the first single crystal layer 11 may be thin (about 0.5 to 1 μm), so the first substrate 1 made of single crystal of the first semiconductor material may be used. Only a small amount is used. Further, the second substrate 2 is a sapphire substrate or SiC substrate 25, which can be used repeatedly as the second substrate 2 by removing it by laser lift-off. As described above, since the number of members to be consumed in the manufacturing process is extremely small, the semiconductor substrate 65 of this embodiment can be manufactured at extremely low cost.

The present invention is not limited to the embodiments described in detail above, and various modifications and changes are possible within the scope of the claims of the present invention.

Power compound semiconductor elements using SiC or the like are becoming more and more important in vehicles as hybrid vehicles, electric vehicles, and the like become popular. In addition, with the spread of smart grids in homes, the role of power compound semiconductor devices is becoming more important for the control of home appliances and energy management. According to the present invention, it is possible to significantly reduce the amount of SiC single crystal, which is an expensive material, and to manufacture inexpensive power semiconductor devices.

1; first substrate 11; first single crystal layer 15; hydrogen-implanted layer 101; bottom surface of first substrate 2; second substrate (carbon substrate) 201; 202; bottom surface of second substrate 203; side surface of second substrate 25; second substrate (SiC substrate) 3; third substrate 31; alkali-free glass substrate 32: Si substrate 33; metal substrate 34, 35; bonding layer 36; interconnection layer 37; through hole 38; metal bonding layer 4; surface thin film layer 41; silicon oxide film 412; 413; GaN film, 42; polycrystalline SiC film, 5; second single crystal layer, 51; second polycrystalline layer, 52; single crystal buffer layer, 53; 6b, 6c, 6d, 6e; multilayer substrates 65, 65a, 65b, 65c, 65d; semiconductor substrates, 7; semiconductor elements, 71; Schottky diodes, 701, 702; , 713; inter-layer insulating film, 714; electrode films, 75, 76; MOSFET, 751; 757; contact, 758; electrode film, 759; wiring layer, 8; back electrode layer, 81; silicide layer, 82; metal layer, 83; .

Claims (11)

a second substrate having a surface thin film layer formed of one or more thin films of an insulating material or a semiconductor material formed on at least one plane thereof ;
a first single crystal layer made of a single crystal of a first semiconductor material with a predetermined thickness bonded to the surface of the surface thin film layer formed on the second substrate;
a second single crystal layer made of a single crystal of a second semiconductor material deposited on the first single crystal layer;
a semiconductor element formed on the second single crystal layer;
a buffer layer made of a semiconductor material further formed on the one plane side of the second substrate as the surface thin film layer ;
A semiconductor substrate comprising : 2. The semiconductor substrate according to claim 1, wherein a silicon oxide film or a semiconductor film containing Ga is formed on said one plane of said second substrate as said surface thin film layer. 3. The semiconductor substrate according to claim 1, wherein the second substrate is a substrate that transmits light, and the surface thin film layer is a semiconductor material containing Ga. 4. The semiconductor substrate according to claim 1 , wherein said second substrate is a substrate made of sapphire or SiC. the first semiconductor material is one of SiC, GaN and gallium oxide;
5. A semiconductor substrate as claimed in any preceding claim, wherein the second semiconductor material is one of SiC, GaN and gallium oxide. a first film forming step of forming a surface thin film layer comprising one or more thin films of an insulating material or a semiconductor material on at least one plane of a second substrate;
a bonding step of bonding one plane of a first substrate made of a single crystal of a first semiconductor material and the surface of the surface thin film layer formed on the second substrate;
By separating the first substrate at a predetermined depth from the one plane of the first substrate, the one plane side of the first substrate is used as a first single crystal layer to form the second substrate. a separating step leaving on said surface film layer formed thereon;
a second film forming step of forming a second single crystal layer made of a single crystal of a second semiconductor material on the first single crystal layer;
an element forming step of forming a semiconductor element in the second single crystal layer;
including
A method of manufacturing a semiconductor device, wherein in the first film forming step, a buffer layer made of a semiconductor material is further formed as the surface thin film layer on the one plane side of the second substrate. a hydrogen layer forming step of forming a hydrogen-implanted layer to a predetermined depth from the one plane of the first substrate;
In the separating step, the first single crystal layer is left on the surface thin film layer formed on the second substrate by separating the first substrate at the hydrogen-implanted layer;
7. The multi-layer substrate according to claim 6 , wherein the surface thin film layer, the first single crystal layer and the second single crystal layer are sequentially laminated on the second substrate by the second film forming step. A method of manufacturing a semiconductor device according to claim 1. 8. The method of manufacturing a semiconductor device according to claim 6 , wherein a silicon oxide film or a semiconductor film containing Ga is formed on said one plane of said second substrate as said surface thin film layer. 9. The method of manufacturing a semiconductor device according to claim 6 , wherein the second substrate is a substrate that transmits light, and the surface thin film layer is a semiconductor material containing Ga. 10. The method of manufacturing a semiconductor device according to claim 6 , wherein said second substrate is a substrate made of sapphire or SiC. the first semiconductor material is one of SiC, GaN and gallium oxide;
11. The method of manufacturing a semiconductor device according to claim 6 , wherein said second semiconductor material is one of SiC , GaN and gallium oxide.

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