JP2014057035A - Compound semiconductor device manufacturing method - Google Patents

Abstract

PROBLEM TO BE SOLVED: To reduce the cost of an SiC substrate for a high voltage drive element.SOLUTION: In order to minimize the amount of SiC crystal used, a hydrogen ion implantation layer is formed on a seed substrate, the surface thereof and the surface of a GaN thin-film layer formed on a sapphire substrate are pasted together, and the seed substrate thereafter is peeled off and separated. An SiC layer is formed by epitaxial growth on the SiC thin-film layer on the sapphire substrate. A MOSFET element, etc. are formed on the SiC layer, and then a glass substrate is pasted to the element surface via a material which can be peeled off by an ultraviolet ray. Thereafter, the sapphire substrate and the GaN layer are removed by laser, the surface of the SiC layer is metalized before a heat sink is pasted thereto, and an ultraviolet ray is irradiated upon the glass surface in that state to remove the glass substrate. In this way, an SiC element is formed on the heat sink. The seed substrate can be reused by polishing its surface after being separated. The amount of the seed substrate used is infinitesimal, because it is needed for only hydrogen ion implantation and polishing.

Description

  The present invention relates to a method for manufacturing a semiconductor device using a power compound semiconductor, particularly a SiC substrate.

FIG. 1 shows a cross section of a vertically structured MOSFET formed on a conventionally disclosed single crystal silicon carbide (SiC) substrate. FIG. 1A shows the SiC substrate 1. The SiC substrate 1 includes a SiC base substrate 2 and a drift layer 6 on which SiC is epitaxially grown. The SiC base substrate is determined by the impurity concentration added when the SiC substrate is manufactured in a region having a high impurity concentration (N ⁺⁺ ), and the thickness is about 200 μm. The SiC epitaxial growth drift layer 6 is determined by the concentration at the time of epitaxial growth on the base substrate, and has a low concentration (N ⁻ ) and a thickness of about 10 μm. FIG. 1B is a cross-sectional view of a vertical MOSFET formed on the substrate. A source part 11, a drain part 12, a gate electrode 13, a gate film 14, and a P-well 15 are provided on the surface side. is there. In the case of an N-channel MOSFET, the SiC substrate includes an N ⁻ layer around the MOSFET, an N ⁺ layer in the source portion 11, an N layer in the drain portion 12, and a P layer 15 in the channel portion. FIG. 1c represents the expansion of the depletion layer of the P layer when the MOSFET is off, that is, when a reverse bias voltage is applied to the drain. In the example, the depletion layer arrival point 18 has a depth of about 10 μm. The SiC up to the depletion layer arrival point is the drift layer 6 made of the N ⁻ layer, and the SiC above the arrival point is the base substrate portion 2 made of the N ⁺⁺ layer. In the power MOSFET, a drift resistance which is a resistance component from the drain electrode 19 to the MOSFET drain 12 on the surface is an important factor. The drift resistance is the sum of the resistance component in the base substrate 2 and the resistance component in the drift layer 6. The thickness of the SiC base substrate 2 is about 200 μm in consideration of workability such as warping, cracking, and chipping on a 6-inch substrate.

FIG. 2 shows a cross-sectional view and a mounting view of the MOSFET element. FIG. 2A is the same as the element shown in FIG. A gate electrode 9 and a source electrode 10 are formed on the surface side. In FIG. 2B, the drain electrode is on the back side (bottom surface) opposite to the surface side on which the element is formed. In order to reduce the drift resistance, the SiC base substrate 2 is thinned to about 40 μm after element formation. The drift resistance of the element in FIG. 2B is the sum of the drift resistance generated in the current path 29 in the base substrate 2 portion and the drift resistance generated in the current path 30 in the drift layer 6 portion. In order to make the drift resistance as small as possible, it is preferable to make the base substrate as thin as possible. Considering workability, the total thickness of the base substrate 2 and the drift layer 2 is about 50 μm, which is a limit for reducing the thickness. Since this thin substrate is restricted in handling the substrate, it is made immediately before separation into elements. Although thinning from about 200 μm to about 40 μm is usually performed by polishing, it takes time to polish because SiC is hard. In FIG. 2B, the gate and the source are the front side, and the electrodes for taking them out are the gate electrode 9 and the source electrode 10. In the figure, each electrode and the gate and source of the element part are connected by a wiring layer 20. FIG. 2-c is a structural diagram of the lead frame mounted. The SiC substrate 1 including the base substrate portion 2 and the drift layer portion 6 has a thickness of about 50 μm, and this element is mounted on the heat sink 33. The element is mounted on a lead frame 35, and the drain electrode 19 is connected to the drain lead frame 35 via the heat sink 33, the gate electrode 9 is connected to the gate lead frame 36, and the source electrode 10 is connected to the source lead frame 37. These are packaged into the final product.

FIG. 3 shows an equivalent circuit diagram of the MOSFET shown in FIG. The MOSFET is composed of a drain 22, a source 21, and a gate 23, and electrodes to the outside of the MOSFET are a source electrode 24 and a drain electrode 25. The drift resistor important in the power element is composed of a drift resistor 27 in the base substrate 2 portion and a drift resistor 28 in the drift layer 6 portion.

One of the reasons why semiconductor elements using SiC substrates are not widespread is that the cost is not reduced. The reason is that SiC ingots are not effectively used. FIG. 4 shows a change in the thickness of the SiC substrate in the process from the ingot to the element formation substrate. FIG. 4A shows an ingot 40 which is a crystal body that is a base of the SiC substrate. This is an example in which the shape is arranged in a columnar shape, and the diameter is 6 inches (150 mm) and the thickness is 2 inches (50 mm). A SiC substrate having a thickness of 200 μm is cut from the ingot 40 by a diamond saw, and the SiC substrates 41 are formed one by one. The thickness of the cutting allowance 42 is about 100 μm. The SiC portion taken out from the ingot is referred to as original SiC in the present invention. FIG. 4B shows a single substrate. In the figure, the thickness of the SiC substrate is 200 μm. In order to cut out the substrate from FIG. 4A, a method of cutting the cut layer of the cutting allowance 42 with a diamond saw is generally used. That is, in order to cut out a 200 μm substrate, a cutting margin of 100 μm is necessary, and in reality, most of the necessary substrates are discarded as cutting margin. In this state, the surface of the SiC base substrate 2 used in FIGS. 1 and 2 is polished. The substrate is a substrate of the N ⁺⁺ high concentration, for use in the device formation shown in FIG. 2-a is N ^- the required low concentration SiC layer, the need for a SiC epitaxial growth to a thickness of about 10μm . In order to distinguish this epitaxially grown SiC portion from the original SiC, it is referred to as epitaxial SiC. FIG. 2A shows a state in which this epitaxial SiC is formed in the drift layer 6 and an element is formed in that layer. In the figure, the thickness of the SiC base substrate 2 is 200 μm, and the SiC drift layer 6 is 10 μm. FIG. 2B shows a state in which the SiC base substrate 2 is thinned by polishing to 40 μm. FIG. 4-c shows only the SiC layer base substrate 2 at this stage. In FIG. 4, it can be seen how the raw SiC obtained from the ingot changes. That is, in FIG. 4B, the portion that becomes the necessary base substrate (2) is the base substrate 41, and the cutting allowance equivalent portion 43 indicated by a broken line is a portion that is discarded at the time of cutting. In FIG. 4-c, the figure which extracted SiC thinned by the thinning of the base substrate 2 performed before element isolation after completion | finish of an element process is shown. The base substrate 2 is as thin as 40 μm, and the 200 μm to 160 μm portion is removed by polishing, and the corresponding portion 44 of 160 μm thinned is shown in the figure. Thus, in the ingot state, only 40 μm is effectively used finally in the original SiC layer having a thickness of 300 μm. This means that the original SiC having a thickness of 300 μm is used to obtain one SiC element substrate. In order to reduce costs, it is necessary to reduce the amount used.

An object of the present invention is to make effective use of such SiC ingot, that is, raw SiC. That is, in order to obtain a single SiC substrate, the use of raw SiC is minimized. FIG. 5 shows a state in which elements are mounted on the lead frame. One of the focus points of the present invention is to pay attention to the overlap between the SiC base substrate 2 and the heat sink 33 in this mounting diagram. In FIG. 5, the MOSFET element on the SiC substrate is mounted on a lead frame 35 via a heat sink material 33 bonded to the metallized layer. Referring to FIG. 5, when analyzing the structure of the SiC MOSFET element, the N ^- layer drift layer 6 is essentially required for the MOSFET structure as SiC, and the thickness is 10 μm. The N ⁺⁺ SiC base layer 2 is a layer that serves as a support base necessary for transporting the substrate in a 6-inch size substrate in the element formation process. If the element forming process can be performed by other means, the SiC base layer 2 is useless. Generally, when the SiC thickness is 10 μm, it is too thin to be handled, so the thickness is about 200 μm as mentioned in FIGS. Immediately before the device is mounted, it is thinned by polishing, and the thickness including the drift layer 6 formed by epitaxial growth is about 50 μm. The heat sink layer under the N ⁺⁺ base layer 2 is a portion necessary for radiating local heat generated in the SiC MOSFET portion. In this example, a 50 μm thick copper material is used. In the structure of FIG. 5, when focusing on the drift layer 6 which is an essentially necessary SiC layer (N ⁻ layer), only a thickness of about 10 μm is necessary. In FIG. 4, the original SiC portion having a thickness of 200 μm is not always necessary, and only about 10 μm epitaxially grown is effectively used. It can be seen that the raw SiC is minimally present because it is about 10 μm epitaxially grown on the raw SiC. The effective use of the SiC ingot which is the subject of the present invention is to use only the surface layer necessary for SiC epitaxial growth in the reduction of the part corresponding to 100 μm of the cutting allowance 42 and the 200 μm part of the substrate 41.

4 and 5, the results of the considerations are summarized as follows. Actually, when considering the state of the SiC layer in the state where the substrate is handled and the MOSFET is formed, the final SiC layer of 300 μm of the ingot is finally It is unnecessary and only the epitaxial layer of 10 μm is necessary for element formation. In other words, if the part that becomes the support base in the manufacturing process can be replaced by inexpensive means, the possibility of cost reduction is great. The challenge is to reduce the amount of raw SiC used as much as possible as much as possible. The present invention considers whether it is necessary to consider the necessary substrates and materials in each step, whether they cannot be shared, or can be replaced with inexpensive materials, and is the most suitable for SiC semiconductors. The object is to minimize the amount of the SiC layer used as an expensive material. For this purpose, the manufacturing process is not too complicated, and it is necessary to realize a lean structure and production method.

Means for solving the above problems will be described below.
1. A method of manufacturing a semiconductor device using a first compound semiconductor,
An ion implantation step of implanting ions into the surface layer portion of the seed crystal substrate made of the first compound semiconductor;
A base substrate or a substrate formed by forming a second compound semiconductor layer on the surface of the base substrate or a substrate formed by forming the second compound semiconductor layer and the first thin film layer on the surface of the base substrate is a first substrate. And a first bonding step of bonding the surface of the first substrate and the surface of the surface layer portion ion-implanted by the ion implantation step;
A cutting step in which the surface layer portion ion-implanted by the ion implantation step is peeled from the seed crystal substrate;
A semiconductor element forming step of forming a semiconductor element by forming at least one of a P-type region and an N-type region or a Schottky film and forming an electrode on the first compound semiconductor layer separated by the cutting step When,
A second bonding step of bonding the surface of the semiconductor element formed by the semiconductor element formation step and the surface of the second substrate;
A first substrate removing step of removing the first substrate after the second bonding step;
A second substrate removing step of bonding the surface from which the first substrate has been removed by the first substrate removing step and a third substrate, and then removing the second substrate;
A method for manufacturing a semiconductor device, comprising:
2. A method of manufacturing a semiconductor device using a first compound semiconductor,
An ion implantation step of implanting ions into the surface layer portion of the seed crystal substrate made of the first compound semiconductor;
A base substrate or a substrate formed by forming a second compound semiconductor layer on the surface of the base substrate or a substrate formed by forming the second compound semiconductor layer and the first thin film layer on the surface of the base substrate is a first substrate. And a first bonding step of bonding the surface of the first substrate and the surface of the surface layer portion ion-implanted by the ion implantation step;
A cutting step in which the surface layer portion ion-implanted by the ion implantation step is peeled from the seed crystal substrate;
A third compound semiconductor is formed on the first compound semiconductor layer separated by the cutting step, and at least one of a P-type region and an N-type region is formed on the third compound semiconductor layer, and an electrode is formed. A semiconductor element forming step of forming a semiconductor element by
A second bonding step of bonding the surface of the semiconductor element formed by the semiconductor element formation step and the surface of the second substrate;
A first substrate removing step of removing the first substrate after the second bonding step;
A second substrate removing step of bonding the surface from which the first substrate has been removed by the first substrate removing step and a third substrate, and then removing the second substrate;
A method for manufacturing a semiconductor device, comprising:
3. Before performing the semiconductor element forming step, a film increasing step is further performed in which the first compound semiconductor layer is further formed on the peeled first compound semiconductor layer, and the first compound semiconductor layer has a predetermined thickness. Comprising 1. Or 2. The manufacturing method of the semiconductor device as described in any one of Claims 1-3.
4). Before performing the first bonding, a second compound semiconductor layer is formed on the surface of the surface layer portion that has been ion-implanted by the ion implantation step, or a first thin film layer and a second compound semiconductor layer are formed. The manufacturing method of the semiconductor device of Claim 1 thru | or 3 provided with the process to carry out.
5. In the second substrate removing step, the semiconductor substrate is separated and mounted on a mounting substrate, and then the second substrate is removed. To 3. A method for manufacturing a semiconductor device according to any one of the above.
6). The base substrate is a sapphire substrate, and the second compound semiconductor is a Ga-based compound semiconductor. To 4. A method for manufacturing a semiconductor device according to any one of the above.
7). In the first substrate removing step, the first substrate is removed by irradiating the surface of the sapphire substrate on which the Ga-based compound semiconductor is formed with laser light. The manufacturing method of the semiconductor device of description.
8). The second substrate is transparent glass;
In the second bonding step, an adhesive layer using a material that is peeled off by light is formed on the surface of the semiconductor element, and then bonded to the surface of the second substrate through the adhesive layer.
The second substrate removing step removes the second substrate by irradiating with light.
1 above. To 6. A method for manufacturing a semiconductor device according to any one of the above.
9. The first compound semiconductor is silicon carbide SiC;
1 above. To 7. A method for manufacturing a semiconductor device according to any one of the above.
10. 2. The third compound semiconductor is gallium nitride GaN. To 8. A method for manufacturing a semiconductor device according to any one of the above.
11. 2. the third substrate is a heat sink material; Thru 9. A method for manufacturing a semiconductor device according to any one of the above.
12 The method of manufacturing a semiconductor device according to claim 1, wherein the first thin film is aluminum nitride.

Although there are great expectations for the practical use of SiC substrates suitable for high-voltage driving, the expansion of their applications has been limited so far due to substrate cost constraints. According to the present invention, it is possible to realize a reduction in cost when viewed from the SiC substrate to the mounting. The means of the present invention can be applied to a SiC application MOSFET, and similarly to a Schottky barrier diode using a SiC substrate. It can also be applied to GaN devices manufactured by forming a GaN (gallium nitride) layer on a SiC substrate, and this revolutionary cost-saving structure contributes to the development of the industry. .

  Sectional drawing which shows structure of well-known SiC substrate and MOSFET element   Cross-sectional view of known SiC element structure and mounting method   Equivalent circuit diagram   Sectional drawing which shows the analysis about the effective utilization of the original SiC layer in a SiC substrate   Cross-sectional view of SiC element mounting structure   Sectional drawing explaining the effective utilization of the original SiC layer in the SiC substrate by this invention   Sectional drawing of the manufacturing process in which a device is formed in a wafer state through a substrate from a seed substrate to a glass substrate and a heat sink substrate according to the present invention   Another embodiment according to the present invention   Sectional view of the SiC element mounting structure according to FIG.   Example of application to GaN device according to the present invention

The embodiment for carrying out the present invention minimizes the use of an expensive SiC layer by a simple process and an inexpensive material, from the substrate formation to the element formation and heat sink material used for mounting. is there. Specifically, paying attention to the fact that a heat sink (see FIG. 5) is essential in the power element, the heat base can be mounted without using the SiC base layer 2 by using the heat sink as a support base. It is to make use unnecessary. The raw SiC layer only needs to be necessary for forming the SiC epitaxial layer. In order to activate the PN impurity layer of the MOSFET, it is necessary to perform processing at a high temperature of 1600 ° C. or higher in the manufacturing process. For this reason, a heat sink that becomes a support base when mounting cannot be used as a support base in the MOSFET manufacturing process. For this purpose, a MOSFET may be prepared using a sapphire substrate that can withstand high temperatures as a support for the SiC epitaxial layer, and after the MOSFET preparation process, the sapphire substrate may be removed and replaced with a heat sink material. At the time of replacement, an inexpensive glass substrate is bonded to the opposite element surface side prior to peeling of the sapphire substrate, which is a support base, to form a temporary support base. In this state, the sapphire substrate is peeled off, and a heat sink material is bonded to the surface from which the sapphire substrate is removed using the glass substrate as a support. In this state, since the support base becomes a heat sink material, the glass substrate becomes unnecessary and is removed. By using such a form, the use of SiC is minimized. The glass substrate preferably has the same thermal expansion coefficient as that of the semiconductor element, and alkali-free glass can be used. Sapphire substrates and glass substrates can be reused after polishing.

  As a specific procedure, a SiC seed substrate (seed crystal substrate) having a good workability is cut out from an ingot made of SiC (first compound semiconductor). In this case, the thickness is set to 1 mm in consideration of workability and efficiency. From the surface layer, a 0.5 μm thick SiC layer is transplanted to a sapphire substrate by Smart Cut (registered trademark), which has recently been put into practical use with micromachine technology. Specifically, hydrogen ions are implanted from the surface layer of the seed substrate to a depth to provide a smart cut layer, and this surface and a sapphire substrate (base substrate, base) on which a thin film layer of GaN (second compound semiconductor) is formed. The substrate on which the second compound semiconductor layer is formed on the substrate is referred to as the first substrate.) And then peeled off at about 1000 ° C., and the SiC piece is transferred to the sapphire substrate as a support base. is there. Since the SiC layer transferred by the smart cut is as thin as about 0.5 μm, a SiC layer having a necessary thickness is epitaxially grown as necessary. The sapphire substrate is an inexpensive substrate with good flatness that has been put into practical use in recent light-emitting diode applications. Further, the reason why the GaN thin film layer is interposed is to use the sapphire substrate for peeling by a laser lift-off technique later. The semiconductor element (MOSFET element) is formed on the SiC layer formed on the sapphire substrate. In the element formation process of MOSFET, it is necessary to withstand a high temperature of 1600 to 1700 ° C. in order to activate the P-type region and N-type region, but both the sapphire substrate and the GaN layer have a melting point of 2000 ° C. There is no. The sapphire substrate is a base substrate that can withstand this high temperature, and is a material that is easily peeled off later in the GaN layer. After the MOSFET elements are formed, a second substrate (sacrificial substrate) made of a transparent glass material that will eventually become unnecessary is pasted on the surface on which the MOSFET is formed via an adhesive or a sheet material. Match. The adhesive is an ultraviolet light peeling material that can peel the glass substrate attached by ultraviolet irradiation. Since this glass substrate becomes a support and can be handled after glass bonding, the sapphire substrate can be removed. This removal of the sapphire substrate can be easily performed by laser lift-off by irradiating a laser beam. Then, after removing the GaN thin film and metallizing the surface, a heat sink member (third substrate) having good thermal conductivity and low electrical resistance is bonded in the substrate state. An example is a copper material. For the connection, a material capable of withstanding the subsequent standard soldering such as a high-temperature solder material is preferable. By bonding the heat sink substrate, the glass substrate finishes its role as a support base. The adhesive layer is peeled off by irradiating ultraviolet rays from the glass substrate side, and the glass substrate is removed. Thereby, the SiC element which uses the heat sink material as a support base in the wafer state is completed. In this state, a SiC layer in a thin film wafer state is mounted on the heat sink material to form an element. After that, it is cut out by the size of the element and mounted on the mounting substrate. The sapphire substrate and glass substrate used in this process can be reused after polishing the surface.

In the above example, after the glass substrate as the sacrificial substrate was bonded, the heat sink material was bonded, but after the glass substrate was bonded, the sapphire substrate was removed, the GaN thin film was removed, and the back surface was removed. It is also possible to handle the element separately in a state where the surface is metallized. In this case, the glass substrate is a support base. The elements can be separated in the wafer state and mounted on the heat sink material on the mounting board, or can be mounted on the mounting board as it is without a heat sink. After mounting, the glass layer on the surface can be irradiated with ultraviolet rays to remove the glass layer which is a sacrificial substrate.

  FIG. 6 shows the change in the thickness of the SiC substrate in the process from the ingot to the element formation substrate. FIG. 6A shows the state of the ingot 40 that is the base of the SiC seed substrate. This is an example in which the shape is adjusted to a columnar shape and the diameter is 6 inches (150 mm) and the height is 2 inches (50 mm). A SiC seed substrate 45 having a thickness of 1 mm is cut from the ingot 40 by a diamond saw to form one SiC substrate at a time. The thickness of the cutting allowance 32 is about 100 μm. The part of the SiC seed substrate taken out from this ingot is the original SiC. FIG. 6B shows a single substrate. In the figure, the thickness of the SiC substrate is 1 mm, which is the SiC seed substrate 45. According to the method according to the idea of the present invention, the SiC layer 5 which is peeled off only 1 μm of the surface layer and transferred by smart cut is shown in part of the broken line in FIG. The seed substrate 45 having a thickness of 1 mm can be used more than 900 times with only 1 μm reduction. 6C shows the SiC layer 5 transferred by smart cut and the epitaxial SiC that becomes the drift layer 6 having a thickness of 10 μm as an epitaxial layer formed on the very thin original SiC film.

      FIG. 7 discloses an embodiment of the present invention. FIG. 7A shows a SiC seed substrate 45 having a diameter of 6 inches and a thickness of 1 mm, which is a seed substrate, obtained by processing an ingot which is a base of the SiC substrate into a diameter of 6 inches and a thickness of 2 inches, and polishing the surface. , Hydrogen ions are implanted from the surface to a depth of about 0.5 μm (ion implantation step). The hydrogen ion implantation layer is called a smart cut layer 4. The surface side is SiC layer 5 transferred by smart cut. FIG. 7B shows a state in which the surface on which the GaN thin film layer 51 (not shown) is formed is bonded to the sapphire substrate 50 having a thickness of about 200 μm, which is a substrate serving as a support base in this state (first bonding step). Thereafter, the SiC seed substrate 45 and the sapphire substrate 50 are bonded together and heated at about 1000 ° C. to cleave the smart cut layer 4 to separate the two substrates (cutting step). The surface is polished, SiC is epitaxially grown to 10 μm, and the drift layer 6 is formed (film increasing step) as shown in FIG. In this state, the support base is a sapphire substrate. The epitaxial SiC on the sapphire substrate is the drift layer 6, the MOSFET is formed in the drift layer 6, and the wiring layer 20 is wired (semiconductor element formation process), as shown in FIG. The gate electrode 9 and the source electrode 10 are on the surface layer. A glass substrate 52 having a thickness of about 200 μm is bonded to this surface via an adhesive 53 made of a photo-releasable adhesive (second bonding step). FIG. 7E shows the sapphire substrate 50 and the glass substrate 52 in which MOSFET elements are formed on SiC in this way. In this state, laser light is irradiated from the surface of the sapphire substrate, Ga is deposited on the GaN thin film layer, the sapphire substrate is peeled off (first substrate removal step), and the exposed SiC surface is metallized in FIG. is there. In order to peel off the GaN layer on the sapphire substrate with laser light, a laser lift-off technique that has already started to be used for light-emitting diodes can be applied. In FIG. 7-f, the support base is the glass substrate 52. In this state, a heat sink 33 made of a copper material plated with solder is bonded to the surface of the metallized SiC source electrode 19 on the back surface and bonded. In this state, the heat sink material has a wafer shape and becomes a support base after this. This state is shown in FIG. In this state, ultraviolet light is irradiated from the surface of the glass substrate 52, the adhesive is peeled off, the glass substrate is peeled (second substrate removing step), and the adhesive is washed away, as shown in FIG. 7-h. In this state, the support base is the heat sink 33. Thereafter, the element is separated and mounted on a lead frame or the like to complete the element.

FIG. 7 shows an example in which a GaN thin film layer 51 (not shown) is formed on a sapphire substrate 50 having a thickness of about 200 μm. In addition to the GaN thin film layer 51, an aluminum nitride film layer (first thin film layer) is formed. Then, it is also possible to irradiate laser light from the surface of the sapphire substrate, deposit Ga in the GaN thin film layer, and peel the sapphire substrate (first substrate removing step). In this case, the first thin film becomes a blocking layer from other layers when Ga is precipitated in the GaN thin film layer by laser light, and becomes a layer that assists the precipitation.

  FIG. 8 shows another embodiment of the present invention. The difference from FIG. 7 is that the heat sink material is not bonded in the substrate state, the semiconductor elements are separated in a state where the glass substrate is a support base, and the glass substrate 52 is removed after each element is mounted on the heat sink. It is to be. 8A shows a state in which a seed substrate 45 having a diameter of 6 inches and a thickness of 1 mm is cut from the ingot, the surface is polished, and hydrogen ions are implanted from the surface to a depth of about 0.5 μm. FIG. Thereafter, the process proceeds in the same manner as in FIG. 7, and the state shown in FIG. 8-f corresponds to FIG. 7-f. In this case, the elements are individually separated in the state of FIG. 8F and mounted on a lead frame or the like.

  FIG. 9 shows a state in which the element of FIG. 8-f is mounted on the lead frame. The support base of this element is a glass substrate 52. By irradiating ultraviolet light from the surface in this state, the adhesive resin 53 can be peeled off and the glass substrate 52 can be peeled off. Thereafter, the adhesive on the surface is removed, washed, and then wire bonded, as shown in FIG. 9B. After that, packaging is performed to complete the semiconductor device.

  7 and 8, the drift layer 6 epitaxially grown to about 10 μm on the SiC layer 5 having a thickness of about 0.5 μm transplanted by smart cut is too thin by itself and cannot be handled alone. This is a series of processes in which the base substrate is bonded to each purpose of the manufacturing process, and is repeatedly peeled to bond to the heat sink substrate of the final target substrate. The amount of the SiC type substrate is minimized, and the device is in a wafer state. It is groundbreaking to form a heat sink without separation

  7 and 8 show an example in which a sapphire substrate is used as the base substrate and a glass substrate is used as the second substrate, but various combinations of other substrate materials are possible.

  In the above case, the MOSFET is formed on the SiC substrate. However, various combinations of PN junctions and Schottky diodes can be formed in the same manner.

  In the above example, the SiC epitaxial layer is provided on the SiC smart cut layer. However, it is also possible to apply the SiC layer after smart cut or epitaxial growth to the GaN substrate for power devices. It is. By simply replacing the MOSFET created in FIGS. 7 and 8 with the GaN thin film layer, an inexpensive manufacturing process can be realized. FIG. 10 shows an example corresponding to the example of FIG.

FIG. 10-a shows a 6-inch diameter, 1-mm thick SiC seed substrate 45 cut from a 6-inch diameter, 2-inch thickness processed ingot, which is the base of the SiC substrate, and the surface is polished. Hydrogen ions are implanted from the surface to a depth of about 0.5 μm. The hydrogen ion implantation layer is called a smart cut layer 4. The surface side is SiC layer 5 transferred by smart cut. FIG. 10B shows a state in which the surface on which the lift-off Ga compound thin film layer 51 is formed is bonded to a 200 μm-thick sapphire substrate 50 which is a substrate serving as a support in this state. After that, with the SiC seed substrate 45 and the sapphire substrate 50 bonded together, heating is performed at about 1000 ° C. to cleave the substrate with a smart cut layer to separate both substrates and polish the SiC surface on the sapphire substrate. In response to this, SiC of about 2 μm is epitaxially grown to form the SiC layer 7 as shown in FIG. In this state, the support base is a sapphire substrate having a thickness of about 200 μm. A state in which a GaN (third compound semiconductor) layer for a power element is formed on a SiC layer on a sapphire substrate, a GaN transistor is formed on the GaN layer, and wiring is applied to the wiring layer 20 (semiconductor element element forming step) Is FIG. 10-d. In the figure, a GaN element 60 is formed, and a source electrode 10, a gate electrode 9, and a drain electrode 8 are formed on the surface of the electrode. In this state, the photo-releasable adhesive 53 is attached to the surface, and the glass substrate 52 having a thickness of 200 μm and the sapphire substrate on which the GaN element 60 is formed on the SiC substrate are attached in FIG. is there. By irradiating laser light from the surface of the sapphire substrate in this state, Ga was deposited on the Ga compound layer to separate the sapphire substrate, and the exposed SiC surface was metallized as shown in FIG. Peeling off the smart cut Ga compound layer on the sapphire substrate with laser light is a laser lift-off that has already begun to spread for light-emitting diodes. In the state of FIG. 10-f, the support base is the glass substrate 52. In this state, a heat sink 33 made of, for example, a copper material plated with solder is bonded to the surface of the metallized SiC substrate on the back surface and bonded. This state is shown in FIG. In this state, the ultraviolet light is irradiated from the surface of the glass substrate 52 to peel off the adhesive, peel off the glass substrate, and wash away the adhesive as shown in FIG. In this state, the support base is the heat sink 33. Thereafter, the elements are separated and mounted on a lead frame or the like to complete the semiconductor device.
In FIG. 10, when a current is not passed through the substrate in the power GaN element, it is not always necessary to use a conductive material such as copper as the heat sink material. The structure shown in FIG. 10 may be used as long as the structure allows current to flow vertically. FIG. 10 shows the case corresponding to FIG. 7, but the case corresponding to FIG. 8 can be easily applied.

The present invention is not limited to the embodiment described above, and various modifications can be made within the scope of the present invention depending on the purpose and application.
In the above case, the case has been shown as a target for bonding SiC, but this structure and manufacturing method can be applied regardless of the type of compound semiconductor. In compound semiconductors, the cost of crystal growth is often high. In that case, it is often disadvantageous in terms of cost to use the seed substrate obtained from the ingot as it is for the substrate. A manufacturing method using a support substrate at low cost by bonding and finally considering a necessary mounting form has a wide range of applications.

Industrial applicability

  Power-based compound semiconductor elements using SiC or the like are becoming increasingly important with the spread of hybrid vehicles and electric vehicles. In addition, with the spread of smart grids, the role of power-based compound semiconductor devices is becoming important for household appliances and for energy management. According to the present invention, the amount of SiC that is an expensive material can be significantly reduced, and an inexpensive SiC semiconductor device can be manufactured. This greatly contributes to the popularization of power compound semiconductor devices in this field.

DESCRIPTION OF SYMBOLS 1 ... SiC substrate 2 ... SiC base substrate (N ⁺⁺ layer)
DESCRIPTION OF SYMBOLS 4 ... Smart cut layer 5 ... SiC layer 6 moved by smart cut 6 ... SiC drift layer of epitaxial growth 7 ... Epitaxial SiC layer 8 ... Drain electrode 9 ... Gate electrode, 10 ... Source electrode 11 ... Source (N ⁺ layer) 12 ... Drain (N layer) 13 ... Gate electrode 14 ... Gate oxide film 15 ... P well 16 ... Current path 17 ...・ Expansion of depletion layer 18 ... Depletion layer arrival point 19 ... Drain electrode 20 ... Wiring layer 21 ... Circuit diagram source 22 ... Circuit diagram drain 23 ... Circuit diagram gate 24 ... Circuit diagram Source electrode 25 ... Drain electrode 27 ... Drift resistance of base substrate layer 28 ... Drift resistance of drift layer 29 ... Base substrate layer current path 30 ... Drift layer current Current path 33 ... heat sink 34 ... wire 35 ... drain electrode lead frame 36 ... gate electrode lead frame 37 ... source electrode lead frame 40 ... ingot 41 ... 200 μm SiC Substrate 42... Cutting margin 43... Corresponding portion 44... 160 μm thin SiC equivalent 45... 1 mm SiC substrate 50 .. Sapphire substrate 51. Lift-off GaN Thin film layer 52 ... Glass substrate 53 ... Adhesive 60 ... GaN device

Claims (12)

A method of manufacturing a semiconductor device using a first compound semiconductor,
An ion implantation step of implanting ions into the surface layer portion of the seed crystal substrate made of the first compound semiconductor;
A base substrate or a substrate formed by forming a second compound semiconductor layer on the surface of the base substrate or a substrate formed by forming the second compound semiconductor layer and the first thin film layer on the surface of the base substrate is a first substrate. And a first bonding step of bonding the surface of the first substrate and the surface of the surface layer portion ion-implanted by the ion implantation step;
A cutting step in which the surface layer portion ion-implanted by the ion implantation step is peeled off from a seed crystal substrate;
A semiconductor element forming step of forming a semiconductor element by forming at least one of a P-type region and an N-type region or a Schottky film and forming an electrode on the first compound semiconductor layer separated by the cutting step When,
A second bonding step of bonding the surface of the semiconductor element formed by the semiconductor element formation step and the surface of the second substrate;
A first substrate removing step of removing the first substrate after the second bonding step;
A second substrate removing step of bonding the surface from which the first substrate has been removed by the first substrate removing step and a third substrate, and then removing the second substrate;
A method for manufacturing a semiconductor device, comprising: A method of manufacturing a semiconductor device using a first compound semiconductor,
An ion implanter for implanting ions into the surface layer of the seed crystal substrate made of the first compound semiconductor;
A base substrate or a substrate formed by forming a second compound semiconductor layer on the surface of the base substrate or a substrate formed by forming the second compound semiconductor layer and the first thin film layer on the surface of the base substrate is a first substrate. And a first bonding step of bonding the surface of the first substrate and the surface of the surface layer portion ion-implanted by the ion implantation step;
A cutting step in which the surface layer portion ion-implanted by the ion implantation step is peeled off from a seed crystal substrate;
A third compound semiconductor is formed on the first compound semiconductor layer separated by the cutting step, and at least one of a P-type region and an N-type region is formed on the third compound semiconductor layer, and an electrode is formed. A semiconductor element forming step of forming a semiconductor element by
A second bonding step of bonding the surface of the semiconductor element formed by the semiconductor element formation step and the surface of the second substrate;
A first substrate removing step of removing the first substrate after the second bonding step;
A second substrate removing step of bonding the surface from which the first substrate has been removed by the first substrate removing step and a third substrate, and then removing the second substrate;
A method for manufacturing a semiconductor device, comprising: Before performing the semiconductor element forming step, a film increasing step is further performed in which the first compound semiconductor layer is further formed on the peeled first compound semiconductor layer, and the first compound semiconductor layer has a predetermined thickness. The manufacturing method of the semiconductor device of Claim 1 or 2 provided. Before performing the first bonding, a second compound semiconductor layer is formed on the surface of the surface layer portion that has been ion-implanted by the ion implantation step, or a first thin film layer and a second compound semiconductor layer are formed. The manufacturing method of the semiconductor device of Claim 1 thru | or 3 provided with the process to carry out.   5. The method of manufacturing a semiconductor device according to claim 1, wherein in the second substrate removing step, the second substrate is removed after the semiconductor element is separated and mounted on a mounting substrate.   The method for manufacturing a semiconductor device according to claim 1, wherein the base substrate is a sapphire substrate, and the second compound semiconductor is a Ga-based compound semiconductor.   The method of manufacturing a semiconductor device according to claim 6, wherein the first substrate removing step removes the first substrate by irradiating a surface of the sapphire substrate on which the Ga-based compound semiconductor is formed with laser light. The second substrate is transparent glass;
In the second bonding step, an adhesive layer using a material that is peeled off by light is formed on the surface of the semiconductor element, and then bonded to the surface of the second substrate through the adhesive layer.
The second substrate removing step removes the second substrate by irradiating with light.
A method for manufacturing a semiconductor device according to claim 1.   The method for manufacturing a semiconductor device according to claim 1, wherein the first compound semiconductor is silicon carbide SiC.   The method for manufacturing a semiconductor device according to claim 2, wherein the third compound semiconductor is gallium nitride GaN.   The method of manufacturing a semiconductor device according to claim 1, wherein the third substrate is a heat sink material.   The method of manufacturing a semiconductor device according to claim 1, wherein the first thin film is aluminum nitride.

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