TWI835575B - Manufacturing method of semiconductor wafer - Google Patents
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- TWI835575B TWI835575B TW112107680A TW112107680A TWI835575B TW I835575 B TWI835575 B TW I835575B TW 112107680 A TW112107680 A TW 112107680A TW 112107680 A TW112107680 A TW 112107680A TW I835575 B TWI835575 B TW I835575B
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Abstract
Description
本申請是涉及一種半導體領域,特別是關於一種半導體晶圓的製造方法。The present application relates to the field of semiconductors, and in particular to a manufacturing method of semiconductor wafers.
智能切割(Smart-cut®)技術是一種植入氣體離子然後進行剝離的技術,其可用來將晶圓材料(例如矽)所生成的超薄單晶體層移植到另一個基板的表面。具體來說,在一片晶圓中植入氣體離子,然後將該片晶圓與另一基板鍵合。接著,將鍵合的晶圓和基板進行大約500℃的熱處理,此時在氣體離子植入處會形成連續的空腔,使得晶圓的一部分自動剝離,進而形成絕緣層上覆矽(Silicon on Insulator,SOI)結構。Smart-cut® technology is a gas ion implantation and then peeling technology that can be used to transplant ultra-thin single crystal layers generated by wafer materials (such as silicon) to the surface of another substrate. Specifically, gas ions are implanted in a wafer, and then the wafer is bonded to another substrate. Then, the bonded wafer and substrate are heat treated at about 500°C. At this time, continuous cavities are formed at the gas ion implantation site, causing part of the wafer to automatically peel off, thereby forming a silicon on insulator (SOI) structure.
然而,在習知的智能切割技術中,晶圓與基板之間是採用永久性鍵合(Permanent Wafer Bonding),導致智能切割後的SOI結構存在一定的厚度,難以進一步薄型化。此外,由於智能切割後保留的晶圓厚度為微米等級,且其尺寸至少為6吋以上,即使藉由研磨等技術對該SOI結構進行機械加工以去除基板,現今的加工技術也難以達到目標的精確度,進而衍生了各種製程風險。再者,不論是否經由機械加工,該基板都無法被重複利用,進而導致生產成本高昂。However, in the conventional smart cutting technology, permanent wafer bonding is used between the wafer and the substrate, resulting in a certain thickness of the SOI structure after smart cutting, making it difficult to further reduce the thickness. In addition, since the thickness of the wafer retained after smart cutting is in the micron range and its size is at least 6 inches, even if the SOI structure is mechanically processed to remove the substrate through grinding and other techniques, it is difficult to achieve the target with current processing technology. Accuracy, which in turn derives various process risks. Furthermore, the substrate cannot be reused regardless of mechanical processing, resulting in high production costs.
有鑑於此,有必要提供一種半導體晶圓的製造方法 ,以解決上述技術問題。In view of this, it is necessary to provide a manufacturing method for semiconductor wafers to solve the above technical problems.
為解決上述習知技術之問題,本申請之目的在於提供一種半導體晶圓的製造方法,其能實現將進行智能切割後的晶圓與基板分離。In order to solve the above-mentioned problems of the conventional technology, the purpose of this application is to provide a manufacturing method of a semiconductor wafer, which can separate the wafer from the substrate after smart cutting.
在一方面,本申請提供一種半導體晶圓的製造方法,包括:提供一晶圓和一支撐基板,其中該晶圓包含一第一部分和一第二部分;在該支撐基板的表面形成一分離層;鍵合該支撐基板與該晶圓,其中該分離層形成在該支撐基板與該晶圓之間;對鍵合的該支撐基板與該晶圓進行一智能切割處理以去除該晶圓的該第一部分;以及藉由該分離層將該支撐基板與該晶圓的該第二部分分離。In one aspect, the present application provides a method for manufacturing a semiconductor wafer, including: providing a wafer and a support substrate, wherein the wafer includes a first part and a second part; forming a separation layer on the surface of the support substrate ; Bonding the support substrate and the wafer, wherein the separation layer is formed between the support substrate and the wafer; performing an intelligent cutting process on the bonded support substrate and the wafer to remove the wafer a first part; and separating the support substrate from the second part of the wafer by the separation layer.
在一些實施例中,在形成該分離層的步驟中,該製造方法還包括:在該支撐基板的該表面沉積一材料層,其中該材料層與該支撐基板的材料不同,並且該材料層作為該分離層。In some embodiments, in the step of forming the separation layer, the manufacturing method further includes: depositing a material layer on the surface of the support substrate, wherein the material layer is different from the material of the support substrate, and the material layer serves as The separation layer.
在一些實施例中,在形成該分離層的步驟中,該製造方法還包括:對該支撐基板的該表面進行表面處理以形成一晶格缺陷層,其中該晶格缺陷層作為該分離層。In some embodiments, in the step of forming the separation layer, the manufacturing method further includes: performing surface treatment on the surface of the support substrate to form a lattice defect layer, wherein the lattice defect layer serves as the separation layer.
在一些實施例中,該分離層的能帶小於該支撐基板的能帶。In some embodiments, the energy band of the separation layer is smaller than the energy band of the support substrate.
在一些實施例中,在藉由該分離層將該支撐基板與該晶圓的該第二部分分離的步驟中,該製造方法包括:藉由一雷射照射該分離層以將該支撐基板與該晶圓分離。In some embodiments, in the step of separating the support substrate from the second part of the wafer through the separation layer, the manufacturing method includes: irradiating the separation layer with a laser to separate the support substrate from the second part of the wafer. The wafer is separated.
在一些實施例中,該分離層的該能帶對應第一波長,該支撐基板的該能帶對應第二波長,以及該雷射發出的波長介於該第一波長和該第二波長之間。In some embodiments, the energy band of the separation layer corresponds to a first wavelength, the energy band of the support substrate corresponds to a second wavelength, and the wavelength emitted by the laser is between the first wavelength and the second wavelength. .
在一些實施例中,在藉由該分離層將該支撐基板與該晶圓的該第二部分分離的步驟中,該製造方法還包括:藉由一蝕刻製程去除該分離層以將該支撐基板與該晶圓分離。In some embodiments, in the step of separating the support substrate from the second part of the wafer through the separation layer, the manufacturing method further includes: removing the separation layer through an etching process to separate the support substrate. separated from the wafer.
在一些實施例中,在進行該智能切割處理以去除該晶圓的該第一部分之後,該製造方法還包括:暴露出該晶圓的該第二部分的一第一表面;在該第一表面形成一源極。在藉由該分離層將該支撐基板與該晶圓的該第二部分分離之後,該製造方法還包括:暴露出該晶圓的該第二部分的一第二表面,其中該第二表面相對於該第一表面;在該第二表面形成一汲極。In some embodiments, after performing the smart cutting process to remove the first portion of the wafer, the manufacturing method further includes: exposing a first surface of the second portion of the wafer; form a source. After the support substrate is separated from the second part of the wafer by the separation layer, the manufacturing method further includes: exposing a second surface of the second part of the wafer, wherein the second surface is opposite on the first surface; forming a drain on the second surface.
在一些實施例中,在提供該晶圓的步驟中,該製造方法還包括:將該晶圓進行氣體離子布植以在該晶圓內部形成一氣體離子層,其中該氣體離子層形成在該第一部份和該第二部分之間。在進行該智能切割處理時,該製造方法還包括:將鍵合的該支撐基板與該晶圓進行熱處理以使得該氣體離子層形成氣泡,進而使得該晶圓的該第一部分與該第二部分分離。In some embodiments, in the step of providing the wafer, the manufacturing method further includes: performing gas ion implantation on the wafer to form a gas ion layer inside the wafer, wherein the gas ion layer is formed on the wafer. between the first part and the second part. When performing the smart cutting process, the manufacturing method further includes: performing heat treatment on the bonded support substrate and the wafer to cause the gas ion layer to form bubbles, thereby making the first part and the second part of the wafer separation.
相較於先前技術, 本申請提供了一種半導體晶圓的製造方法,其藉由預先設置的分離層將進行智能切割後的支撐基板與晶圓分離,故可在晶圓的相對兩表面進行對應的製程,使得半導體晶圓的應用領域更為廣泛。其次,最終形成的半導體晶圓其厚度更薄,有利於製造薄型化的電子器件。再者,分離後的支撐基板可回收並重覆利用,進而可有效地降低生產成本。Compared with the prior art, this application provides a method for manufacturing a semiconductor wafer, which separates the support substrate after smart cutting from the wafer through a preset separation layer, so that corresponding processing can be performed on the two opposite surfaces of the wafer. The manufacturing process makes the application fields of semiconductor wafers wider. Secondly, the thickness of the final semiconductor wafer is thinner, which is conducive to the manufacture of thinner electronic devices. Furthermore, the separated support substrate can be recycled and reused, thereby effectively reducing production costs.
爲了讓本申請之上述及其他目的、特徵、優點能更明顯易懂,下文將特舉本申請較佳實施例,並配合所附圖式,作詳細說明如下。In order to make the above and other objects, features, and advantages of the present application more obvious and understandable, preferred embodiments of the present application will be cited in the following and described in detail with reference to the attached drawings.
請參照圖1,其顯示一系列的示意圖,用以說明本申請之實施例之半導體晶圓的製造方法。首先,提供待處理的晶圓10和支撐基板20。可選地,晶圓10的材料包括,但不限於,矽、藍寶石、氮化鎵(GaN)、碳化矽(SiC)等。支撐基板20的材料包括,但不限於,碳化矽(SiC)、氮化鎵、氮化鋁(AlN)等。Please refer to FIG. 1 , which shows a series of schematic diagrams for illustrating a semiconductor wafer manufacturing method according to an embodiment of the present application. First, the
如圖1所示,在步驟S111中,提供待處理的晶圓10,並且先對晶圓10進行預處理。預處理具體為以氣體離子(例如氫、鈍氣等)對晶圓10進行離子布植以在晶圓10內部形成氣體離子層13。也就是說,提供的晶圓10包括層疊的第一部分11、第二部分12和氣體離子層13,其中氣體離子層13位於第一部分11和第二部分12之間。應當理解的是,上述對晶圓10進行預處理的步驟可以藉由例如離子布植機等裝置來實現。As shown in FIG. 1 , in step S111 , a
如圖1所示,在步驟S112中,提供待處理的支撐基板20,並且先對支撐基板20進行預處理。預處理具體為在支撐基板20的表面形成一層分離層21。在一些實施例中,分離層21是藉由在支撐基板20的表面沉積一層材料層而形成。該材料層與支撐基板20的材料不同,例如該材料層為矽層,以及支撐基板20包含矽以外的材料,如碳化矽、氮化鎵、氮化鋁等,不侷限於此。也就是說,將該材料層(例如矽層)作為分離層21。應當理解的是,上述分離層21的形成可以藉由例如化學氣相沉積法及相關裝置來實現。As shown in FIG. 1 , in step S112 , a
可選地,在一些實施例中,分離層21是藉由對支撐基板20的表面進行表面處理而形成。舉例來說,表面處理可藉由離子布植、離子轟擊、化學處理等方法執行。支撐基板20經由表面處理後會在其表面形成一層晶格缺陷層,並且該晶格缺陷層作為分離層21。應當注意的是,藉由表面處理所形成的分離層21其材料與支撐基板20的材料相同,故分離層21與支撐基板20的材料特性(如熔點等)大致相同。此外,兩者主要差別在於,由於分離層21的晶格具有較多的缺陷,故分離層21的能帶(bandgap)小於支撐基板20的能帶。應當理解的是,上述分離層21的形成可以藉由例如離子布植機、離子轟擊裝置、濕蝕刻或乾蝕刻方法及其相關裝置來實現。Optionally, in some embodiments, the
應當注意的是,在本申請中,分離層21的形成方法與後續製程的條件(例如溫度)相關,具體採用的形成方法將詳述於後。此外,晶圓10、支撐基板20和分離層21的材料選用亦與後續製程的條件相關,具體內容將詳述於後。It should be noted that in this application, the formation method of the
如圖1所示,在對晶圓10和支撐基板20進行預處理之後,進行步驟S120,採用晶圓鍵合技術將支撐基板20與晶圓10鍵合。此時,分離層21設置在支撐基板20與晶圓10之間。晶圓鍵合技術意旨將兩基板互相結合,可不使用任何黏著劑,使得鍵合介面保持潔淨,進而滿足微電子及光電材料對介面屬性嚴苛的要求。晶圓鍵合技術可採用多種方法來執行,例如室溫鍵合法(Room-Temperature Bonding)、陽極鍵合法(Anodic Bonding)、直接鍵合法(Direct Bonding)、真空鍵合法(Vacuum Bonding)、黏接鍵合法(Adhesive Bonding)、離子加強鍵合法(Ion Enhanced Bonding)、電漿活化鍵合法(Plasma Activation Bonding)、共晶低溫鍵合法(Eutectic Low Temperature Bonding)等。As shown in FIG. 1 , after the
如圖1所示,在鍵合支撐基板20與晶圓10之後,進行步驟S130,對鍵合的支撐基板20與晶圓10進行智能切割處理以去除晶圓10的第一部分11。具體來說,將鍵合的支撐基板20與晶圓10進行大約500℃的熱處理,此時氣體離子層13會形成氣泡。這些氣泡會形成連續的空腔,進而使得晶圓10的第一部分11與第二部分12分離。晶圓10的第二部分12與支撐基板20保持鍵合狀態。另一方面,分離後的晶圓10的第一部分11可回收並且作為另一道半導體製程的待處理晶圓(如步驟S111中提供的晶圓10)。As shown in FIG. 1 , after the
如圖1所示,在去除晶圓10的第一部分11之後,暴露出晶圓10的第二部分12的第一表面121。接著,進行步驟S140,在第一表面121形成各種功能元件層,如源極31等。功能元件層的形成可藉由參雜等製程來實現。As shown in FIG. 1 , after the
如圖1所示,在完成第一表面121的功能元件層的設置之後,進行步驟S150,使用例如雷射剝離技術(Laser Lift-Off),藉由分離層21將支撐基板20與晶圓10分離。具體地,當採用雷射剝離技術時,雷射40發出雷射光41,並將雷射光41照射分離層21。As shown in FIG. 1 , after completing the arrangement of the functional element layer on the
可選地,在一些實施例中,在步驟S150中,也可以採用蝕刻技術去除分離層21。當採用蝕刻技術時,根據分離層21的材料或晶格結構選擇適合的蝕刻液體及其蝕刻液配比,接著將支撐基板20與晶圓10浸泡在所選擇的蝕刻液體中。藉由上述蝕刻製程可去除支撐基板20和晶圓10之間的分離層21。Optionally, in some embodiments, in step S150, etching technology may also be used to remove the
如圖1所示,以雷射或蝕刻技術弱化或去除分離層21之後,進行步驟S160,將支撐基板20與晶圓10的第二部分12分離。具體地,若照射雷射光41之後,分離層21吸收雷射光41並將其轉換成熱能,進而產生熱分解現象。應當理解的是,雷射光41的波長與分離層21和支撐基板20的能帶相關。進一步來說,為了使分離層21有效地吸收雷射40所發出的能量,分離層21的能帶可小於支撐基板20的能帶,並且雷射光41的波長介於兩者的能帶對應的波長之間。也就是說,分離層21的能帶對應第一波長,支撐基板20的能帶對應第二波長,以及雷射光41的波長介於第一波長和第二波長之間。As shown in FIG. 1 , after the
另一方面,如圖1所示,在本申請中,分離後的支撐基板20可回收並重覆利用。也就是說,支撐基板20可作為另一道半導體製程的待處理支撐基板20(如步驟S112中提供的支撐基板20)。藉由將支撐基板20回收再利用可有效地降低生產成本。On the other hand, as shown in FIG. 1 , in this application, the separated
如圖1所示,在將支撐基板20與晶圓10的第二部分12分離之後,進行步驟S170,暴露出晶圓10的第二部分12的第二表面122。第二表面122相對於第一表面121。接著,可在第二表面122形成各種功能元件層,如汲極32等。功能元件層的形成可藉由參雜等製程來實現。As shown in FIG. 1 , after the supporting
應當理解的是,在本申請中,由於藉由分離層21將支撐基板20與晶圓10分離,故晶圓10的第二部分12的相對兩表面皆曝露出來,進而可在晶圓10的第二部分12的相對兩表面進行對應的製程(如形成功能元件層)。也就是說,最終形成的半導體晶圓10(第二部分12)其厚度更薄,並且可適用於製造電流為垂直傳遞(例如電流從晶圓的第二表面122的汲極32往第一表面121的源極31傳遞)的電子元件,例如功率器件(power device)。反觀,在習知技術中,經由智能切割後形成的SOI結構,其晶圓的其中一表面與基板鍵合在一起,使得該SOI結構只能用於製造電流為水平傳遞(電流沿著平行表面的方向傳遞)的電子元件。相較之下,本申請所製造出的半導體晶圓的應用領域更為廣泛。It should be understood that in this application, since the
請參照表一,其顯示各種材料的特性比較。Please refer to Table 1, which shows a comparison of the properties of various materials.
表一:
第一實施例:First embodiment:
在本申請的第一實施例中,支撐基板20的材料可包含,但不限於,為高能帶的材料,如碳化矽、氮化鎵、氮化鋁(能帶約6.2 eV)。又,分離層21的材料可包含,但不限於,低能帶的材料,如矽。舉例來說,分離層21的形成方法是藉由沉積製程在支撐基板20的表面形成矽層,並且形成的矽層作為分離層21。如表一所示,以支撐基板20的材料為4H-SiC為例,支撐基板20的能帶為3.26 eV,以及分離層21的能帶為1.1 eV。雷射發出的波長應當介於支撐基板20和分離層21的能帶對應的波長之間,即雷射發出的波長大於380nm且小於1100nm。在本實施例中,晶圓10的材料包括矽、藍寶石、氮化鎵等,不侷限於此。In the first embodiment of the present application, the material of the
第二實施例:Second embodiment:
在本申請的第二實施例中,晶圓10的材料為高熔點的材料,如氮化鎵或碳化矽等。又,支撐基板20的材料亦為碳化矽等高熔點的材料,以及分離層21的材料與支撐基板20的材料相同,如碳化矽。舉例來說,分離層21的形成方法是藉由將支撐基板20進行表面處理,以在其表面形成一層晶格缺陷層,並且該晶格缺陷層作為分離層21。應當注意的是,藉由表面處理所形成的分離層21其材料與支撐基板20的材料相同,故分離層21與支撐基板20的熔點相同。此外,由於分離層21的晶格具有較多的缺陷,故分離層21的能帶小於支撐基板20的能帶。應當理解的是,雷射的波長選擇與分離層21和支撐基板20的能帶相關,在此不加以贅述。In the second embodiment of the present application, the material of the
再者,在本申請的第二實施例中,由於晶圓10、支撐基板20和分離層21皆為高熔點的材料,故適用於高溫製程。舉例來說,在步驟S140中,可藉由高溫(例如1700°C)參雜製程來形成所需的功能元件層。此時,由於分離層21的熔點高達例如2830°C,故可避免分離層21提前分解。Furthermore, in the second embodiment of the present application, since the
應當理解的是,在本申請中,分離層21的材料優選為無機物,並且避免採用有機化合物(如黏著劑)。採用有機化合物作為分離層容易導致分離層提前分解(如在高溫環境下分解),進而影響後續的製程。其次,有機化合物容易釋放出或殘留非預期的物質而導致晶圓汙染。It should be understood that in this application, the material of the
相較於現有技術, 本申請提供了一種半導體晶圓的製造方法,其藉由預先設置的分離層將進行智能切割後的支撐基板與晶圓分離,故可在晶圓的相對兩表面進行對應的製程,使得半導體晶圓的應用領域更為廣泛。其次,最終形成的半導體晶圓其厚度更薄,有利於製造薄型化的電子器件。再者,分離後的支撐基板可回收並重覆利用,進而可有效地降低生產成本。Compared with the existing technology, this application provides a method for manufacturing a semiconductor wafer, which separates the support substrate after smart cutting from the wafer through a preset separation layer, so that corresponding processing can be performed on the two opposite surfaces of the wafer. The manufacturing process makes the application fields of semiconductor wafers wider. Secondly, the thickness of the final semiconductor wafer is thinner, which is conducive to the manufacture of thinner electronic devices. Furthermore, the separated support substrate can be recycled and reused, thereby effectively reducing production costs.
以上僅是本揭示的較佳實施方式,應當指出,對於所屬領域具有通常知識者,在不脫離本揭示原理的前提下,還可以做出若干改進和潤飾,這些改進和潤飾也應視爲本揭示的保護範圍。The above are only preferred embodiments of the present disclosure. It should be noted that those with ordinary knowledge in the art can make several improvements and modifications without departing from the principles of the present disclosure. These improvements and modifications should also be regarded as the present disclosure. Revealed scope of protection.
10:晶圓10:wafer
11:第一部分11:Part One
12:第二部分12:Part 2
121:第一表面121: First surface
122:第二表面122: Second surface
13:氣體離子層13: Gas ion layer
20:支撐基板20: Support base plate
21:分離層21:Separation layer
31:源極31:Source
32:汲極32:Jiji
40:雷射40:Laser
41:雷射光41:Laser light
S111、S112、S120~S170:步驟S111, S112, S120~S170: steps
圖1顯示一系列的示意圖,用以說明本申請之實施例之半導體晶圓的製造方法。FIG. 1 shows a series of schematic diagrams for illustrating a semiconductor wafer manufacturing method according to an embodiment of the present application.
10:晶圓 10:wafer
11:第一部分 11:Part One
12:第二部分 12:Part 2
121:第一表面 121: First surface
122:第二表面 122: Second surface
13:氣體離子層 13: Gas ion layer
20:支撐基板 20:Support base plate
21:分離層 21:Separation layer
31:源極 31:Source
32:汲極 32:Jiji
40:雷射 40:Laser
41:雷射光 41:Laser light
S111、S112、S120~S170:步驟 S111, S112, S120~S170: steps
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TW200518203A (en) * | 2003-11-18 | 2005-06-01 | United Sol Corp | A method to fabricate a thin film on a substrate |
TW201732869A (en) * | 2015-11-27 | 2017-09-16 | 信越化學工業股份有限公司 | Wafer processing laminate and method for processing wafer |
CN112585305A (en) * | 2018-08-09 | 2021-03-30 | 信越化学工业株式会社 | Method for manufacturing GaN laminated substrate |
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TW200518203A (en) * | 2003-11-18 | 2005-06-01 | United Sol Corp | A method to fabricate a thin film on a substrate |
TW201732869A (en) * | 2015-11-27 | 2017-09-16 | 信越化學工業股份有限公司 | Wafer processing laminate and method for processing wafer |
CN112585305A (en) * | 2018-08-09 | 2021-03-30 | 信越化学工业株式会社 | Method for manufacturing GaN laminated substrate |
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