WO2017138499A1 - Method for manufacturing semiconductor element, and semiconductor substrate - Google Patents

Abstract

Provided are: a method for manufacturing a semiconductor element by which a thin, high-withstand-voltage semiconductor element is manufactured using a carbon substrate; and a semiconductor substrate. This method for manufacturing a semiconductor element is provided with: a first film-formation step for forming a film of a polycrystalline SiC layer 3 on at least one surface of a carbon substrate 1; a hydrogen layer forming step for forming a hydrogen implantation layer 25 on a single-crystal substrate 2 comprising a first semiconductor material; a bonding step for bonding the single-crystal substrate 2 and the surface of the polycrystalline SiC layer 3 formed on the carbon substrate 1; a separation step for leaving a first single crystal layer 21 on the polycrystalline SiC layer 3 by separating the single-crystal substrate 2 using the hydrogen implantation layer 25; a second film-formation step for obtaining a multi-layer substrate in which a second single crystal layer 4 comprising a second semiconductor material is formed by film-formation on the first single crystal layer 21; and an element formation step for forming a semiconductor element on the second single crystal layer 4.

Description

Semiconductor device manufacturing method and semiconductor substrate

The present invention relates to a method for manufacturing a semiconductor element and a semiconductor substrate. More specifically, the present invention relates to a method for manufacturing a semiconductor element having a thin thickness and a high breakdown voltage by using a carbon substrate, and a semiconductor substrate for forming the high breakdown voltage semiconductor element.

A silicon carbide (hereinafter also referred to as “SiC”) semiconductor substrate having a large band gap is attracting attention as a substrate for a semiconductor element for high voltage applications. FIG. 15 (a) shows a cross-sectional structure of a general vertical structure Schottky diode (91) made of SiC. An active layer 902 is formed by epitaxial growth on a support substrate 901 made of a single crystal, and P- type impurity layers 911 and 912 serving as a guard ring and a Schottky electrode 913 are formed in the active layer 902 region. The current i flows between the Schottky electrode 913 and the electrode 903 formed on the bottom surface of the support substrate 901.
FIG. 2B shows the cross-sectional structure of a general vertical MOSFET (92) made of SiC. An active layer 902 is formed by epitaxial growth on a support substrate 901 made of a single crystal, and a source 921, a drain 922, and a gate 923 are formed in the region of the active layer 902. The conduction and interruption of the current between the source 921 and the drain 922 are controlled by the gate 923. The drain current i during conduction flows between the drain 922 and the electrode 903 formed on the bottom surface of the support substrate 901.
The support substrate 901 is a region where current flows in the vertical direction (vertical direction in the drawing), and has a low resistivity of 20 mΩ · cm or less. On the other hand, the active layer 902 requires a high voltage withstand voltage, and therefore has a resistivity that is two to three orders of magnitude higher than that of the support substrate 901. Since a semiconductor element using SiC has a large band gap width, the thickness of the active layer 902 can be reduced to about 5 to 10 μm. Since the active layer 902 is formed on the support substrate 901 by epitaxial growth, the crystallinity of the active layer 902 depends on the base support substrate 901. For this reason, the SiC crystal quality of the support substrate 901 is important. The thickness of the support substrate 901 is required to be about 300 μm in the case of a 6-inch substrate in order to prevent cracking when handling the single crystal substrate. Then, after forming the element on the front surface side of the substrate, in order to reduce the resistance of the support substrate portion, the back surface is ground and the thickness is reduced to 100 μm or less.

Since SiC is a compound composed of carbon and silicon having different lattice constants, many crystal defects are generated in the element substrate. In particular, since crystal defects are fatal in power device applications, various attempts have been made to reduce crystal defects, but the cost of the device substrate is therefore high. For this reason, it is an issue to achieve both reduction of crystal defects and cost reduction of the support substrate 901 which is the base of the active layer 902 to be epitaxially grown. Further, in the case of a device having a vertical structure as shown in FIG. 15, the support substrate 901 needs to have a low resistivity in order to flow a current in the vertical direction. It is considered a semiconductor. In addition, after the element is formed, the resistance of the support substrate layer is further reduced by processing the support substrate 901 thinly.
Thus, an expensive single crystal substrate is used as a substrate for a semiconductor element, and the thickness of the single crystal substrate is not increased for the active layer, but is increased for handling the substrate in the element formation process. Has been. Further, after the element is formed, the substrate is processed thinly, and a large part of the single crystal substrate is currently removed by grinding.

Also, as the substrate of the semiconductor element made of SiC, only the surface active layer may be a single crystal. The supporting substrate layer may be monocrystalline, polycrystalline, or amorphous regardless of crystallinity. Conventionally, there is a substrate manufacturing method in which a single crystal active layer and a non-single crystal support substrate layer are bonded. For example, there is a substrate manufacturing method in which amorphous silicon is deposited on a polycrystalline SiC support, the polycrystalline SiC support and a single crystal SiC substrate are joined, and integrated by direct bonding (see Patent Document 1). ). An example in which substrates are bonded by a surface activation method is also disclosed (see Non-Patent Documents 1 and 2).

Special table 2004-503942 Japanese Patent Laid-Open No. 2002-280531

As described above, conventionally, in a substrate of a semiconductor element for high voltage use, a thin film layer made of a single crystal is formed as an active layer on a support substrate (support layer) having a certain thickness. The active layer is manufactured by epitaxial growth. Since this support substrate may be a single crystal or a polycrystal, a method of bonding a thin single crystal layer and an inexpensive polycrystalline semiconductor substrate by a bonding technique has been proposed. Any of the methods described in Patent Documents 1 and 2 and Non-Patent Document 1 are methods for reducing the cost of the support substrate. However, the bonding substrate made of different materials has a large amount of warpage due to a difference in thermal expansion coefficient and non-uniformity of crystals, and there are many problems in practical use.

Conventionally, a thick single crystal SiC substrate of about 350 μm is used for handling during processing, and finally the thickness of the support layer is reduced to about 100 μm in order to obtain good device characteristics. However, this has a problem that an expensive single crystal substrate is not fully utilized. Considering that the support layer is thinned by grinding after element formation, it is possible to eliminate the waste part of the expensive single crystal substrate by making it possible to use a thin substrate as an element substrate. For example, in the case of a substrate for an SiC element, since the material has a large band gap width, the thickness of the substrate is sufficient for the thickness of the epitaxial layer portion of the surface layer even for a high voltage element. You can pay attention. However, there is a problem that a thin substrate is easy to bend and warpage increases. Conventionally, there have been no reports of practical use of elements by using such a thin substrate that is easily bent or a substrate having a large warp.

The present invention has been made in view of the above-described situation, and a method for manufacturing a semiconductor element having a thin thickness and a high breakdown voltage by using a carbon substrate, and a method for forming a high breakdown voltage semiconductor element. An object is to provide a semiconductor substrate.

The present invention is as follows.
1. A first film forming step of forming a polycrystalline SiC layer on at least one plane of the carbon substrate;
A hydrogen layer forming step of forming a hydrogen injection layer at a predetermined depth from one plane of a single crystal substrate made of a single crystal of a first semiconductor material;
A bonding step of bonding the surface of the polycrystalline SiC layer formed on the plane of the carbon substrate and the one plane of the single crystal substrate;
Separating the single crystal substrate with the hydrogen injection layer to leave the one plane side of the separated single crystal substrate on the polycrystalline SiC layer as a first single crystal layer;
By forming a second single crystal layer made of a second semiconductor material on the surface of the first single crystal layer, the polycrystalline SiC layer, the first single crystal layer and the carbon substrate are formed on the carbon substrate. A second film forming step of obtaining a multilayer substrate in which a second single crystal layer is sequentially laminated;
An element forming step of forming a semiconductor element on the second single crystal layer of the multilayer substrate;
The manufacturing method of the semiconductor element characterized by the above-mentioned.
2. 1. the removing step of removing the carbon substrate from the multilayer substrate; The manufacturing method of the semiconductor element of description.
3. In the first film forming step, the polycrystalline SiC layer is formed so as to cover both flat surfaces and side surfaces of the carbon substrate. Or 2. The manufacturing method of the semiconductor element of description.
4). In the bonding step, the surface of the polycrystalline SiC layer formed on each plane of the carbon substrate and the one plane of the two single crystal substrates are respectively bonded.
After performing the separation step, in the second film formation step, the second single crystal layers are formed on the surfaces of both the first single crystal layers, respectively. Obtaining a multilayer substrate in which the polycrystalline SiC layer, the first single crystal layer, and the second single crystal layer are sequentially laminated;
In the element formation step, a semiconductor element is formed on each of the second single crystal layers formed on both surfaces of the multilayer substrate.
3 above. The manufacturing method of the semiconductor element of description.
5). The element forming step includes the first element forming step performed before the removing step and the second element forming step performed after the removing step. To 4. The manufacturing method of the semiconductor element in any one of.
6). The end of the surface of the carbon substrate on which the polycrystalline SiC layer is formed is chamfered. To 5. The manufacturing method of the semiconductor element in any one of.
7). The first semiconductor material is one of SiC, GaN and gallium oxide;
The second semiconductor material is one of SiC, GaN, and gallium oxide. To 6. The manufacturing method of the semiconductor element in any one of.
8). 6. The first semiconductor material is SiC. The manufacturing method of the semiconductor element of description.
9. In the second film formation step, the first single crystal layer is formed by epitaxial growth or MOCVD. To 8. The manufacturing method of the semiconductor element in any one of.
10. A polycrystalline SiC layer, or a carbon substrate having a polycrystalline SiC layer formed on the surface thereof;
A first single crystal layer made of a single crystal of a first semiconductor material formed on the polycrystalline SiC layer;
A second single crystal layer made of a single crystal of a second semiconductor material formed on the first single crystal layer;
A semiconductor substrate comprising:
11. The first semiconductor material is one of SiC, GaN and gallium oxide;
10. The second semiconductor material is one of SiC, GaN, and gallium oxide. The semiconductor substrate as described.
12 10. The first semiconductor material is SiC. The semiconductor substrate as described.

According to the method for manufacturing a semiconductor element of the present invention, a first film forming step of forming a polycrystalline SiC layer on at least one plane of a carbon substrate, and a single crystal substrate made of a single crystal of a first semiconductor material. A hydrogen layer forming step of forming a hydrogen injection layer at a predetermined depth from one plane; a surface of the polycrystalline SiC layer formed on the plane of the carbon substrate; and the one plane of the single crystal substrate. By separating the single crystal substrate by the hydrogen injection layer, the one plane side of the separated single crystal substrate is left as the first single crystal layer on the polycrystalline SiC layer A separation step and forming a second single crystal layer made of a second semiconductor material on the surface of the first single crystal layer, thereby forming the polycrystalline SiC layer and the first single layer on the carbon substrate. A crystal layer and the second single crystal layer in order Comprising a second film forming step of obtaining a multilayer substrate which is a layer, and a device forming step for forming a semiconductor element on said second single crystal layer of the multilayer substrate. For this reason, the carbon substrate becomes the foundation of the polycrystalline SiC film formation, and the warp and the bending of the multilayer substrate are suppressed by the carbon substrate that can withstand a high temperature and has less warp. Thus, in the element formation step, a semiconductor element can be formed in the second single crystal layer using a general-purpose photolithography apparatus or the like. This semiconductor element includes a carbon substrate and a polycrystalline SiC layer as a supporting substrate (supporting layer), and a second single crystal layer serving as an active layer is laminated on the polycrystalline SiC layer. Further, after forming a part of the semiconductor element, the carbon substrate can be removed if necessary (removal step), and a polycrystalline SiC layer having a required thickness can be used as the support substrate. Since the polycrystalline SiC layer is tougher than the single crystal, it is suitable as a support substrate.
In the element formation step, a multi-layer substrate using a carbon substrate as a support can be processed. In particular, since semiconductors such as SiC suitable for high power applications have a small impurity diffusion coefficient, doping by thermal diffusion is difficult for both N-type impurities and P-type impurities. Further, self-alignment processing by thermal diffusion as in the Si semiconductor manufacturing process is impossible. Therefore, in order to determine the addition position of the N-type impurity and the P-type impurity, a high-precision exposure machine such as a stepper is required, and it is required to suppress the warp or bend of the semiconductor substrate to about 20 μm or less. Since the multilayer substrate in this manufacturing method can be suppressed from being warped or bent by the carbon substrate, a semiconductor element including an impurity region or the like can be formed in the second single crystal layer using a stepper.

Further, according to the method for manufacturing a semiconductor element of the present invention, it is possible to minimize the usage amount of a single crystal substrate made of a single crystal of a first semiconductor material (for example, SiC). Conventionally, as a general semiconductor substrate for high power use, a single crystal SiC substrate having a high concentration of N-type and having a thickness of about 350 μm is used as a support layer, and a single crystal having a thickness of about 5 μm is formed thereon by epitaxial growth. A SiC thin film (low-concentration N-type layer) is formed. Then, after forming a semiconductor element on the single crystal SiC thin film, the substrate is polished and thinned to about 100 μm in order to reduce the resistance value of the support layer portion, and then the electrode is processed on the back surface of the substrate. . According to the method for manufacturing a semiconductor element of the present invention, the N-type layer is constituted by the first single crystal layer separated from the single crystal substrate, and the thickness thereof can be reduced to about 0.5 μm. On top of that, a second single crystal layer having a necessary thickness and necessary impurity concentration is formed by epitaxial growth or MOCVD (Metal-Organic-Chemical-Vapor-Deposition). Can do. In a form in which the carbon substrate is not removed, the polycrystalline SiC layer and the carbon substrate are the support layers of the semiconductor element. In that case, since the resistance value of the carbon substrate is extremely small, the resistance value of the polycrystalline SiC layer becomes dominant as the resistance value of the support layer. Therefore, the resistance value can be reduced by thinning the polycrystalline SiC layer. Further, in the embodiment in which the carbon substrate is removed after part of the semiconductor element is formed, the resistance value of the support layer is determined only by the polycrystalline SiC layer, and the resistance value can be reduced by making the polycrystalline SiC layer thin. In this case, the thickness can be set to a thickness (about 100 μm) necessary to fulfill the supporting function of the semiconductor element.

In the first film forming step, when the polycrystalline SiC layer is formed so as to cover both the flat surface and the side surface of the carbon substrate, it may protect carbon that is burnt in an environment where oxygen exists at high temperature. it can. This makes it possible to perform high-temperature heat treatment, film formation containing high-density oxygen, or the like in the element formation step. Further, even if the thickness of the carbon substrate is reduced, the stress on both sides can be balanced, so that a thin multilayer substrate with less warpage can be obtained.
In the bonding step, the surface of the polycrystalline SiC layer formed on each plane of the carbon substrate and the one plane of the two single crystal substrates are bonded to each other, and after performing the separation step, the first 2 In the film forming step, the second single crystal layer is formed on the surfaces of both the first single crystal layers, so that the polycrystalline SiC layer and the first single crystal layer are formed on both planes of the carbon substrate, respectively. In the case of obtaining a multilayer substrate in which one single crystal layer and the second single crystal layer are laminated, the multilayer substrate can be formed on both surfaces of one carbon substrate, which is efficient and low cost. In addition, a semiconductor element can be manufactured.
In the case where the element forming process includes a first element forming process performed before the removing process and a second element forming process performed after the removing process, as many elements as possible before removing the carbon substrate. Processing can be performed and film formation containing oxygen can be performed after removing the carbon substrate.
When the end of the surface of the carbon substrate on which the polycrystalline SiC layer is formed is chamfered, the polycrystalline SiC layer is formed so that the thickness is uniform up to the plate edge on the plane of the carbon substrate. A film can be formed and bonded to a single crystal substrate without polishing its surface.

When the first semiconductor material is one of SiC, GaN, and gallium oxide, and the second semiconductor material is one of SiC, GaN, and gallium oxide, the first semiconductor material Since the second single crystal layer made of the second semiconductor material, which is a material having a large band gap, can be formed on the first single crystal layer made of the single crystal, a high breakdown voltage is required. A semiconductor element suitable for the application can be manufactured. In addition, when the first semiconductor material is SiC, a single crystal SiC layer is stacked on the polycrystalline SiC layer, which is more preferable.
In the second film-forming step, when the second single crystal layer is formed by epitaxial growth or MOCVD, a high-quality single crystal layer serving as an active layer of a semiconductor element is easily grown to a required thickness. be able to.

According to the semiconductor substrate of the present invention, a polycrystalline SiC layer, or a carbon substrate on which a polycrystalline SiC layer is formed, and a single crystal of a first semiconductor material formed on the polycrystalline SiC layer. And a second single crystal layer made of a single crystal of a second semiconductor material formed on the first single crystal layer. The amount of single crystal substrate made of a single crystal of the first semiconductor material can be minimized. In addition, a polycrystalline SiC layer or a carbon substrate on which a polycrystalline SiC layer is formed can be used as a support substrate for a semiconductor element. When the support substrate is a polycrystalline SiC layer, the cost can be reduced compared to a conventional semiconductor substrate using a single crystal SiC substrate as the support substrate. Polycrystalline SiC is excellent in toughness and can have an optimum thickness, so that it is possible to omit thinning. In addition, the support substrate can have a low resistance by increasing the impurity concentration compared to a single crystal substrate. On the other hand, when the support substrate is a carbon substrate on which a thin polycrystalline SiC layer is formed, the resistance value of the support substrate can be made extremely low, and a tough and warp-free semiconductor substrate can be provided. .
By using the semiconductor substrate, a SiC element, a GaN element, a gallium oxide element and the like that are thin and suitable for high power use can be formed using the same equipment and method as in the past.

Schematic top view and side part of carbon substrate and single crystal substrate Schematic sectional view showing the structure of the multilayer substrate before removing the carbon substrate Schematic cross-sectional view showing multilayer substrate of various aspects Schematic sectional view showing the process of forming a multilayer substrate on one side of a carbon substrate Schematic cross-sectional view showing the process of forming a multilayer substrate on both sides of a carbon substrate Schematic sectional view showing a method of coating a carbon substrate with a polycrystalline SiC layer Cross-sectional image of the edge of a carbon substrate coated with a polycrystalline SiC layer Cross-sectional image showing the structure of a polycrystalline SiC layer Schematic cross-sectional view for explaining substrate warpage Schematic sectional view showing the manufacturing process of Schottky diode Typical sectional drawing which shows the process of forming an electrode film in the back of a multilayer substrate Schematic sectional view showing a method of removing a carbon substrate after forming a semiconductor element Typical sectional drawing which shows the process of forming an electrode film in the back surface of the multilayer substrate after carbon substrate removal Schematic cross-sectional view showing the manufacturing process of MOSFET Schematic sectional view showing the structure of a general vertical semiconductor device (Schottky diode, MOSFET)

The method for manufacturing a semiconductor device of the present invention is to manufacture a semiconductor device suitable for high power use by using a carbon substrate. The carbon substrate has a characteristic that it can withstand high temperatures with little warping. In the embodiment of the present invention, a semiconductor element having the carbon substrate as a supporting layer is formed (hereinafter referred to as “first form”), or the carbon substrate is used as a temporary base, and finally the carbon substrate is used. A semiconductor element from which the substrate has been removed is formed (hereinafter referred to as “second embodiment”). As an example thereof (see FIG. 2), first, a polycrystalline SiC layer (3) on a carbon substrate (1), a first single crystal layer (21) made of a first semiconductor material, and a second semiconductor material. A multilayer substrate (5) is formed by laminating the second single crystal layer (4). And an element is formed in the 2nd single crystal layer (4) used as the surface layer of a multilayer substrate (5). Thereafter, in the first embodiment, an electrode film or the like is formed on the back surface of the carbon substrate (1). In the second embodiment, the carbon substrate (1) is removed after a part of the device is processed, and the polycrystalline SiC layer (3) is used as a support layer (support substrate) of the semiconductor device. In this case, an electrode film or the like is formed on the back surface of the polycrystalline SiC layer (3). In this way, a semiconductor element suitable for high power use can be manufactured.
The carbon substrate (1) can have the thermal expansion coefficient substantially the same as that of the polycrystalline SiC layer (3) and the second single crystal layer (4). If the thickness of the carbon substrate (1) is several mm, a multilayer substrate (5) having high rigidity and no warpage can be obtained. Furthermore, if a polycrystalline SiC layer (3) having the same thickness is formed on both surfaces of the carbon substrate (1), even if the thickness of the carbon substrate (1) is 1 mm or less, a multilayer substrate (5 ) Can be obtained. Due to these characteristics, the carbon substrate (1) is formed from the formation of the polycrystalline SiC layer (3) to the bonding of the first single crystal layer (21), the formation of the second single crystal layer (4), and the semiconductor. It plays the role of the foundation until the formation of the element. The polycrystalline SiC layer (3) has the same thermal expansion coefficient as the second single crystal layer (4) and is excellent in thermal conductivity. Since the carbon substrate has the same thermal conductivity as that of polycrystalline SiC and has an electrical conductivity that is much better, it can be used as it is as a support layer of a semiconductor element. In that case, the processing of thinning the support layer to about 100 μm in the conventional structure can be eliminated. Since the first single crystal layer (21) made of a single crystal having good crystallinity is joined to the polycrystalline SiC layer (3), the active layer of the semiconductor element is formed on the first single crystal layer (21). A high-quality second single crystal layer (4) can be formed. Thus, by making use of the characteristics of each layer, the formation of the semiconductor element can be facilitated and the cost can be reduced.

Hereinafter, a method for manufacturing a semiconductor device according to an embodiment of the present invention will be described with reference to the drawings.
FIG. 1 is a top view and a side view showing an example of the carbon substrate 1 and a single crystal substrate 2 that is a base material of the first single crystal layer 21. This figure shows a state in which the polycrystalline SiC layer 3 is formed on the carbon substrate 1 and the hydrogen injection layer 25 is formed at a predetermined depth from the lower surface 201 of the single crystal substrate 2. One plane of the carbon substrate 1 is an upper surface 101, the other plane is a lower surface 102, and the entire side surface is a side surface 103.
The shape of the carbon substrate 1 and the single crystal substrate 2 is not limited, but is preferably a disc-shaped or columnar substrate as shown in FIG. Further, the sizes of the carbon substrate 1 and the single crystal substrate 2 are not limited, but the carbon substrate 1 is made larger than the single crystal substrate 2 in view of handling. The diameter of the carbon substrate 1 is preferably about 1 to 10 mm larger than the diameter of the single crystal substrate 2. For example, when the single crystal substrate 2 has an outer diameter of 6 inches (about 150 mm), the carbon substrate 1 may have an outer diameter of about 160 mm. The surface of polycrystalline SiC layer 3 provided on one plane (101 or 102) of carbon substrate 1 and lower surface 201 of single crystal substrate 2 are bonded.

FIG. 2 is a schematic cross-sectional view showing an example of the multilayer substrate. The multilayer substrate 5 is configured by laminating a polycrystalline SiC layer 3, a first single crystal layer 21, and a second single crystal layer 4 in this order on a carbon substrate 1. Polycrystalline SiC layer 3 is formed on the entire top surface of carbon substrate 1, and first single crystal layer 21 is bonded thereon. Since the diameter of the single crystal substrate 2 is smaller than the diameter of the carbon substrate 1, the diameter of the first single crystal layer 21 is formed when the second single crystal layer 4 is formed on the upper surface of the first single crystal layer 21. A second polycrystalline layer 41 made of a polycrystal of the second semiconductor material is formed on the polycrystalline SiC layer 3 in the peripheral portion exceeding (that is, the diameter of the single crystal substrate 2).

FIG. 3 shows various aspects of the multilayer substrate 5. A multilayer substrate 51 shown in FIG. 6A is the most basic configuration in the present embodiment, and the polycrystalline SiC layer 3 is formed on both the planes 101 and 102 and the side surface 103 of the carbon substrate 1. Yes. The first single crystal layer 21 and the second single crystal layer 4 are sequentially stacked on the polycrystalline SiC layer 3 formed on one plane 101 of the carbon substrate 1. In the multilayer substrate 52 shown in FIG. 2B, the polycrystalline SiC layer 3 is formed on both the planes 101 and 102 and the side surface 103 of the carbon substrate 1. That is, the entire surface of the carbon substrate 1 is covered with the polycrystalline SiC layer 3. A first single crystal layer 21 and a second single crystal layer 4 are sequentially stacked on the polycrystalline SiC layer 3 formed on each plane of the carbon substrate 1. In the multilayer substrate 53 shown in FIG. 2C, the polycrystalline SiC layer 3 is formed on one plane 101 of the carbon substrate 1. The first single crystal layer 21 and the second single crystal layer 4 are sequentially stacked on the polycrystalline SiC layer 3 formed on the plane 101 of the carbon substrate 1.

In the present embodiment, the first film forming step of forming the polycrystalline SiC layer 3 on at least one plane (at least one of 101 and 102) of the carbon substrate 1 and the single crystal of the first semiconductor material are used. A hydrogen layer forming step of forming a hydrogen injection layer 25 at a predetermined depth from one plane 201 of single crystal substrate 2, the surface of polycrystalline SiC layer 3 formed on the plane of carbon substrate 1, and single crystal substrate 2 The bonding step of bonding one of the flat surfaces 201 and the single crystal substrate 2 by separating the single crystal substrate 2 with the hydrogen injection layer 25, the one flat surface 201 side of the separated single crystal substrate 2 is defined as the first single crystal layer 21. The separation step that remains on the polycrystalline SiC layer 3 and the formation of the second single crystal layer 4 made of the second semiconductor material on the surface of the first single crystal layer 21 results in the multilayer substrate 5 (51, 52 53) to obtain a second film forming step; Comprising an element forming step of forming a semiconductor element on a second single-crystal layer 4 constituting the surface layer of the layer substrate 5, a. Thereafter, when the semiconductor element of the second embodiment is used, a removal step of removing the carbon substrate 1 from the multilayer substrate 5 (51, 52, 53) is provided.

(First film formation step)
The first film forming step is a step of forming the polycrystalline SiC layer 3 on the surface of the carbon substrate 1. In order to form a semiconductor element for high power use, a process of raising the temperature to about 1700 ° C. is necessary to activate impurities such as nitrogen, phosphorus, and aluminum. Carbon is a material that can withstand such high temperatures in an inert gas. However, carbon burns out at 400 ° C. or higher due to the presence of oxygen. In order to protect such carbon, a method of covering the entire surface of the carbon substrate 1 with the polycrystalline SiC layer 3 can be employed. Specifically, in the first film formation step, it is preferable to form the polycrystalline SiC layer 3 so as to cover both the flat surfaces (101 and 102) and the side surface 103 of the carbon substrate 1. In this way, the entire surface of the carbon substrate 1 is covered with the polycrystalline SiC layer 3, and the carbon substrate 1 is not exposed to the outside, so that a high-temperature process in which oxygen is present can be performed. Moreover, since the same polycrystalline SiC layer 3 is formed on both surfaces of the carbon substrate 1, the warpage of the substrate can be made extremely small. After providing the polycrystalline SiC layers 3 on both planes of the carbon substrate 1 in this way, it is also possible to use the polycrystalline SiC layers 3 on both sides of the carbon substrate 1 as support substrates (support layers) for the semiconductor elements, respectively. However, it is also possible to use only the polycrystalline SiC layer 3 on one side as a support substrate of the semiconductor element (see FIG. 3A).

In the case where the polycrystalline SiC layer 3 is formed only on one plane of the carbon substrate 1, a process of preventing heat treatment in an environment where oxygen is present at 400 ° C. or higher in order to protect the carbon substrate 1. Can be adopted. For example, a multilayer substrate 5 (see FIG. 3C) in which the polycrystalline SiC layer 3 is formed only on one plane (101 or 102) of the carbon substrate 1 is formed, and the multilayer substrate 5 to the carbon substrate 1 After removal of oxygen, film formation or the like containing oxygen can be performed.

In the case of the second embodiment in which the carbon substrate 1 is used as a temporary base and the carbon substrate 1 is removed after forming a part of the semiconductor element, the polycrystalline SiC layer 3 is removed from the carbon substrate 1. It becomes a support substrate for the second single crystal layer 4 in a part process or a mounting process of element formation to be performed later. Furthermore, the polycrystalline SiC layer 3 serves as a support substrate (support layer) for the final semiconductor element formed in the second single crystal layer 4. The polycrystalline SiC layer 3 is suitable as a support layer because it has a thermal conductivity, a thermal expansion coefficient, and an electrical conductivity comparable to those of the second single crystal layer 4 to be formed later.
A specific film forming method of the polycrystalline SiC layer 3 is not particularly limited. For example, the polycrystalline SiC layer 3 can be formed on both the flat surface and the side surface of the carbon substrate 1 by standing the carbon substrate 1 on the base and supplying the polycrystalline CVD gas to both sides thereof. Further, a polycrystalline SiC layer 3 is formed on one plane and side surface of the carbon substrate 1 by placing one plane of the carbon substrate 1 on a plane table and supplying a polycrystalline CVD gas from above. Is done. Thereafter, similarly, it is possible to form polycrystalline SiC layer 3 on the other plane of carbon substrate 1. By appropriately adopting the film forming method as described above, the polycrystalline SiC layer 3 in each aspect shown in FIGS. 3A, 3B, and 3C can be formed.
The thickness of the polycrystalline SiC layer 3 formed on the plane of the carbon substrate 1 is not limited as long as it serves as a support layer for the final semiconductor element. In the first embodiment, the thickness of the polycrystalline SiC layer 3 may be only a thickness necessary for bonding the first single crystal layer 21 thereon (for example, about 1 to 10 μm). In that case, the thickness of the carbon substrate 1 may be set to a thickness necessary for suppressing warpage and facilitating handling (for example, about 250 to 1000 μm). In the second embodiment, the polycrystalline SiC layer 3 is formed slightly thicker than a thickness (for example, 100 μm) required as a support substrate for element processing (such as back electrode formation) performed after removing the carbon substrate 1. (For example, about 100 to 200 μm).

(Hydrogen layer formation process)
The single crystal substrate 2 is made of a single crystal of the first semiconductor material. The first semiconductor material is not particularly limited, and for example, one of SiC, GaN, and gallium oxide can be employed. Since it is joined to the polycrystalline SiC layer 3 in a later joining step, it is preferable to use SiC as the first semiconductor material.
The hydrogen layer forming step is a step of forming the hydrogen injection layer 25 at a predetermined depth from one plane 201 of the single crystal substrate 2. The hydrogen implantation layer 25 can be formed by implanting hydrogen ions to the predetermined depth (for example, a depth of about 0.2 to 1.5 μm, preferably about 0.5 μm).

(Joining process)
The bonding step is a step of bonding the surface of the polycrystalline SiC layer 3 formed on the plane of the carbon substrate 1 and the one plane 201 of the single crystal substrate 2. When the polycrystalline SiC layer 3 is provided on both planes (101 and 102) of the carbon substrate 1, and the polycrystalline SiC layer 3 on both planes is used as a base of a semiconductor element, respectively (FIG. 3B). )), The surface of the polycrystalline SiC layer 3 formed on each plane (101 and 102) of the carbon substrate 1 and one plane 201 of the two single crystal substrates 2 may be bonded to each other. The bonding method of the surface of the polycrystalline SiC layer 3 and the flat surface 201 of the single crystal substrate 2 is not particularly limited. For example, both surfaces can be activated and bonded with an argon beam or the like.

(Separation process)
In the separation step, the single crystal substrate 2 is separated by the hydrogen injection layer 25, so that the one plane (201) side of the separated single crystal substrate 2 is used as the first single crystal layer 21 on the carbon substrate 1. This is a step of remaining on the polycrystalline SiC layer 3 formed in step (b). Separation in the hydrogen injection layer 25 is possible by setting the single crystal substrate 2 to a high temperature. For example, when the single crystal substrate 2 is a single crystal SiC substrate, blisters are generated in the hydrogen injection layer 25 at 900 to 1000 ° C., and the single crystal substrate 2 is separated with the hydrogen injection layer 25 as a boundary.

(Second film formation step)
In the second film-forming step, the second single crystal layer 4 made of the second semiconductor material is formed on the surface of the first single crystal layer 21 which is a single crystal, so that the polycrystalline structure is formed on the carbon substrate 1. This is a step of obtaining a multilayer substrate 5 in which the SiC layer 3, the first single crystal layer 21 and the second single crystal layer 4 are laminated. In the case where the polycrystalline SiC layer 3 and the first single crystal layer 21 are provided on both planes (101 and 102) of the carbon substrate 1, the first single crystal layer 21 is formed on the surface of both the first single crystal layers 21. By forming the single crystal layer 4, the multilayer substrate in which the polycrystalline SiC layer 3, the first single crystal layer 21, and the second single crystal layer 4 are stacked on each plane of the carbon substrate 1. 5 can be obtained (see FIG. 3B). The second semiconductor material is not particularly limited, and for example, one of SiC, GaN, gallium oxide, and the like can be employed.
The first single crystal layer 21 with good crystallinity is suitable as a base for the second single crystal layer 4 formed thereon. A specific film forming method of the second single crystal layer 4 is not particularly limited. For example, the second single crystal layer 4 can be formed on the first single crystal layer 21 by epitaxial growth. Depending on the type of the second semiconductor material, the film can be formed by the MOCVD method. When the polycrystalline SiC layer 3 and the first single crystal layer 21 are provided on both planes of the carbon substrate 1, the second single crystal layer 4 is formed on one plane side, and then the other The film may be formed on the flat surface side (see FIG. 3B).
Since the second single crystal layer 4 is formed on the first single crystal layer 21 having good crystallinity, the second single crystal layer 4 can be a high-quality single crystal layer and is suitable for forming a semiconductor element. The thickness of the second single crystal layer 4 only needs to be a thickness necessary for forming an active layer of a semiconductor element (about 5 to 10 μm when the second semiconductor material is SiC).
Through the above steps, the multilayer substrate 5 (51, 52, 53) is formed.

(Element formation process)
The element forming step is a step of forming a semiconductor element on the second single crystal layer 4 which is a surface layer of the multilayer substrate 5 obtained by the second film forming step. The formation of a semiconductor element is intended to form an impurity region, an insulator region, a conductive region, and the like necessary for constituting a target semiconductor device, such as a Schottky diode, MOSFET, JFET or the like. Since the multilayer substrate 5 is prevented from being bent or warped by the carbon substrate 1, a semiconductor element can be formed using a general-purpose photolithography apparatus.
When the entire surface of the carbon substrate 1 is covered with the polycrystalline SiC layer 3 in the first film forming step, the warp of the multilayer substrate 5 (51, 52) can be made extremely small. Therefore, in the element formation step, a processing method similar to that in the case where a single crystal film using the second semiconductor material is formed on a conventional thick single crystal support substrate can be used.
Further, when the polycrystalline SiC layer 3 is formed only on one side of the carbon substrate 1, it is necessary to perform the processing under conditions where oxygen is not present at 400 ° C. or higher. For example, in order to form a silicon oxide film having a thickness of 1 μm or more under these conditions, a silicon oxide film can be formed by low-temperature CVD and annealed at a high temperature in an inert gas. In addition, when a gate film is required, it is possible to select a film quality (for example, silicon nitride, alumina, etc.) that can form a dense thin film without using oxygen directly, instead of a silicon oxide film. In the case of forming a gate film that does not require oxygen to intervene, a MOSFET can be formed even if the carbon substrate 1 exists.

(Removal process)
In the second embodiment in which the carbon substrate 1 is used only as a temporary base, the removing step is performed. The removing step is a step of removing the carbon substrate 1 from the multilayer substrate 5 after forming all or part of the semiconductor elements in the element forming step. Carbon can be easily incinerated by raising the temperature to about 500 ° C. A specific removal method is not particularly limited. For example, when the carbon substrate 1 is covered with the polycrystalline SiC layer 3, first, the peripheral portion of the multilayer substrate 5 (at least the polycrystalline SiC layer 3 formed on the side surface 103 of the carbon substrate 1) is cut and removed. Then, the side surface portion of the carbon substrate 1 is exposed. Thereafter, the carbon substrate 1 can be removed by incineration or the like (see FIG. 12).

(Second element formation step)
The element forming step can be configured to include a first element forming step performed before the removing step and a second element forming step performed after the removing step. The second element formation step may include a film containing oxygen. In the case of the first embodiment, the second element forming step can be performed while holding the carbon substrate 1 in order to complete the semiconductor element. In the case of the second embodiment, after the carbon substrate 1 is removed from the multilayer substrate 5, a second element formation step is performed in order to complete the semiconductor element. In addition, when a gate film in which oxygen is present in a state where a part of the carbon substrate 1 is exposed, such as the case where the polycrystalline SiC layer 3 is formed only on one side of the carbon substrate 1, the gate film is A step before the formation is performed in the first element formation step, and after removing the carbon substrate 1 by the removal step, a gate oxide film intervening with oxygen can be formed. Even when the carbon substrate 1 is warped, the gate oxide film can be formed. Further, the warp can be reduced by bonding a sapphire substrate or the like as a temporary support substrate after the gate oxide film is formed. In this state, a metal wiring layer or the like can be formed and wiring can be performed. Thereafter, the temporary support substrate can be peeled off to form a metal layer on the back surface side of the semiconductor element. In this case, in a state where the carbon substrate 1 is removed, a metal thin film for silicide such as Ni is formed on the back surface, and a similar metal thin film is formed in advance on the electrode portion on the front surface. Silicidation is also possible by treatment. These processes are possible even when warping occurs. Thereafter, it is also possible to provide a temporary support substrate as described above to eliminate the warp and form the metal wiring layer.
Even when the polycrystalline single-crystal SiC layer 3 is provided on both surfaces of the carbon substrate 1 to form the second single crystal layer 4, the carbon substrate 1 is formed after the metal thin film for silicide is formed on the surface and before the metal wiring process. It is also possible to perform silicidation simultaneously on both sides by high-temperature treatment after removing the substrate, polishing the back surface of the semiconductor element, and forming a silicide metal thin film on the back surface. After that, by providing a temporary support substrate, it is possible to eliminate warpage and form a metal wiring layer on the surface.

Hereinafter, the manufacturing process of the semiconductor device according to this embodiment will be described in detail. The thickness of the carbon substrate 1 used in this example is about 0.5 mm, and its thermal expansion coefficient is adjusted to be approximately the same as that of polycrystalline SiC. The coefficient of thermal expansion of carbon can be adjusted by adjusting the density and firing temperature. Further, the carbon substrate 1 is a high-purity material having a metal density as an impurity as low as 10 ¹⁰ / cm ³ or less. In this example, the single crystal substrate 2 is a single crystal SiC substrate.

FIG. 4 shows a manufacturing process of the multilayer substrate 51 shown in FIG. As shown in FIG. 4A, a polycrystalline SiC layer 3 having a certain thickness is grown by a thermal CVD method so as to cover the upper surface 101, the lower surface 102 and the side surface 103 of the carbon substrate 1. On the other hand, as shown in FIG. 5B, hydrogen implantation layer 25 is formed by implanting hydrogen ions from one plane 201 of single crystal substrate 2 to a depth of 0.5 μm. The concentration of hydrogen ions is about 1 × 10 ¹⁷ / cm ³ . The plane 201 side from the hydrogen injection layer 25 becomes the first single crystal layer 21 made of single crystal SiC.
Next, as shown in FIG. 2C, the surface of the polycrystalline SiC layer 3 formed on the carbon substrate 1 and the flat surface 201 of the single crystal SiC substrate 2 are joined after activating each surface. Thereafter, the bonded substrate is heated to a high temperature of about 1000 ° C. to separate the single crystal SiC substrate 2 with the hydrogen injection layer 4 as a boundary (the base material side of the separated single crystal SiC substrate 2 is not shown). ). As a result, a polycrystalline SiC layer 3 is formed on the carbon substrate 1 and a multilayer substrate in which the first single crystal layer 21 is laminated on the surface is formed as shown in FIG.
Furthermore, as shown in FIG. 5E, a second single crystal layer 4 is formed by epitaxially growing a SiC single crystal on the surface of the first single crystal layer 21 formed on the multilayer substrate. The multilayer substrate 51 shown in FIG. 3B is completed.

FIG. 5 shows a manufacturing process of the multilayer substrate 52 shown in FIG.
As shown in FIG. 5A, a polycrystalline SiC layer 3 having a certain thickness is grown by a thermal CVD method so as to cover the upper surface 101, the lower surface 102 and the side surface 103 of the carbon substrate 1. On the other hand, as shown in FIG. 5B, hydrogen implantation layer 25 is formed by implanting hydrogen ions from one plane 201 of single crystal substrate 2 to a depth of 0.5 μm. The concentration of hydrogen ions is about 1 × 10 ¹⁷ / cm ³ . The plane 201 side from the hydrogen injection layer 25 becomes the first single crystal layer 21 made of single crystal SiC.
Next, as shown in FIG. 2C, the surfaces of the polycrystalline SiC layer 3 formed on both surfaces of the carbon substrate 1 and the plane 201 of the single crystal SiC substrate 2 are joined after the respective surfaces are activated. . Thereafter, the bonded substrate is heated to a high temperature of about 1000 ° C. to separate the single crystal SiC substrate 2 with the hydrogen injection layer 4 as a boundary (the base material side of the separated single crystal SiC substrate 2 is not shown). ). As a result, a polycrystalline SiC layer 3 is formed on both surfaces of the carbon substrate 1 and a multilayer substrate in which the first single crystal layer 21 is laminated on each surface is formed as shown in FIG. The
Further, as shown in FIG. 5E, the second single crystal layer 4 is formed by epitaxially growing a SiC single crystal on the surface of the first single crystal layer 21 formed on both surfaces of the multilayer substrate. Thus, the multilayer substrate 55 shown in FIG. 3A is completed.

In the multilayer substrates 51 to 53, the thickness of the polycrystalline SiC layer 3 can be different between the case of the first form and the case of the second form. In the case of the first embodiment, since the strength of the support layer is ensured by the carbon substrate 1, the thickness of the polycrystalline SiC layer 3 may be about 1 μm. Moreover, in the case of the said 2nd form, since the polycrystalline SiC layer 3 becomes a subsequent support layer, it may be about 100 micrometers thick.
In the multilayer substrates 51 to 53, the thickness of the second single crystal layer 4 varies depending on the application, and in the case of SiC, it is about 5 μm (withstand voltage of 600 V) to 10 μm (withstand voltage of 1500 V). Further, the second single crystal layer 4 is formed on the first single crystal layer 21 by epitaxial growth or the like, but the portion where the first single crystal layer 21 is not present, that is, the polycrystalline SiC layer 3 is exposed. Polycrystal grows at the peripheral portion, and a second polycrystalline layer 41 having the same thickness as the second single crystal layer 4 is formed.

FIG. 6 shows a specific process example in which the surface of the carbon substrate 1 is covered with the polycrystalline SiC layer 3 using a planar thermal CVD apparatus. As shown in FIG. 1A, a polycrystalline SiC layer 3 having a thickness of about 130 μm is first formed on one plane 101 of the carbon substrate 1 by thermal CVD. In this process, the polycrystalline SiC layer 3 is also formed on the side surface 103 of the carbon substrate 1. Then, using the other flat surface 102 of the carbon substrate 1 as a reference surface, the polycrystalline SiC layer 3 on the flat surface 101 is polished and flattened so that the thickness thereof becomes about 110 μm. Next, as shown in FIG. 2B, a polycrystalline SiC layer 3 having a thickness of about 130 μm is formed on the other plane 102 of the carbon substrate 1 by thermal CVD. Also in this process, the polycrystalline SiC layer 3 is formed on the side surface 103 side of the carbon substrate 1. Then, using the surface of the polycrystalline SiC 3 planarized first as a reference plane, the polycrystalline SiC layer 3 on the plane 102 is polished and planarized so as to have a thickness of about 110 μm. The merit of such a method is that the polycrystalline SiC layer 3 can be easily flattened. As a result, a polycrystalline SiC layer 3 having a thickness of about 110 μm is formed on both planes of the carbon substrate 1, and a polycrystalline SiC layer 3 having a thickness of about 260 μm (about 130 μm × 2) is formed on the side surface of the carbon substrate 1. It can be covered by the polycrystalline SiC layer 3.
The polycrystalline SiC layer 3 covering the carbon substrate 1 can also be formed by using a thermal CVD apparatus capable of forming a film in three dimensions. If such a thermal CVD apparatus is used, film formation is performed while the held disk-shaped carbon substrate 1 is rotated three-dimensionally, so that both the plane and side surfaces of the carbon substrate 1 have substantially the same thickness at the same time. The polycrystalline SiC layer 3 can be formed. In order to make the polycrystalline SiC layer 3 a high-concentration N-type layer, it is necessary to form a film in a high-concentration nitrogen atmosphere, and the film-forming temperature is as high as 1400 to 1500 ° C. Under this condition, the supply rate-limiting reaction occurs, so that the thickness of the polycrystalline SiC layer 3 varies depending on the part. In order to make the film thickness of both planes uniform, polishing is performed after film formation.

FIG. 7 is a cross-sectional image of the edge of the substrate when the carbon substrate 1 is covered with the polycrystalline SiC layer 3. When a polycrystalline SiC layer is formed on a carbon substrate using a thermal CVD apparatus, film formation is nonuniform at the edge of the carbon substrate, and the film thickness of the polycrystalline SiC is not constant. As shown in FIG. 2A, the corners of the end of the carbon substrate 1 are chamfered (beveled) to prevent chipping. Nevertheless, since the film growth isotropically with respect to all surfaces, the film formation proceeds at the corner of the plate edge and becomes thicker at the corner. In this case, it is preferable to perform polishing so that the thickness of the polycrystalline SiC layer 3 on the plane of the carbon substrate 1 is uniform for subsequent bonding to the single crystal substrate 2.
More preferably, the end portion of the surface of the carbon substrate 1 on which the polycrystalline SiC layer 3 is formed (that is, the corner portion where the plane and the side surface of the carbon substrate 1 are in contact with each other) reaches the plate end of the carbon substrate 1. Chamfering is performed so that the thickness of the SiC layer 3 is uniform. Regardless of the shape of the chamfer, the end may be arcuate in cross section or may be inclined with respect to the plane. The curvature of the arc and the angle of inclination need not be constant at the chamfered portion, and the size of the chamfer may be determined as appropriate. For example, as shown in FIG. 2B, by performing chamfering so that the end portion of the carbon substrate 1 has a circular arc shape, unevenness of the film thickness at the plate end is eliminated. be able to. In this example, the end of the carbon substrate 1 is chamfered so that the cross section of the carbon substrate 1 has a semicircular shape having a diameter substantially equal to the thickness of the carbon substrate 1. FIG. 4B is a cross-sectional image of the substrate edge when the polycrystalline SiC layer 3 is formed on the carbon substrate 1 using the three-dimensional thermal CVD apparatus. It can be seen that the polycrystalline SiC layer 3 on the side surface of the substrate is formed with a uniform thickness, and the thickness of the polycrystalline SiC layer 3 on the upper and lower surfaces of the substrate is uniform up to the plate edge. FIG. 6C shows a case where the polycrystalline SiC layer 3 is formed on each plane of the carbon substrate 1 whose end portions are chamfered in the same manner as in FIG. It is a cross-sectional image of the board | substrate edge part. In this example, the polycrystalline SiC layer 3 is first formed on the lower surface of the figure, and then formed on the upper surface of the figure. As a result, the two polycrystalline SiC layers 3 are formed so as to overlap each other on the side surface portion of the plate edge, but are continuous polycrystals because the film quality is the same. As described above, even when the polycrystalline SiC layer 3 is formed for each plane of the carbon substrate 1, the thickness of the polycrystalline SiC layer 3 on the upper surface and the lower surface of the carbon substrate 1 is uniform up to the plate edge. . In both cases (b) and (c), polishing for making the thickness of the polycrystalline SiC layer 3 on the plane of the carbon substrate 1 uniform can be omitted.

As a semiconductor substrate for forming a vertical element for high power applications, vertical electrical conductivity and thermal conductivity are important. In the present embodiment, regarding the electrical conductivity as the semiconductor substrate, the electrical conductivity of the polycrystalline SiC layer 3, the interface resistance between the polycrystalline SiC layer 3 and the first single crystal layer 21, and the first single crystal layer The interface resistance between 21 and the second single crystal layer 4 is important. The electrical conductivity of the polycrystalline SiC layer 3 can be reduced by increasing the concentration of nitrogen, which is an N-type impurity. Unlike the single crystal SiC substrate, the polycrystalline SiC layer can increase the nitrogen concentration regardless of crystallinity, and thus can have a lower resistance than the single crystal SiC substrate. Further, at the interface between the polycrystalline SiC layer 3 and the first single crystal layer 21 and the interface between the first single crystal layer 21 and the second single crystal layer 4, a potential barrier is formed by the band gap width of each layer. If it does not take countermeasures, it exhibits anisotropic electrical characteristics due to potential barrier differences. As a countermeasure, it is known to increase the impurity concentration in the vicinity of the interface and prevent the influence of the potential barrier by causing a tunnel phenomenon (Patent Document 1, Non-Patent Documents 1 and 2). For example, SiC is used for the first single crystal layer 21. Then, since the polycrystalline SiC layer 3 is N-type, the first single crystal layer 21 side which is an interface with the polycrystalline SiC layer 3 is also an N-type layer, and the nitrogen concentration thereof is as high as about 10 ²¹ / cm ^3. desirable. For this reason, it is preferable to form a high-concentration nitrogen layer in advance on the surface of the first single crystal layer 21 to be a bonding surface with the polycrystalline SiC layer 3 before performing the bonding step. The same applies to the second single crystal layer 4. When the second single crystal layer 4 has the same material and the same crystal structure as the first single crystal layer 21 (for example, when both are single crystal SiC), consideration for the potential barrier is unnecessary. When the second single crystal layer 4 is different from the first single crystal layer 21, for example, when the second single crystal layer 4 is made of GaN, it is necessary to increase the impurity concentration at the interface. Such a high-concentration nitrogen layer can be formed by nitrogen ion implantation or the like.

Regarding the thermal conductivity that is important as a semiconductor substrate for forming a vertical element for high power use, the thermal conductivity of the polycrystalline SiC layer 3 is as good as about 250 to 300 W / (m · K). For this reason, even when the second single crystal layer 4 is formed using any one of SiC, GaN, and gallium oxide as the second semiconductor material, the polycrystalline SiC layer 3 is suitable as the supporting substrate.

FIG. 8 is an example of a cross-sectional image showing the structure of the polycrystalline SiC layer 3. The polycrystalline SiC layer 3 is formed on the surface L1 of the carbon substrate 1 by thermal CVD and has a thickness of about 110 μm. The crystal grains of the polycrystalline SiC layer 3 are fine at the interface L1 portion with the carbon substrate 1, and become large crystal grains as they move away from the interface L1 in the thickness direction D and become stable. As described above, since the crystal structure of the polycrystalline SiC layer 3 is not uniform, warping occurs in the absence of the carbon substrate 1.
FIG. 9 is a diagram illustrating the amount of warpage between the state (a) where the carbon substrate 1 exists and the state (b) where the carbon substrate 1 is removed. For example, the warp S1 in the state where the polycrystalline SiC layer 3 is laminated on the carbon substrate 1 is about 20 μm, and the warp S2 of the polycrystalline SiC layer 3 after the carbon substrate 1 is removed is about 100 μm. In the state where there is no carbon substrate 1 and only the polycrystalline SiC layer 3 is a supporting substrate and there is a large warp of about 100 μm, photolithography cannot be applied as it is. Since the warpage is as small as about 20 μm in the state where the carbon substrate 1 exists, a general semiconductor photolithography apparatus can be used.

Hereinafter, a specific example of an element formation process for forming a semiconductor element on the second single crystal layer 4 of the multilayer substrate 5 will be described.
(Formation of Schottky diode element)
FIG. 10 shows a step of forming a Schottky diode element (see FIG. 15A) on the second single crystal layer 4 formed on the surface layer of the composite substrate 5. The first single crystal is SiC. FIG. 10A is the multilayer substrate 51 or 52 shown in FIG. Here, for simplicity, the first single crystal layer 21 is not shown. Further, only one surface (upper surface 101) side of the carbon substrate 1 is displayed. In order to form Schottky diodes on both surfaces, each surface may be processed alternately. Part A shown in FIG. 10A is a region corresponding to one element in the composite substrate 51 or 52. The following figures (b) to (g) are enlarged views of the A part, showing a process of forming one element.
First, as shown in FIG. 10B, a SiO ₂ film is formed on the surface of the N-type second single crystal layer 4, and a mask 701 is formed by opening necessary portions by photolithography. Then, P-type impurities are ion-implanted into the opening of the mask 701 while being heated to about 500 ° C., and the mask 701 is removed after the ion implantation. As a result, a P-type impurity region 711 is formed in the surface layer portion of the second single crystal layer 4 as shown in FIG.
Next, as shown in FIG. 4D, a SiO ₂ film is formed on the surface of the second single crystal layer 4, and necessary portions are opened by photolithography to form a mask 702. Then, another concentration of P-type impurity is ion-implanted into the opening of the mask 702 while being heated to about 500 ° C., and the mask 702 is removed after the ion implantation. Thereby, another P-type impurity region 712 is formed in the surface layer portion of the second single crystal layer 4 as shown in FIG. After the P-type impurity region 711 and another P-type impurity region 712 are formed, annealing is performed at a high temperature to activate these impurities. When the second single crystal layer 4 is SiC, an annealing process is performed at about 1700 ° C.
Thereafter, a SiO ₂ film having a thickness of about 1 μm is formed on the surface of the second single crystal layer 4 by thermal CVD, and a portion to be an electrode is removed by etching and opened. As a result, an SiO ₂ interlayer insulating film 713 is formed on the second single crystal layer 4 as shown in FIG.
And as shown in the figure (g), after depositing metals, such as nickel, the electrode film 714 is formed by patterning. In this state, a Schottky interface is formed by instantaneously raising the temperature to over 1000 ° C. by lamp annealing or the like. The electrode film 714 can be further increased using aluminum or the like. Through the above steps, a multilayer substrate 72 for forming a Schottky diode is obtained.

FIG. 11 shows a step of forming a back electrode in the first embodiment using the carbon substrate 1 as a support substrate. As in the previous figure, a region corresponding to one element is shown. FIG. 11A shows the multilayer substrate 72 that has undergone the element formation process as described above, and a Schottky diode is formed on the upper surface side of the multilayer substrate 72. The multilayer substrate 72 is configured by laminating a first single crystal layer 21 (not shown) and a second single crystal layer 4 on a polycrystalline SiC layer 3 formed on the carbon substrate 1. Yes. Thereafter, the back surface side of the multilayer substrate 72, that is, the side opposite to the second single crystal layer 4 can be processed by a process as shown in FIG. As shown in FIG. 5A, the surface of the back surface of the multilayer substrate 72 (the back surface 302 of the polycrystalline SiC layer 3) on the back surface side of the multilayer substrate 72 is adjusted by grinding or polishing as necessary. Thereafter, as shown in FIG. 4B, a back electrode film 715 is formed on the back surface 302 using nickel or the like. The back electrode film 715 may be silicided by an instantaneous high temperature treatment. Then, as shown in FIG. 5C, a thick film layer 716 may be formed on the back electrode film 715 using copper or the like. As described above, the multilayer substrate 73 on which the first-type Schottky diode element is formed can be obtained.

FIG. 12 shows a process of removing the carbon substrate 1 in the case of the second embodiment in which the carbon substrate 1 is used as a temporary base. A multilayer substrate 75 shown in FIG. 12A is obtained by applying the element forming process described in FIG. 10 to both surfaces of the multilayer substrate 52 (FIG. 3B). Schottky diodes 751 are formed on the upper surface side and the lower surface side of the multilayer substrate 52, respectively. Although the Schottky diode 751 is formed on the entire surface of the multilayer substrate 75, only one surface is schematically shown in the drawing. From this state, the multi-layer substrate 75 is cut concentrically, thereby removing the peripheral portion of the multi-layer substrate 75 as shown in FIG. As a result, at least the polycrystalline SiC layer 3 formed on the side surface 103 of the carbon substrate 1 is removed, and the end portion 103 ′ of the carbon substrate 1 is exposed. In this state, the carbon substrate 1 can be removed by incineration or the like. As a result, the multi-layer substrate 75 is separated into upper and lower two sheets. FIG. 3C shows one multilayer substrate 76 from which the carbon substrate 1 has been removed and separated. The multi-layer substrate 76 is formed by stacking the first single crystal layer 21 (not shown) and the second single crystal layer 4 on the polycrystalline SiC layer 3 as a support substrate.

After the carbon substrate 1 is removed, the back surface side of the multilayer substrate 76, that is, the side opposite to the second single crystal layer 4 can be processed by a process as shown in FIG. As shown in FIG. 6A, in order to remove the surface layer portion having a lot of disorder of crystallinity on the back surface side of the multilayer substrate 76, the back surface of the multilayer substrate 76 (the back surface 302 of the polycrystalline SiC layer 3) is ground or removed. A certain thickness (for example, about 10 μm) may be removed by polishing. Thereafter, as shown in FIG. 4B, a back electrode film 715 is formed on the back surface 302 using nickel or the like. The back electrode film 715 may be silicided by an instantaneous high temperature treatment. Then, as shown in FIG. 3C, a thick film layer 716 is formed on the back electrode film 715 using copper or the like. As described above, the multilayer substrate 77 on which the second type Schottky diode element is formed is obtained.

(Formation of MOSFET elements)
FIG. 14 shows a step of forming a MOSFET element (see FIG. 15B) on the second single crystal layer 4 formed on the surface layer of the composite substrate 5. The first single crystal is SiC. FIG. 14A shows the multilayer substrate 51 or 52 shown in FIG. Here, for simplicity, the first single crystal layer 21 is not shown. Further, only one surface (upper surface 101) side of the carbon substrate 1 is displayed. In order to form MOSFET elements on both surfaces, each surface may be processed alternately. This figure is an enlarged view of a region (A portion shown in FIG. 10A) corresponding to one element on the composite substrate 51 or 52, and represents a process of forming one element.
First, a SiO ₂ film is formed on the surface of the N-type second single crystal layer 4, and a necessary portion is opened by photolithography to form a mask. Then, P-type impurities are ion-implanted into the opening of the mask while being heated to about 500 ° C., and the mask is removed after the ion implantation. As a result, a P well 811 is formed in the surface layer portion of the second single crystal layer 4 as shown in FIG. Subsequently, an N + region can be formed by implanting impurities using the pattern of the SiO ₂ film as a mask. Thereby, a source part, a drain part, etc. are formed. FIG. 6B shows a state in which a P well 811, a source portion 812, a drain portion 813, and the like are formed. After the P-well made of P-type impurities and the source and drain made of N + impurities are formed, an annealing process is performed at a high temperature to activate these impurities. When the second single crystal layer 4 is SiC, an annealing process is performed at about 1700 ° C.
Thereafter, a SiO ₂ film having a thickness of about 1 μm is formed on the surface of the second single crystal layer 4 by thermal CVD, and a portion to be an electrode is removed by etching and opened. Subsequently, the insulating film is partially removed by etching around the gate portion 815. As a result, an interlayer insulating film 814 is formed on the second single crystal layer 4 as shown in FIG. The figure shows a state before the generation of the gate oxide film. Next, a gate oxide film 816 is formed as shown in FIG. Gate oxide film 816 can be formed in an oxygen atmosphere when carbon substrate 1 is completely covered with polycrystalline SiC layer 3. When the polycrystalline SiC layer 3 is formed on one surface of the carbon substrate 1 and the other surface of the carbon substrate 1 is exposed, a gate oxide film that can be formed without being in an oxygen atmosphere is selected. There is a need. FIG. 5E shows a structure in which an electrode 817, a wiring layer 818, and the like are further formed. Thus, the multilayer substrate 82 on which the MOSFET is formed is obtained.
Subsequently, in the same manner as in the case of the Schottky diode, the carbon substrate 1 is removed, and a back electrode film is formed on the back side of the multilayer substrate 82, that is, the side opposite to the second single crystal layer 4. Two types of MOSFET elements can be formed.

In the process described with reference to FIG. 14, when the carbon substrate 1 is exposed and oxygen is required to form the gate oxide film 816, the carbon substrate 1 is removed before the gate oxide film is formed. Then, a gate oxide film is generated using the polycrystalline SiC layer 3 as a supporting substrate. Thereafter, the electrode film, the wiring layer, and the like can be formed after reducing warping by bonding a sapphire substrate or the like as a temporary support substrate. Since these processes do not require high-temperature heat treatment, warpage can be suppressed by the temporary support substrate that is bonded.
In FIG. 14, the structure example of the planar structure MOSFET is shown for reference. However, even in the case of the trench structure MOSFET, the second single crystal is formed by the element formation process and the second element formation process described above. It is possible to form elements in the layer 4.

As described above, the multilayer substrates 51 to 53 shown in FIG. 3 are suitable as semiconductor substrates for forming elements for high power applications. This semiconductor substrate includes a carbon substrate 1 having a polycrystalline SiC layer 3 formed on the surface thereof, and a first single crystal layer made of a single crystal of a first semiconductor material formed on the polycrystalline SiC layer 3. 21 and a second single crystal layer 4 made of a single crystal of the second semiconductor material formed on the first single crystal layer 21.
Polycrystalline SiC layer 3 is formed on at least one plane of carbon substrate 1. Furthermore, it can be configured to be formed also on the side surface of the carbon substrate 1. For example, in the multilayer substrate 51 (FIG. 3A) that is the most basic configuration, the polycrystalline SiC layer 3 is formed on both the planes 101 and 102 and the side surface 103 of the carbon substrate 1. The first single crystal layer 21 and the second single crystal layer 4 are sequentially stacked on the polycrystalline SiC layer 3 formed on one plane 101 of the carbon substrate 1. In the multilayer substrate 52 (FIG. 3B), the polycrystalline SiC layer 3 is formed on both the planes 101 and 102 and the side surface 103 of the carbon substrate 1. That is, the entire surface of the carbon substrate 1 is covered with the polycrystalline SiC layer 3. A first single crystal layer 21 and a second single crystal layer 4 are sequentially stacked on the polycrystalline SiC layer 3 formed on each plane of the carbon substrate 1. In the multilayer substrate 53 (FIG. 3C), the polycrystalline SiC layer 3 is formed on one plane 101 of the carbon substrate 1. The first single crystal layer 21 and the second single crystal layer 4 are sequentially stacked on the polycrystalline SiC layer 3 formed on the plane 101 of the carbon substrate 1. A second polycrystalline layer 41 having the same thickness as that of the second single crystalline layer 4 is formed on the peripheral portion where the first single crystalline layer 21 is not present on the polycrystalline SiC layer 3.
The first semiconductor material may be one of SiC, GaN, and gallium oxide, and the second semiconductor material may be one of SiC, GaN, and gallium oxide. Moreover, it is preferable to select SiC as the first semiconductor material.
The thickness of the first single crystal layer 21 can be reduced to about 0.1 to 1.5 μm. The thickness of the second single crystal layer 4 varies depending on the material and application. In the case of SiC, the thickness is approximately 5 μm (withstand voltage of 600 V) to 10 μm (withstand voltage of 1500 V).

The semiconductor substrate may be configured such that a semiconductor element is formed using the carbon substrate 1 as a support layer (first form), or configured such that the semiconductor element is formed by removing the carbon substrate 1. It is also possible (second form). In the case of the second mode, for example, the carbon substrate 1 is removed as shown in FIG. Therefore, the semiconductor substrate of the second form includes the polycrystalline SiC layer 3, the first single crystal layer 21 made of a single crystal of the first semiconductor material formed on the polycrystalline SiC layer 3, and the first single crystal layer. The second single crystal layer 4 made of a single crystal of the second semiconductor material formed on the crystal layer 21 is formed. That is, in the first embodiment, the carbon substrate 1 is a support substrate, whereas in the second embodiment, the polycrystalline SiC layer 3 is a support substrate.
For this reason, the thickness of the carbon substrate 1 and the polycrystalline SiC layer 3 can be configured with different thicknesses in the case of the first form and the case of the second form. For example, in the case of the first embodiment, the thickness of the carbon substrate 1 can be about 250 to 1000 μm, and the thickness of the polycrystalline SiC layer 3 can be about 1 to 10 μm. In the case of the second embodiment, the thickness of the polycrystalline SiC layer 3 can be about 100 to 150 μm.
The semiconductor substrate of the second form is configured by removing the carbon substrate 1. Therefore, when forming a semiconductor element, it is preferable to perform as many element processes as possible before the carbon substrate 1 is removed.

In the above embodiments, the case where the first semiconductor material and the second semiconductor material are SiC has been mainly described, but the same applies even if they are GaN, gallium oxide, gallium oxide, or the like. The same applies to the case where the first semiconductor material is SiC and the second semiconductor material is GaN, gallium oxide, gallium oxide, or the like.

Note that the present invention is not limited to the embodiments described in detail above, and various modifications or changes can be made within the scope of the claims of the present invention.

Power-based compound semiconductor elements using SiC and the like are becoming increasingly important with the spread of hybrid cars and electric cars in cars. In addition, the role of power-based compound semiconductor devices becomes important for home appliance control and energy management with the spread of smart grids at home. According to the present invention, the amount of SiC single crystal, which is an expensive material, can be greatly reduced, and an inexpensive SiC semiconductor element can be manufactured.

DESCRIPTION OF SYMBOLS 1; Carbon substrate, 101; Carbon substrate upper surface, 102; Carbon substrate lower surface, 103; Carbon substrate side surface, 2; Single crystal substrate, 21; First single crystal layer, 25; Hydrogen injection layer, 3; Crystal SiC layer, 4; second single crystal layer, 41; second polycrystalline layer, 5, 51, 52, 53; multilayer substrate, 711, 712; P-type impurity region, 713; interlayer insulating film, 714 Electrode film, 715; back electrode film, 72, 73, 75, 76, 77; multilayer substrate on which Schottky diode element is formed, 751; Schottky diode element, 811; P well, 812; source part, 813 ; Drain part, 814; interlayer insulating film, 815; gate part, 816; gate oxide film, 817; electrode film, 818; wiring layer, 82; multilayer substrate on which MOSFET element is formed, 91; Eau element, 92; MOSFET device.

Claims (12)

1. A first film forming step of forming a polycrystalline SiC layer on at least one plane of the carbon substrate;
   A hydrogen layer forming step of forming a hydrogen injection layer at a predetermined depth from one plane of a single crystal substrate made of a single crystal of a first semiconductor material;
   A bonding step of bonding the surface of the polycrystalline SiC layer formed on the plane of the carbon substrate and the one plane of the single crystal substrate;
   Separating the single crystal substrate with the hydrogen injection layer to leave the one plane side of the separated single crystal substrate on the polycrystalline SiC layer as a first single crystal layer;
   By forming a second single crystal layer made of a second semiconductor material on the surface of the first single crystal layer, the polycrystalline SiC layer, the first single crystal layer and the carbon substrate are formed on the carbon substrate. A second film forming step of obtaining a multilayer substrate in which a second single crystal layer is sequentially laminated;
   An element forming step of forming a semiconductor element on the second single crystal layer of the multilayer substrate;
   The manufacturing method of the semiconductor element characterized by the above-mentioned.
2. The method for manufacturing a semiconductor element according to claim 1, further comprising a removing step of removing the carbon substrate from the multilayer substrate.
3. 3. The method of manufacturing a semiconductor element according to claim 1, wherein, in the first film forming step, the polycrystalline SiC layer is formed so as to cover both planes and side surfaces of the carbon substrate.
4. In the bonding step, the surface of the polycrystalline SiC layer formed on each plane of the carbon substrate and the one plane of the two single crystal substrates are respectively bonded.
   After performing the separation step, in the second film formation step, the second single crystal layers are formed on the surfaces of both the first single crystal layers, respectively. Obtaining a multilayer substrate in which the polycrystalline SiC layer, the first single crystal layer, and the second single crystal layer are sequentially laminated;
   In the element formation step, a semiconductor element is formed on each of the second single crystal layers formed on both surfaces of the multilayer substrate.
   A method for manufacturing a semiconductor device according to claim 3.
5. 5. The manufacturing of a semiconductor device according to claim 2, wherein the element forming step includes a first element forming step performed before the removing step and a second element forming step performed after the removing step. Method.
6. 6. The method of manufacturing a semiconductor element according to claim 1, wherein an end of a surface of the carbon substrate on which the polycrystalline SiC layer is formed is chamfered.
7. The first semiconductor material is one of SiC, GaN and gallium oxide;
   The method for manufacturing a semiconductor element according to claim 1, wherein the second semiconductor material is one of SiC, GaN, and gallium oxide.
8. The method of manufacturing a semiconductor element according to claim 7, wherein the first semiconductor material is SiC.
9. 9. The method of manufacturing a semiconductor element according to claim 1, wherein in the second film formation step, the second single crystal layer is formed by epitaxial growth or MOCVD.
10. A polycrystalline SiC layer, or a carbon substrate having a polycrystalline SiC layer formed on the surface thereof;
    A first single crystal layer made of a single crystal of a first semiconductor material formed on the polycrystalline SiC layer;
    A second single crystal layer made of a single crystal of a second semiconductor material formed on the first single crystal layer;
    A semiconductor substrate comprising:
11. The first semiconductor material is one of SiC, GaN and gallium oxide;
    The semiconductor substrate according to claim 10, wherein the second semiconductor material is one of SiC, GaN, and gallium oxide.
12. The semiconductor substrate according to claim 11, wherein the first semiconductor material is SiC.

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