JP7107479B2 - Printed circuit board, package and method for manufacturing printed circuit board - Google Patents

Description

The present invention relates to a printed circuit board, a package, and a method of manufacturing the printed circuit board.

As the performance of semiconductor chips becomes higher, there is a demand for a packaging technology capable of rapidly transmitting signals. In addition, there is a demand for a technology to make the thickness of the package thinner as electronic equipment becomes lighter, thinner, shorter and smaller.

Chip manufacturers are developing FO-WLP packages in which wiring layers are formed directly on the chip to speed up and stabilize signals. Packaging substrate manufacturers are attempting to reduce the thickness of packages by developing substrates having a thickness of 100 μm or less.

Korean Patent Publication No. 10-2013-0055335

An embodiment of the present invention provides a printed circuit board that can reduce the thickness of the package.

Further, embodiments of the present invention provide a printed circuit board capable of rapidly transmitting signals between a semiconductor chip and a main board.

1 illustrates a printed circuit board and package according to one embodiment of the present invention; FIG. FIG. 4 illustrates a printed circuit board and package according to another embodiment of the present invention; It is a figure which shows one process for demonstrating the manufacturing method of the printed circuit board based on one Example of this invention. FIG. 4 is a diagram showing the next step of FIG. 3; 5 is a diagram showing the next step of FIG. 4; FIG. FIG. 6 is a diagram showing the next step of FIG. 5; FIG. 7 is a diagram showing the next step of FIG. 6; FIG. 8 is a diagram showing the next step of FIG. 7; FIG. 9 is a diagram showing the next step of FIG. 8; FIG. 10 is a diagram showing the next step of FIG. 9;

The terminology used in this application is for the purpose of describing particular embodiments only and is not intended to be limiting of the invention. Singular terms include plural terms unless the context clearly dictates otherwise.

In this application, terms such as "including" or "having" designate the presence of any feature, number, step, act, component, part, or combination thereof described herein, It should be understood that nothing precludes the presence or addition of one or more other features, figures, steps, acts, components, parts or combinations thereof.

Further, throughout the specification, "upper" means positioned above or below the target portion, and does not necessarily mean positioned above the direction of gravity.

In addition, in the contact relationship between each component, the term “bond” does not mean only the case where each component is in direct physical contact, and another structure intervenes between each component. It is used as a concept that includes the case where each component is in contact with the other configuration.

The size and thickness of each component shown in the drawings are arbitrarily shown for convenience of explanation, and the present invention is not necessarily limited thereto.

Hereinafter, embodiments of the printed circuit board, the package, and the method of manufacturing the printed circuit board according to the present invention will be described in detail with reference to the accompanying drawings. are assigned the same reference numerals, and redundant description thereof will be omitted.

(Printed circuit board and package)
FIG. 1 illustrates a printed circuit board and package according to one embodiment of the present invention. FIG. 2 illustrates a printed circuit board and package according to another embodiment of the invention.

Referring to FIG. 1, a printed circuit board 500 according to an embodiment of the present invention includes a first insulating part 100, a second insulating part 200, an accommodation groove CV, a protective layer 300, and a connecting conductor pattern layer 400. ,including.

Each of the first insulation part 100 and the second insulation part 200 includes at least one or more insulation layers 110 and 210 . An insulating layer forming the first insulating portion 100 is called a first insulating layer 110, and an insulating layer forming the second insulating portion 200 is called a second insulating layer 210. is commonly referred to as an insulating layer unless it is necessary to distinguish between the two layers, and the description will be made in common.

The insulating layers 110 and 210 can be formed of a thermosetting resin such as epoxy resin, a thermoplastic resin such as polyimide, or a resin impregnated with reinforcing material such as glass fiber or inorganic filler, such as prepreg. . As another example, the insulating layers 110, 210 can be formed of build-up films such as ABF. As another example, the insulating layers 110 and 210 can be made of photocurable resin. In other examples and also other examples of the insulating layers 110, 210, the insulating layers 110, 210 can include inorganic fillers.

At least one selected from the group consisting of alumina, silica, glass, silicon carbide and mixtures thereof can be used as the inorganic filler. As the inorganic filler, those having various shapes such as spherical, hemispherical, polygonal, cylindrical or plate-like can be used. The diameter of the inorganic filler can be variously selected from several nanometers to several hundreds of nanometers. When the inorganic filler is not spherical, the diameter of the inorganic filler means the longest length among a plurality of line segments connecting two different points on the surface of the inorganic filler and passing through the weight center of the inorganic filler.

Conductor pattern layers 120 and 220 are formed on the insulating parts 100 and 200, respectively. That is, the first conductor pattern layer 120 is formed on the first insulating part 100 , and the second conductor pattern layer 220 is formed on the second insulating part 200 . A plurality of each of the first conductor pattern layer 120 and the second conductor pattern layer 220 can be formed.

The conductor pattern layers 120 and 220 are embedded in the first and second insulating parts 100 and 200 and are not exposed to the outside. However, at least a portion of the conductor pattern layers 120 and 220 formed as the outermost layers protrude from the insulating portions 100 and 200 .

The conductor pattern layers 120, 220 are made of an electrically conductive material. By way of example, the conductor pattern layers 120 and 220 can be made of copper (Cu), but not limited to, nickel (Ni), aluminum (Al), and various other electrically conductive materials.

In FIG. 1, each of the first insulating part 100 and the second insulating part 100 is formed on two insulating layers 110, 210, but this is only an example. That is, each of the first insulation part 100 and the second insulation part 200 may be formed of three or more insulation layers or one insulation layer.

Also, the respective numbers of the first conductor pattern layers 120 and the second conductor pattern layers 220 shown in FIG. 1 are merely examples. As another example, the first conductor pattern layer 120 may be formed in a four-layer structure on the first insulating part 100 . As another example, the second conductor pattern layer 220 may be formed in the second insulating part 200 to have a three-layer structure.

The accommodation groove CV is formed through the second insulating part 200 . An electronic component 600, which will be described later, is arranged in the accommodation groove CV. The width and depth of the accommodation groove CV may correspond to the width and height of the electronic component 600, but are not limited thereto. For example, the accommodation groove CV may be wider than the electronic component 600 so that the electronic component 600 can be more easily arranged in the package 1000 according to the present embodiment.

The receiving groove CV can be formed by laser drilling, CNC drilling, punching or chemical etching. Alternatively, if the second insulating layer 210 contains a photocurable resin, the accommodation groove CV can be formed by a photolithography process.

The protective layer 300 is formed between the first insulating part 100 and the second insulating part 200 and between the first insulating part 100 and the receiving groove CV. That is, the protective layer 300 is formed on the entire surface of the first insulating part 100 and formed between the first insulating part 100 and the second insulating part 200 . Therefore, at least part of the protective layer 300 is exposed to the outside through the accommodation groove CV.

Protective layer 300 is formed of a thermosetting solder resist.

The protective layer 300 employed in this embodiment is a thermosetting solder resist instead of a normal photo-setting solder resist.

As will be described later, the protective layer 300 is formed prior to the formation of the first insulating section 100, so the protective layer 300 is formed using a thermosetting solder resist. When the protective layer 300 employed in this embodiment is formed of a photocurable solder resist, heat and pressure applied to the protective layer 300 during the substrate process generate gas, which may increase the possibility of defective substrates. There is

Thermosetting solder resists can include epoxy and cyanate based resins. Thermosetting solder resists can contain inorganic fillers such as alumina, silica, glass and silicon carbide.

The connection conductor pattern layer 400 includes the connection pattern 410 exposed from the accommodation groove CV and is formed to be embedded in the protective layer 300 . The connection conductor pattern layer 400 is formed on the protective layer 300 in a shape embedded in one surface of the protective layer 300 .

The connection pattern 410 is electrically connected to electronic components, which will be described later. A connection pattern 410 is also embedded in the protective layer 300 . One surface of the connection pattern 410 is positioned on the same plane as one surface of the protective layer 300 or recessed from one surface of the protective layer 300 to be exposed to the accommodation groove CV.

On the other hand, although FIG. 1 and the like show the connection pattern 410 penetrating the protective layer 300, this is merely an example. That is, the connection pattern 410 may be formed in the form of a pad that does not penetrate the passivation layer 300 according to design requirements. The number of connection patterns 410 and the pitch between connection patterns 410 can be variously changed according to the number of external connection terminals of electronic component 600 and the pitch between external connection terminals, which will be described later.

The connection conductor pattern layer 400 may further include connection vias 420 penetrating the protective layer 300 and connecting the first conductor pattern layer 120 and the second conductor pattern layer 220 to each other. The connection via penetrates the protective layer 300 and electrically connects the first patterned conductor layer 120 and the second patterned conductor layer 220 .

The connection conductor pattern layer 400 may further include a stop pattern 430 formed across the boundary between the second insulation part 200 and the receiving groove CV.

The stop pattern 430 is included in the connecting conductor pattern layer 400 , and as described above, the connecting conductor pattern layer 400 is embedded in the protective layer 300 . The protective layer 300 can be divided into a first region where the second insulating part 200 is formed and not exposed to the outside, and a second region exposed to the outside by the accommodation groove CV. Therefore, the fact that the stop pattern 430 is formed across the boundary between the second insulating part 200 and the receiving groove CV means that the stop pattern 430 is formed across the first region and the second region of the protective layer 300 . can be understood.

In the manufacturing process of the printed circuit board according to the present embodiment, when the resin forming the second insulating layer 210 flows inside the accommodation groove CV, the stopping pattern 430 is used to remove the flowing resin with a laser. It is possible to prevent the insulating part 100 and the protective layer 300 from being removed by the laser. That is, the stop pattern 430 can function as a stopper for the laser.

The connecting conductor pattern layer 400, the connection pattern 410, the connection via 420 and the stop pattern 430 are made of an electrically conductive material. For example, the connection pattern 410 can be made of copper (Cu), but not limited to, and can be made of various electrically conductive materials such as nickel (Ni) and aluminum (Al).

A package 1000 according to an embodiment of the present invention includes a printed circuit board 500 according to an embodiment of the present invention, and an electronic component 600 arranged in the accommodation groove CV and connected to the connection pattern 410 .

Electronic component 600 may be a semiconductor chip. The semiconductor chip may have an active surface on one side and an inactive surface on the other side. External connection terminals are formed on one surface of the semiconductor chip and can be electrically connected to the printed circuit board 500 according to the present embodiment.

The number of external connection terminals of electronic component 600 shown in FIG. 1 etc. is merely an example.

The printed circuit board 500 and the package 1000 according to an embodiment of the present invention may further include solder resist layers SR formed on the bottom surface of the first insulation part 100 and the top surface of the second insulation part 200 . An opening may be formed in the solder resist layer SR to expose at least a portion of the conductor pattern layers 120 and 220 formed on the outermost layers of the first insulating part 100 and the second insulating part 200 to the outside.

The solder resist layer SR can contain a photocurable or thermosetting resin. When the solder resist layer SR contains a photocurable resin, the opening can be formed using a photolithography process. If the solder resist layer SR contains a thermosetting resin, the openings can be formed by laser drilling or sandblasting.

The printed circuit board 500 and the package 1000 according to an embodiment of the present invention are formed on the first insulating part 100 and the second insulating part 200, respectively, and connect different first conductor pattern layers 120 to connect different second conductive pattern layers 120 to each other. Vias connecting the conductor pattern layers 220 may be further included.

A via is formed of an electrically conductive material. By way of example, the vias can be formed of copper (Cu), but not limited to, nickel (Ni), aluminum (Al), and various other electrically conductive materials.

Meanwhile, although not shown, the package 1000 according to an embodiment of the present invention includes a molding material formed between the side surface of the electronic component 600 and the inner surface of the receiving groove CV to protect the electronic component 600 . can further include:

(Method for manufacturing printed circuit board and package)
3 to 9 are diagrams sequentially showing manufacturing processes for explaining a method of manufacturing a printed circuit board according to an embodiment of the present invention.

A method for manufacturing a printed circuit board according to an embodiment of the present invention includes the steps of: forming a first insulating part having a protective layer formed on one surface thereof on a carrier; separating the carrier from the first insulating part; and forming a second insulating part having an accommodation groove on the protective layer.

Forming the first insulation on the carrier includes forming a protective layer on the carrier and forming a through hole in the protective layer.

First, as shown in FIG. 3, a carrier C is prepared.

The carrier C includes a support portion S, a first copper foil CF1 formed on both sides of the support portion S, a second copper foil CF2 formed on the first copper foil CF1, and an anti-etching layer formed on the second copper foil CF2. ES, and a third copper foil CF3 formed on the anti-etching layer ES.

The material of the supporting portion S is not particularly limited as long as it has sufficient rigidity to support the protective layer 300 and the first insulating portion 100 in the process of forming the protective layer 300 and the first insulating portion 100 . The support portion S may be made of a resin material such as a PET film, or may be made of a metal material, although the material is not limited to this.

The first copper foil CF1 supports the protective layer 300 and the first insulating part 100 in the step of forming the protective layer 300 and the first insulating part 100 together with the supporting part S. The first copper foil CF1 can be made of copper or an alloy containing copper. The first copper foil CF1 may have a thickness of 18 μm, as an example.

The second copper foil CF2 is separated from the first copper foil CF1 in the step of separating the carrier C and the first insulating part 100, which will be described later. In order to facilitate separation between the second copper foil CF2 and the first copper foil CF1, the carrier C includes a release layer RL formed between the first copper foil CF1 and the second copper foil CF2. can further include: The second copper foil CF2 can have a thickness of 5 μm as an example.

The anti-etching layer ES is formed by etching the connecting conductor pattern layer 400 when removing the second copper foil CF2 attached to the first insulating part 100 after separating the first insulating part 100 from the carrier C. to prevent The anti-etching layer ES can be made of a material that does not chemically react with the etching solution that etches the second copper foil CF2. Exemplarily, the anti-etching layer ES may be made of nickel (Ni).

The third copper foil CF3 can function as a seed layer when forming the connecting conductor pattern layer 400 by electrolytic plating. The third copper foil CF3 may illustratively have a thickness of 0.3 μm.

When the third copper foil CF3 is thin, the connection pattern 410 can be formed finely. can do.

On the other hand, the structure of the carrier C described above is merely an example, and the scope of the present invention is not limited to the structure of the carrier C described above. The structure of the carrier C can be varied according to design needs.

Next, as shown in FIG. 4, a connecting conductor pattern layer 400, a protective layer 300, and a first conductor pattern layer 120 are formed on the carrier C. As shown in FIG. The order of forming the connecting conductor pattern layer 400 and the protective layer 300 can be changed according to design requirements. Also, a part of the connecting conductor pattern layer 400 may be formed first, and the other part of the connecting conductor pattern layer 400 may be formed after the protection layer 300 is formed.

When manufacturing the printed circuit board 500 according to one embodiment of the present invention shown in FIG. A connecting conductor pattern layer 400 including connection vias 420 and stop patterns 430 may be formed.

The protective layer 300 can be formed by laminating a film-like thermosetting solder resist. The connecting conductor pattern layer 400 can be formed by removing part of the protective layer 300 by sandblasting to expose the carrier C to the outside, and by electrolytic plating using the third copper foil CF3 of the carrier C as a seed layer.

The first conductive pattern layer 120 can be formed by electrolytic plating after forming a patterned plating resist on the protective layer 300 . The connection conductor pattern layer 400 and the first conductor pattern layer 120 may be formed through the same plating process or separate plating processes.

In this embodiment, in order to form the connecting conductor pattern layer 400, a portion of the protective layer 300 is removed by sandblasting, which is relatively superior in straightness than laser drilling. Therefore, the connection conductor pattern layer 400 formed according to the present embodiment has a steeper slope of the side surface than laser vias or the like.

On the other hand, when manufacturing the printed circuit board 500' according to another embodiment of the present invention shown in FIG. After forming the protective layer 300, the connection vias 420 and the stop pattern 430 can be formed. At this time, as described above, the first conductor pattern layer 120 may be formed by the same plating process as the connection via 420 and the stop pattern 430 or by a separate plating process.

Next, as shown in FIG. 5, the first insulating layer 110 and another first conductor pattern layer 120 are formed on the first conductor pattern layer 120 and the protective layer 300 . The process of forming the first insulating layer 110 and the process of forming the other first conductive pattern layer 120 can be repeated several times according to design needs.

The first insulating layer 110 may be formed by laminating a film-like prepreg or an ABF film. The first conductive pattern layer 120 can be formed using any one of a subtractive method, an additive method, a semi-additive method, or a modified semi-additive process (MSAP) method.

The via can be formed by stacking the first insulating layer 110, forming a via hole in the first insulating layer 110, and filling the via hole with a conductive material. The via hole may be formed using one or more of laser drilling, CNC drilling, chemical etching, and photolithography according to the type of the first insulating layer 110 .

The via can be formed in the via hole by electroplating, but is not limited to this, and can be formed by filling the via hole with a conductive paste. The vias can be formed together with the first conductor pattern layers 120 in the plating process that forms each first conductor pattern layer 120 .

Next, as shown in FIG. 6, a solder resist layer SR is formed on the outermost first conductor pattern layer 120 . The solder resist layer SR can be formed by stacking solder resist films. An opening is formed in the solder resist layer SR to expose at least a portion of the outermost first conductor pattern layer 120 . Apertures can be formed in the solder resist layer using laser drilling, sandblasting or photolithography processes.

Next, the first insulating part 100 is separated from the carrier C, as shown in FIG. Specifically, the first copper foil CF1 and the second copper foil CF1 of the carrier C are separated from each other. Therefore, the second copper foil CF2 of the carrier C, the anti-etching layer ES, and the third copper foil CF3 are separated from the first copper foil CF1 of the carrier C together with the first insulating part 100. FIG.

Next, as shown in FIG. 8, the second copper foil CF2, the anti-etching layer ES, and the third copper foil CF3 are sequentially removed. When removing the second copper foil CF2 by etching, the etching prevention layer ES prevents the third copper foil CF3 and the connecting conductor pattern layer 400 from being removed by etching. When removing the third copper foil CF3 by etching, part of the connecting conductor pattern layer 400 in contact with the third copper foil CF3 is removed, and one surface of the connecting conductor pattern layer 400 is recessed from one surface of the protective layer 300. It may also be formed in a different shape.

Next, as shown in FIG. 9, the second insulating section 200 is formed on the protective layer 300. Next, as shown in FIG.

The second insulating part 200 can be formed by sequentially forming a second insulating layer 210 , vias, and a second conductor pattern layer 220 on the protective layer 300 . At this time, the second insulating layer 210 can be laminated on the protective layer 300 in a state in which a through groove that becomes the accommodation groove CV is formed in advance. In this case, the second insulating layer 210 may be made of No-Flow PPG with low fluidity. The steps of forming the second insulating layer 210, the vias and the second conductor pattern layer 220 can be repeated several times according to design needs.

A method of manufacturing a package according to an embodiment of the present invention includes placing an electronic component in a receiving groove of a printed circuit board and forming a molding material between a side surface of the electronic component and an inner wall of the receiving groove.

First, the electronic component 600 is placed in the accommodation groove CV of the printed circuit board 500' shown in FIG. External connection terminals are formed on the active surface of the electronic component 600, and the electronic component 600 is housed so that the external connection terminals are connected to the connection patterns 410 of the printed circuit board 500' according to an embodiment of the present invention. It is placed in the groove CV.

Next, a molding material is formed between the side surface of the electronic component 600 and the inner wall of the receiving groove CV. The molding material may be EMC.

An embodiment of the present invention has been described above. Alternatively, the present invention can be variously modified and changed by deletion, etc., which are also included in the scope of the present invention.

100 First insulating portion 110 First insulating layer 120 First conductor pattern layer 200 Second insulating portion 210 Second insulating layer 220 Second conductor pattern layer 300 Protective layer 400 Connecting conductor pattern layer 410 Connection pattern 420 Connection via 430 Stop pattern 500 , 500' printed circuit board 600 electronic component 1000, 1000' package CV accommodation groove SR solder resist layer C carrier S support portions CF1, CF2, CF3 copper foil RL release layer ES etching prevention layer

Claims (8)

a first insulating part;
a second insulating portion formed on the first insulating portion;
a first conductor pattern layer formed on the first insulating portion;
a second conductor pattern layer formed on the second insulating portion;
an accommodation groove formed through the second insulating part;
a protective layer formed between the first insulating portion and the second insulating portion and between the first insulating portion and the accommodation groove;
a connecting conductor pattern layer embedded in the protective layer, including a connection pattern exposed from the accommodation groove;
including
The connection pattern of the connecting conductor pattern layer embedded in the protective layer has a tapered shape that tapers in the direction of the accommodation groove,
The printed circuit board , wherein the connecting conductor pattern layer further includes a stop pattern embedded in the protective layer along a boundary between the second insulating part and the receiving groove . 2. The printed circuit board according to claim 1, wherein said protective layer is formed of a thermosetting solder resist. The connecting conductor pattern layer is
3. The printed circuit board according to claim 1, further comprising a connection via that penetrates the protective layer and connects the first conductor pattern layer and the second conductor pattern layer to each other. A printed circuit board according to any one of claims 1 to 3 ;
an electronic component arranged in the accommodation groove and connected to the connection pattern;
package containing. 5. The package according to claim 4 , wherein said electronic component is a semiconductor chip. forming on the carrier a first insulating part having a protective layer in which the connection pattern and the stop pattern are embedded;
separating the carrier and the first insulation;
forming a second insulating part having an accommodation groove on the protective layer;
The connection pattern embedded in the protective layer has a tapered shape that tapers in the direction of the accommodation groove of the second insulating part,
The method of manufacturing a printed circuit board , wherein the stop pattern embedded in the protective layer is formed across a boundary between the second insulating portion and the receiving groove . 7. The method of manufacturing a printed circuit board according to claim 6 , wherein the protective layer is formed of a thermosetting solder resist. 8. The method of manufacturing a printed circuit board according to claim 6 , wherein the connection pattern is formed in a through-hole formed by sandblasting.

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