JP7053209B2 - Manufacturing method of semiconductor growth substrate, semiconductor element, semiconductor light emitting element and semiconductor growth substrate - Google Patents

Description

The present invention relates to a semiconductor growth substrate, a semiconductor element, a semiconductor light emitting element, and a method for manufacturing a semiconductor growth substrate.

Conventionally, as semiconductor light emitting devices such as LEDs (Light Emitting Diodes) and semiconductor lasers, those using compound semiconductor materials such as GaN-based and SiC-based with a large bandgap have been proposed. Further, since these materials have high insulation breakdown electric field strength and high electron mobility, application to semiconductor devices such as high electron mobility transistors (HEMTs), which are power devices, is also being studied.

In order to improve the performance of semiconductor devices and semiconductor light emitting devices using these compound semiconductor materials, it is necessary to improve the crystal quality of the semiconductor layers constituting the functional layer and the active layer, and it is necessary to improve the crystal quality of the semiconductor layer and the substrate of the same material system as the semiconductor layer. It is preferable to use. However, since low-defect GaN substrates and SiC substrates are very expensive and the substrate size is small, it is often used to use different materials of different materials from the semiconductor layer.

When sapphire or the like is used as a dissimilar substrate, the semiconductor layer to be grown and the dissimilar substrate have different lattice constants and crystal structures, so that the semiconductor layer is grown via a buffer layer for alleviating lattice mismatch. Is common. In addition, techniques for selectively forming masks on dissimilar substrates and forming grooves on dissimilar substrates to reduce crystal defects caused by lattice mismatch and difference in linear expansion coefficient due to lateral growth are also used. (See, for example, Patent Documents 1, 2, etc.).

Japanese Unexamined Patent Publication No. 11-130597 Japanese Unexamined Patent Publication No. 2000-106455

However, in the above-mentioned transverse growth of the prior art, the growth region size of the dissimilar substrate is several μm to several hundred μm, and in order to reduce the density of crystal defects and through dislocations, the number of semiconductor layers that grow laterally is also the same. It was necessary to grow with a thickness of μm to several hundred μm. Further, even if a semiconductor layer having a sufficient thickness is grown laterally, it is difficult to sufficiently reduce crystal defects and through-dislocations.

Therefore, the present invention relates to a semiconductor growth substrate, a semiconductor element, a semiconductor light emitting element, and a semiconductor growth substrate capable of reducing crystal defects and growing a semiconductor layer having good crystal quality while using an inexpensive dissimilar substrate. The subject is to provide a manufacturing method.

In order to solve the above problems, the semiconductor growth substrate of the present invention includes a dissimilar substrate having a crystal structure different from that of the semiconductor layer to be grown, a mask formed on the dissimilar substrate and having a plurality of openings, and the openings. A nanowire layer comprising a plurality of nanowires that are nano-sized to micron-sized columnar crystals with sides that are faceted planes perpendicular to the main surface of the dissimilar substrate and continuously formed on the columnar crystals. It is characterized by comprising a diameter-expanding layer in which the diameter of the nanowires is expanded and changed, and a base layer formed by combining the diameter-expanding layers of adjacent nanowires.

In such a semiconductor growth substrate of the present invention, a nanowire layer having a plurality of nanowires is formed on a dissimilar substrate, and a diameter expansion layer and an underlayer are grown from the nanowire layer, so that lattice mismatch and linear expansion coefficient difference occur. The influence can be suppressed by nanowires, and it is possible to reduce crystal defects and grow a semiconductor layer with good crystal quality while using inexpensive dissimilar substrates.

Further, in one aspect of the present invention, the dissimilar substrate is any one of a sapphire substrate, a Si substrate, and a SiC substrate.

Further, in one aspect of the present invention, the nanowire layer, the diameter expansion layer, and the base layer are GaN single crystals, and the GaN single crystal has the c-plane as the main growth surface.

Further, in order to solve the above problems, the semiconductor device of the present invention is characterized in that a functional layer is provided on the semiconductor growth substrate according to any one of the above.

Further, in order to solve the above problems, the semiconductor light emitting device of the present invention is characterized in that an active layer is provided on the semiconductor growth substrate according to any one of the above.

Further, in order to solve the above problems, the method for manufacturing a semiconductor growth substrate of the present invention includes a mask forming step of forming a mask having a plurality of openings on a dissimilar substrate having a crystal structure different from that of the semiconductor layer to be grown. A nanowire forming step of forming a nanowire layer by selectively growing a plurality of nanowires which are nano-sized to micron-sized columnar crystals having a side surface which is a facet surface perpendicular to the main surface of the dissimilar substrate from the opening. A diameter expansion step of continuously expanding the diameter of the nanowires to continuously grow the diameter expansion layer on the columnar crystal, and a base layer for connecting the diameter expansion layers of adjacent nanowires to continue the growth. It is characterized by having a forming step.

In the present invention, a semiconductor growth substrate, a semiconductor element, a semiconductor light emitting element, and a semiconductor growth substrate capable of reducing crystal defects and growing a semiconductor layer having good crystal quality while using an inexpensive dissimilar substrate can be manufactured. A method can be provided.

It is a process diagram which shows the manufacturing method of the semiconductor growth substrate in 1st Embodiment of this invention, FIG. 1 (a) is a mask process, FIG. 1 (b) is a nanowire forming process, and FIG. 1 (c) is a diameter expansion process. 1 (d) shows a base layer forming step, and FIG. 1 (e) shows a semiconductor layer forming step. It is sectional drawing which shows typically the structure of the semiconductor light emitting element 10 in the 2nd Embodiment of this invention. It is sectional drawing which shows typically the structure of the semiconductor element 20 in 3rd Embodiment of this invention.

(First Embodiment)
Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings. The same or equivalent components, members, and processes shown in the drawings are designated by the same reference numerals, and duplicate description thereof will be omitted as appropriate. 1A and 1B are process diagrams showing a method for manufacturing a semiconductor growth substrate according to the first embodiment of the present invention, FIG. 1A is a masking process, FIG. 1B is a nanowire forming process, and FIG. 1C is shown in FIG. 1 (d) shows a diameter expansion step, FIG. 1 (d) shows a base layer forming step, and FIG. 1 (e) shows a semiconductor layer forming step.

First, in the masking step shown in FIG. 1A, a dissimilar substrate 1 is prepared, a mask 1a is formed on the entire main surface, and an opening 1b is formed in a predetermined region by using a known patterning method. Here, the dissimilar substrate 1 is a single crystal substrate having a crystal structure different from that of the semiconductor layer to be grown. For example, when the material system of the semiconductor layer to be grown is a GaN system, a sapphire substrate, a Si substrate, and a SiC substrate are mentioned. Be done. Further, as will be described later, the main surface of the dissimilar substrate 1 is a crystal plane capable of growing nanowires of a growing semiconductor layer. For example, in the case of a GaN-based semiconductor layer, the c surface of the sapphire substrate is mainly used. It can be used as a surface.

The material constituting the mask 1a is not particularly limited, and a known material such as a resist can be applied by a spin coating method or the like. Further, the type of the resist film is not limited, and may be a thermosetting type or a UV curing type as long as nano-sized patterning is possible.

The opening 1b is a region where the mask 1a is partially removed to expose the main surface of the dissimilar substrate 1, and a plurality of openings 1b are two-dimensionally arranged on the main surface of the dissimilar substrate 1. .. The size of the opening 1b is nano-sized or micron-sized. The shape of the opening 1b is not limited, but a regular polygonal shape such as a circle, a quadrangle, or a hexagon is preferable. Further, the two-dimensional arrangement of the openings 1b on the main surface of the dissimilar substrate 1 is not particularly limited, and a known arrangement such as a square grid or a triangular grid can be used.

Here, the nano size indicates a range of 1 nm or more and less than 1 μm, and the nanowire which is a nano-sized columnar crystal means that the size in the width direction in the cross section parallel to the c plane is 1 nm or more and less than 1 μm. Here, the micron size indicates a range of 1 μm or more and less than 10 μm, and the nanowire which is a micron-sized columnar crystal means that the size in the width direction in the cross section parallel to the c plane is 1 μm or more and less than 10 μm. A more preferable micron size is 1 μm or more and less than 5 μm, and more preferably 1 μm or more and less than 3 μm.

Examples of the patterning method of the mask 1a include known methods such as pattern transfer by nanoimprint technology using a mold in which a predetermined pattern is formed, photolithography, and etching.

Next, in the nanowire forming step shown in FIG. 1 (b), a nano-sized or micron-sized nano-sized or micron-sized substrate 1 was exposed from the opening 1b using a metalorganic vapor deposition (MOCVD method). A plurality of nanowires, which are columnar crystals of the above, are grown to form the nanowire layer 2a. As a specific method for growing the nanowire layer 2a by the MOCVD method, when the material of the semiconductor layer to be grown on the dissimilar substrate 1 is a GaN system, for example, hydrogen and nitrogen are used as the carrier gas, and ammonia is used as the group V raw material. (NH ₃ ) is used, TMG (Trimethylgallium) is used as a group III raw material, a growth temperature of 900 to 1200 ° C., a growth pressure of 400 mbar or less, a V / III ratio of 1500 and the like.

Here, in the nanowire layer 2a, as shown in FIG. 1B, columnar crystals are selectively grown on the region of the opening 1b. For example, in a GaN-based material, a GaN single crystal having a c-plane as a main plane grows on a dissimilar substrate 1 of c-plane sapphire, but six m-planes perpendicular to the c-plane are formed as facets in the c-plane direction. This is because the growth to is prioritized. Therefore, in the case of a GaN-based material, the plurality of nanowires contained in the nanowire layer 2a are hexagonal columns perpendicular to the c-plane and having the m-plane as a side surface. FIG. 1B shows an example in which columnar crystals grow vertically from the opening 1b, but the m-plane may grow slightly in the vicinity of the opening 1b and cover the mask 1a. Further, in FIG. 1B, a flat c-plane is shown as the upper surface of the columnar crystal contained in the nanowire layer 2a, but a specific crystal plane such as the a-plane may be formed as a facet.

Next, in the diameter expansion step shown in FIG. 1 (c), the semiconductor layer is continuously grown from the plurality of columnar crystals contained in the nanowire layer 2a by using the MOCVD method. At this time, by adjusting the growth conditions, the semiconductor layer can be grown while expanding the diameter of the columnar crystal, and the diameter expansion layer 2b is formed. The diameter expansion step is continued until the diameter expansion layers 2b grown from the adjacent columnar crystals are bonded to each other.

The growth conditions for growing the diameter expansion layer 2b include lowering the growth temperature than in the nanowire forming step, increasing the growth pressure, and increasing the V / III ratio. Specifically, for example, hydrogen and nitrogen are used as carrier gases, ammonia (NH ₃ ) is used as a group V raw material, and TMG is used as a group III raw material. III ratio 3000-5000 and the like can be mentioned.

Next, in the base layer forming step shown in FIG. 1 (d), the semiconductor layer is continuously grown from the diameter expansion layer 2b using the MOCVD method, and the nanowires which are adjacent columnar crystals are bonded to each other to bond the different types of substrate 1. The base layer 2c is formed over the entire surface of the above. Here, as shown in FIG. 1 (d), the nanowire layer 2a, which is a columnar crystal, is not grown in the region on the mask 1a, and the diameter expansion layer 2b and the base layer 2c cover the upper part of the mask 1a with an overhang. A gap is formed on the mask 1a. By the process of forming the base layer shown in FIG. 1 (d), the method for manufacturing a semiconductor growth substrate according to the present invention is completed, and the semiconductor growth substrate according to the present invention is obtained.

Finally, in the semiconductor layer forming step shown in FIG. 1 (e), GaN 3 is grown on the base layer 2c by using the MOCVD method. This semiconductor layer forming step may be continuously carried out in the same MOCVD apparatus from the underlayer forming step, and the semiconductor growth substrate obtained after the completion of the underlayer forming step is taken out from the MOCVD apparatus and stored. It may be carried out by another MOCVD apparatus as a post-process.

The semiconductor growth substrate obtained by the method for manufacturing a semiconductor growth substrate in the present embodiment has a nanowire layer 2a having a plurality of nanowires formed on the dissimilar substrate 1 which are nano-sized to micron-sized columnar crystals, and a diameter of the nanowires. It is provided with a diameter-expanding layer 2b that expands and changes, and a base layer 2c formed by bonding adjacent nanowires to each other.

Since the nanowires contained in the nanowire layer 2a are columnar crystals of nano-sized to micron-sized, the area of the interface with the main surface of the dissimilar substrate 1 is extremely small, and crystal defects caused by lattice mismatch and difference in linear expansion coefficient. Is sufficiently reduced. Further, in the nanowire layer 2a, crystal defects are reduced by columnar crystals of nano size to micron size, so that the total thickness of the nanowire layer 2a, the diameter expansion layer 2b, and the base layer 2c is larger than that of the conventional defect reduction using lateral growth. It is possible to reduce the amount of crystallization, shorten the growth time, and reduce the amount of raw materials used.

The effect of reducing crystal defects described above is greater as the size in the width direction in the cross section parallel to the c-plane of the columnar crystal is smaller. Therefore, the size of the nanowire is preferably 1 μm or more and less than 10 μm, and more preferably 1 μm or more and 5 μm. It is less than, more preferably 1 μm or more and less than 3 μm, and most preferably nano-sized.

Further, since the diameter expansion layer 2b and the base layer 2c are continuously grown from the nanowire layer 2a, crystal defects are similarly sufficiently reduced. Further, in the diameter-expanding layer 2b continuously grown from the nanowire layer 2a, the crystal defects are bent in the lateral direction due to the lateral growth, so that the crystal defects penetrating to the base layer 2c can be further reduced. As a result, in the semiconductor growth substrate of the present embodiment, the crystal defects of the base layer 2c are sufficiently reduced, and the crystal defects are reduced while using an inexpensive dissimilar substrate to grow a semiconductor layer having good crystal quality. It becomes possible to do.

(Second Embodiment)
Next, the second embodiment of the present invention will be described with reference to FIG. The description of the contents overlapping with the first embodiment will be omitted. FIG. 2 is a cross-sectional view schematically showing the structure of the semiconductor light emitting device 10 according to the second embodiment of the present invention.

The semiconductor light emitting device 10 shown in FIG. 2 includes a dissimilar substrate 1, a nanowire layer 2a, a diameter expansion layer 2b, an underlayer layer 2c, a GaN layer 3, an n-type semiconductor layer 4, an active layer 5, a p-type semiconductor layer 6, and an n-side electrode. 7. It has a p-side electrode 8. Although an example of an LED is shown here as the semiconductor light emitting device 10, a known semiconductor laser structure may be formed.

Similar to the first embodiment, the dissimilar substrate 1 is prepared to form the mask 1a, and the nanowire layer 2a, the diameter expansion layer 2b, and the base layer 2c are grown by the MOCVD method. Subsequently, the GaN layer 3, the n-type semiconductor layer 4, the active layer 5, and the p-type semiconductor layer 6 are sequentially grown by the MOCVD method.

Next, a part of the p-type semiconductor layer 6 and the active layer 5 is removed by photolithography and etching using a predetermined mask pattern to expose a part of the n-type semiconductor layer 4. Next, an electrode material is formed on the exposed surfaces of the n-type semiconductor layer 4 and the p-type semiconductor layer 6 by vapor deposition or the like, and dicing is performed to form individual chips to obtain a semiconductor light emitting device 10.

Here, the n-type semiconductor layer 4 and the p-type semiconductor layer 6 have been described as single layers, but they may include a plurality of layers having different materials and compositions, for example, the n-type semiconductor layer 4 and the p-type semiconductor. The layer 6 may include a clad layer, a contact layer, a current diffusion layer, an electron block layer, a waveguide layer, and the like. Further, although the active layer 5 has been described as a single layer, it may be composed of a plurality of layers such as a multiple quantum well structure (MQW: MultiQuantum Well).

The n-type semiconductor layer 4 is a semiconductor layer epitaxially grown on the GaN layer 3 and doped with n-type impurities having the c-plane as the main surface, and electrons are injected from the n-side electrode 7 to transfer electrons to the active layer 5. It is a supply layer. Examples of the material constituting the n-type semiconductor layer 4 include GaN, AlGaN, InGaN, and AlInGaN as the III-V compound semiconductor layer, and Si and the like as the n-type impurity.

The active layer 5 is a semiconductor layer epitaxially grown on the n-type semiconductor layer 4 and has a c-plane as a main surface, and the semiconductor light-emitting element 10 emits light by light-emitting recombination of electrons and holes in the layer. The active layer 5 is made of a material having a bandgap smaller than that of the n-type semiconductor layer 4 and the p-type semiconductor layer 6, and examples thereof include InGaN and AlInGaN. The active layer 5 may be intentionally non-doped containing no impurities, or may be an n-type containing n-type impurities or a p-type containing p-type impurities.

The p-type semiconductor layer 6 is a semiconductor layer epitaxially grown on the active layer 5 and having the c-plane as the main surface, and is a layer in which holes are injected from the p-side electrode 8 to supply holes to the active layer 5. .. Examples of the material constituting the p-type semiconductor layer 6 include GaN, AlGaN, InGaN, and AlInGaN as the III-V compound semiconductor layer, and Zn and Mg as the p-type impurity.

Also in this embodiment, the semiconductor light emitting device 10 forms a nanowire layer 2a, a diameter expansion layer 2b, and a base layer 2c on a dissimilar substrate 1, and has a GaN layer 3, an n-type semiconductor layer 4, an active layer 5, and a p-type semiconductor layer. 6 is epitaxially grown. Therefore, as described in the first embodiment, crystal defects and through-dislocations can be sufficiently suppressed by nanowires, and the n-type semiconductor layer 4, the active layer 5, and the p-type semiconductor layer 6 grown on the nanowires are also good. Crystallization. As a result, the characteristics of the n-type semiconductor layer 4, the active layer 5, and the p-type semiconductor layer 6 are also improved, and it is expected that the external quantum efficiency of the semiconductor light emitting device 10 will be improved.

(Third Embodiment)
Next, a third embodiment of the present invention will be described. The description of the contents overlapping with the first embodiment will be omitted. FIG. 3 is a cross-sectional view schematically showing the structure of the semiconductor element 20 in the present embodiment. The semiconductor device using the semiconductor growth substrate in the present invention is not limited to the semiconductor light emitting device 10 such as an LED or a semiconductor laser, and may be a semiconductor element such as HEMT having a functional layer on the semiconductor growth substrate.

As shown in FIG. 3, the semiconductor element 30 includes a dissimilar substrate 1, a nanowire layer 2a, a diameter expansion layer 2b, a base layer 2c, an electron traveling layer 23, an electron supply layer 24, a protective film 25, a source electrode 26, and a gate electrode 27. It has a drain electrode 28p. Here, an example of HEMT is shown as the semiconductor element 20, but the element structure is not limited as long as it is a known semiconductor element. Further, a structure known as HEMT may be provided in each layer, or a p-type layer or an n-type layer may be added.

The electron traveling layer 23 is a layer that is epitaxially grown on the base layer 2c and electrons move, and is composed of, for example, GaN. The electron supply layer 24 is an n-type semiconductor layer having a bandgap larger than that of the electron traveling layer 23 epitaxially grown on the electron traveling layer 23, and is composed of, for example, n-type AlGaN. A two-dimensional electron gas layer is formed in the vicinity of the interface between the electron traveling layer 23 and the electron supply layer 24. Therefore, the combination of the electron traveling layer 23 and the electron supply layer 24 corresponds to the functional layer in the present invention.

The protective film 25 is an insulating film formed in a predetermined region on the electron supply layer 24, and the region in which the protective film 25 is not formed becomes a region forming the source electrode 26, the gate electrode 27, and the drain electrode 28. .. The source electrode 26 and the drain electrode 28 are electrodes made of a metal material formed on the electron supply layer 24, and are in ohmic contact with the electron supply layer 24. The gate electrode 27 is an electrode made of a metal material formed on the electron supply layer 24, and is Schottky-bonded to the electron supply layer 24.

In the electron supply layer 24, a depletion layer is formed in the vicinity of the interface with the electron traveling layer 23 by forming a two-dimensional electron gas layer, and a depletion layer is formed by Schottky bonding at the interface with the gate electrode 27. Therefore, by changing the voltage applied to the gate electrode 27, the thickness of the depletion layer is adjusted by the electric field effect to control the concentration of the two-dimensional electron gas, and the current flowing between the source electrode 26 and the drain electrode 28 is controlled. can do.

Also in this embodiment, the semiconductor element 20 has a nanowire layer 2a, a diameter expansion layer 2b, and a base layer 2c formed on the dissimilar substrate 1, and the electron traveling layer 23 and the electron supply layer 24 are epitaxially grown. Therefore, as described in the first embodiment, crystal defects and penetrating dislocations can be sufficiently suppressed by the nanowires, and the electron traveling layer 23 and the electron supply layer 24 grown on the nanowires also have good crystallinity. As a result, the characteristics of the electron traveling layer 23 and the electron supply layer 24 are also improved, and the performance of the semiconductor element 20 is expected to be improved.

(Fourth Embodiment)
Next, a fourth embodiment of the present invention will be described. The description of the contents overlapping with the first embodiment will be omitted. In the second embodiment, the semiconductor light emitting device 10 has a structure including a dissimilar substrate 1, a nanowire layer 2a, a diameter expansion layer 2b, and a base layer 2c, but polishing, etching, laser ablation, etc. are performed from the back surface side of the substrate. The technique may be used to remove the dissimilar substrate 1, the nanowire layer 2a, and the diameter expansion layer 2b. Further, the n-side electrode 7 may be provided on the side from which the dissimilar substrate 1 is removed, and the p-side electrode 8 and the n-side electrode 7 may face each other.

The present invention is not limited to the above-described embodiments, and various modifications can be made within the scope of the claims, and the embodiments obtained by appropriately combining the technical means disclosed in the different embodiments. Is also included in the technical scope of the present invention.

10 ... Semiconductor light emitting device 1 ... Dissimilar substrate 1a ... Mask 1b ... Opening 2a ... Nanowire layer 2b ... Diameter expansion layer 2c ... Underlayer layer 3 ... GaN layer 4 ... n-type semiconductor layer 5 ... Active layer 6 ... P-type semiconductor layer 7 ... n-side electrode 8 ... p-side electrode 20 ... semiconductor element 23 ... electron traveling layer 24 ... electron supply layer 25 ... protective film 26 ... source electrode 27 ... gate electrode 28 ... drain electrode

Claims (6)

A dissimilar substrate whose crystal structure is different from that of the semiconductor layer to be grown,
A mask formed on the dissimilar substrate and having a plurality of openings,
A nanowire layer comprising a plurality of nanowires that are nano-sized to micron-sized columnar crystals selectively grown from the opening and having sides that are faceted planes perpendicular to the main plane of the dissimilar substrate.
A diameter-expanding layer that is continuously formed on the columnar crystals and the diameter of the nanowires expands and changes.
A semiconductor growth substrate comprising a base layer formed by coupling the diameter-expanding layers of adjacent nanowires to each other. The semiconductor growth substrate according to claim 1.
The semiconductor growth substrate is characterized in that the dissimilar substrate is any one of a sapphire substrate, a Si substrate, and a SiC substrate. The semiconductor growth substrate according to claim 1 or 2.
The semiconductor growth substrate is characterized in that the nanowire layer, the diameter expansion layer, and the base layer are GaN single crystals, and the GaN single crystal has a c-plane as a growth main surface. A semiconductor device comprising a functional layer on the semiconductor growth substrate according to any one of claims 1 to 3. A semiconductor light emitting device comprising the active layer on the semiconductor growth substrate according to any one of claims 1 to 3. A mask forming step of forming a mask having a plurality of openings on a different substrate having a crystal structure different from that of the semiconductor layer to be grown.
A nanowire forming step of forming a nanowire layer by selectively growing a plurality of nanowires which are nano-sized to micron-sized columnar crystals having a side surface which is a facet surface perpendicular to the main surface of the dissimilar substrate from the opening.
A diameter expansion step of continuously expanding the diameter of the nanowire to continuously grow the diameter expansion layer on the columnar crystal,
A method for manufacturing a semiconductor growth substrate, which comprises a base layer forming step of bonding the diameter-expanding layers of adjacent nanowires to each other to continue growth.

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