JP7038492B2 - Semiconductor element storage package and semiconductor device - Google Patents

Description

The present invention relates to a semiconductor device accommodating package and a semiconductor device having a wiring conductor.

As a component constituting a semiconductor device including a semiconductor element such as a semiconductor integrated circuit element, a semiconductor element storage package including a wiring conductor electrically connected to the semiconductor element is used. The semiconductor element storage package includes an insulator in which a plurality of insulating layers are laminated, and a conductor such as the wiring conductor arranged inside the insulator (see, for example, Patent Documents 1 to 3). ).

Japanese Unexamined Patent Publication No. 9-237854 Japanese Patent Application Laid-Open No. 2002-324867 Japanese Patent Application Laid-Open No. 2002-324868

In recent years, in order to increase the speed and reduce the power consumption, it has been required to reduce the conduction resistance of a conductor such as a line conductor. On the other hand, it is conceivable to increase the thickness of the conductor or increase the area (line width) of the conductor in a plan view in the flow direction of the current flowing through the conductor.

However, if the thickness of the conductor or the area in plan view is increased, the machine at the interface between the conductor or the conductor and the insulator due to the thermal stress caused by the difference in the thermal expansion rate (linear expansion coefficient, etc.) between the conductor and the insulator. The possibility of natural destruction increases.

The package for accommodating a semiconductor element according to the embodiment of the present invention is located between an insulating substrate including a plurality of insulating layers laminated to each other and between the insulating layers, and has an input portion in a part in the length direction. A wiring conductor having an output unit at a position away from the input unit is provided, and the wiring conductor extends along the length direction and extends in the length direction between the input unit and the output unit. It has a first non-forming portion and a second non-forming portion arranged side by side in the width direction orthogonal to the above, and the wiring conductor has the first non-forming portion and the second non-forming portion in the width direction. The second divided wiring conductor includes a first divided wiring conductor, a second divided wiring conductor, and a third divided wiring conductor arranged in order in the width direction, and the second divided wiring conductor is divided in the width direction. It is adjacent to the first divided wiring conductor across the first non-formed portion and adjacent to the third divided wiring conductor across the second non-formed portion, and is adjacent to the first divided wiring conductor. The second divided wiring conductor is connected to the second divided wiring conductor by a plurality of first auxiliary wirings extending in the width direction, and the second divided wiring conductor and the third divided wiring conductor are a plurality of extending in the width direction. The plurality of first auxiliary wires and the plurality of second auxiliary wires are connected by a second auxiliary wire, and the plurality of first auxiliary wires and the plurality of second auxiliary wires are arranged at the same position with each other in the length direction.

The semiconductor device according to the embodiment of the present invention has a semiconductor element accommodating package having the above configuration and a semiconductor element mounted on the semiconductor element accommodating package and electrically connected to the wiring conductor.

According to the semiconductor element accommodating package of one aspect of the present invention, the thermal stress is effectively reduced in the non-formed portion of the wiring conductor between the layers of the insulating layer because of the above configuration. That is, the thermal stress generated between the wiring conductor and the insulating substrate is dispersed by the non-forming portion. Therefore, for example, we provide a package for storing semiconductor devices that can reduce conduction resistance by making the thickness of the wiring conductor larger than before and reduce the possibility of mechanical destruction of the wiring conductor due to thermal stress. can do.

Further, according to the semiconductor device according to one aspect of the present invention, since the semiconductor element accommodating package having the above configuration is included, the possibility of mechanical destruction of the wiring conductor and the like is reduced, and the long-term reliability is reduced. It is possible to provide a semiconductor device effective for improvement.

It is a perspective view which shows the semiconductor element accommodating package and the semiconductor device of embodiment of this invention. It is an exploded perspective view which shows by disassembling the semiconductor element accommodating package of embodiment of this invention. It is a perspective view which shows an example of the wiring conductor in the semiconductor element accommodating package of embodiment of this invention. It is a perspective view which shows the input part and the output part in the semiconductor element accommodating package of embodiment of this invention. (A) and (b) are plan views showing an example of a wiring conductor in the semiconductor element accommodating package of another embodiment of the present invention, respectively. (A) is a plan view showing an example of a wiring conductor in the semiconductor element accommodating package of another embodiment of the present invention, and (b) is a plan view showing a part of (a) in an enlarged manner.

The semiconductor device storage package and the semiconductor device of the present invention will be described with reference to the accompanying drawings. FIG. 1 is a perspective view showing a semiconductor device storage package according to an embodiment of the present invention. FIG. 2 is an exploded perspective view showing the semiconductor device storage package of the embodiment of the present invention in an exploded manner. FIG. 3 is a perspective view showing an example of a wiring conductor in the semiconductor device storage package according to the embodiment of the present invention. FIG. 4 is a perspective view showing an input unit and an output unit in the semiconductor device storage package according to the embodiment of the present invention.

For example, as shown in FIGS. 1 and 2, a plurality of insulating layers 1 are laminated to form an insulating substrate 2. Further, the wiring conductor 3 is arranged between the layers of the insulating layers 1. In the example of the embodiment, the input unit 4 is provided at one end of the wiring conductor 3, and the output unit 5 is provided at the other end. That is, the wiring conductor 3 has an input unit 4 in a part in the length direction and an output unit 5 at a position separated from the input unit 4. The wiring conductor 3 has a non-forming portion 6 extending along the length direction in a part thereof in the length direction. The non-forming portion 6 can be regarded as a slit that divides the wiring conductor 3 into a plurality of pieces in the width direction orthogonal to the length direction. The semiconductor element accommodating package 10 of the embodiment is basically composed of the insulating substrate 2, the wiring conductor 3, and the like.

In the following description, the length direction of the wiring conductor 3 is the flow direction of the electric signal (that is, the current) from the input unit 3 to the output unit 4 in the wiring conductor 3. Even if the shape of the wiring conductor is a square shape that is close to a square when there is no slit, this definition in the length direction is similarly applied.

The insulating substrate 2 has a rectangular shape in a plan view, and one side on the short side thereof is non-formed. That is, each of the insulating substrate 2 and the plurality of insulating layers 1 forming the insulating substrate 2 has a rectangular shape lacking one side in a plan view, and has a "U" shape or a "U" shape. .. The insulating substrate 2 can be regarded as having an opening (unsigned) in the chipped side.

In the semiconductor element storage package (hereinafter, also simply referred to as a package) 10 of the present embodiment, a metal encapsulant 9 is bonded to the insulating substrate 2 to accommodate and airtightly seal the semiconductor element 21. The substrate 2A is formed. The sealing body 9 in this embodiment is joined to a bottom plate portion 9a joined to the lower surface of the insulating substrate 2, a frame portion 9b joined to the upper surface of the insulating substrate 2, and a bottom plate portion 9a and a frame portion 9b. It has an end portion 9c that covers the opening of the insulating substrate 2. End 9
c is provided with a penetrating portion 9d that penetrates the end portion 9c in the thickness direction.

A semiconductor element 21 such as an optical semiconductor element or a semiconductor integrated circuit element is mounted in a container surrounded by a bottom portion 9a, a frame portion 9b, an end portion 9c, and an insulating substrate 2 of the sealing body 9. The mounted semiconductor element 21 is electrically connected to the wiring conductor 3 provided on the insulating substrate 2. The semiconductor element 21 electrically connected to the wiring conductor 3 can be electrically connected to an external electric circuit via the input unit 4 and the output unit 5. The details of the conductor portion such as the wiring conductor 3 will be described later.

Since the package 10 of the embodiment includes the end portion 9c having the penetrating portion as described above, it is easy to send and receive an optical signal or the like to and from the outside through the penetrating portion 9d. That is, if an optical transmission material (not shown) such as an optical waveguide connecting the inside and outside of the container is arranged through the penetrating portion 9d, an optical signal can be transmitted inside and outside the container through the optical waveguide and the like.

The wiring conductor 3 is located between the layers of the insulating layer 1 and the exposed surface (a part of the upper surface) of the insulating substrate 2. Further, as described above, the wiring conductor 3 located between the layers of the insulating layer 1 has an input unit 4 and an output unit 5 in a part thereof in the length direction. The wiring conductor 3 is electrically connected to the semiconductor element 21 and constitutes a part of a conductive path that electrically connects the semiconductor element 21 to an external electric circuit. The electrical connection between the wiring conductor 3 and the external electric circuit is performed in the input unit 4 and the output unit 5 as described above. In the semiconductor element storage package 10 of the embodiment, each of the input unit 4 and the output unit 5 is a through conductor (so-called) that penetrates the other wiring conductor 3A and the insulation layer 1 arranged between the layers of the insulation layer 1 in the thickness direction. It is electrically connected to the input terminal 4A or the output terminal 5A located on the exposed surface (a part of the upper surface) of the insulating substrate 2 via the via conductor) 11. The electrical connection between the wiring conductor 3 and the semiconductor element 21 can be made via the input terminal 4A and the output terminal 5A.

Further, the plurality of insulating layers 1 forming the insulating substrate 2 include those having different dimensions in a plan view. According to this dimensional difference, a stepped portion (stepped portion) is provided on the surface of the insulating substrate 2 (upper surface in the example of FIG. 1). A wiring conductor 3B for connection, which is electrically connected to the wiring conductor 3 via a via conductor or the like, is located on the upper surface of the lower insulating layer exposed in the step portion. The wiring conductor 3B for connection located in the container in the substrate 2A is electrically connected to the semiconductor element 21 via a conductive connection (not shown) such as a bonding wire.

The insulating substrate 2 provided with such a conductor such as a wiring conductor 3 is regarded as a member having a function as an input / output unit for electrically connecting the inside and outside of the container in the substrate 2A in the semiconductor element storage package 10. You can also. For example, the optical signal transmitted in the container as described above is converted into an electric signal by the optical semiconductor element, and the electric signal is transmitted to the external electric circuit via the input / output unit.

The insulating substrate 2 and the insulating layer 1 constituting the insulating substrate 2 are made of, for example, a ceramic such as an aluminum oxide sintered body, a mullite sintered body, a glass ceramic sintered body, an aluminum nitrided sintered body, or a silicon nitride sintered body. It is made of material. For example, when the insulating substrate 2 is formed by laminating a plurality of insulating layers 1 made of an aluminum oxide sintered body, the insulating substrate 2 can be manufactured as follows.

That is, first, raw material powders such as aluminum oxide, silicon oxide, calcium oxide and magnesium oxide are kneaded together with an appropriate organic solvent and binder to prepare a slurry. Next, this slurry is molded into a sheet shape (strip shape) by a molding method such as a doctor blade method or a lip coater method to prepare a ceramic green sheet. Then, the ceramic green sheet is cut into a predetermined shape and size to prepare a plurality of green sheets, and these green sheets are laminated one above the other and fired at about 1300 to 1600 ° C. By the above steps, it is possible to manufacture an insulating substrate 2 in which a plurality of insulating layers 1 are laminated one above the other.

The conductor portions (hereinafter referred to as wiring conductor 3 and the like) such as the wiring conductor 3, another wiring conductor 3A, the wiring conductor 3B for connection, the input terminal 4A and the output terminal 5A, and the through conductor 11 are, for example, tungsten, molybdenum, and manganese. , Copper, silver, palladium, gold, platinum, nickel or cobalt. The wiring conductor 3 and the like may be made of an alloy material of such a metal material, or may be a combination of a plurality of metal layers by means such as laminating each other. The plurality of metal layers and the like may be made of different types of metal materials from each other, or may have different thicknesses or diameters from each other.

The wiring conductor 3 and the like can be formed as follows, for example, if they are made of tungsten. First, a powder of a metal material such as tungsten is kneaded with an effective solvent and a binder to prepare a metal paste. Next, this metal paste is printed on the surface of the green sheet to be the insulating layer 1 of the insulating substrate 2 in a predetermined pattern by a method such as a screen printing method. The metal paste to be the through conductor 11 is filled in the through holes provided in the green sheet in advance by a method such as screen printing using vacuum suction. Then, this metal paste is fired at the same time as the green sheet. By the above steps, the insulating substrate 2 provided with the wiring conductor 3 and the like can be manufactured.

The wiring conductor 3 and the like may be those in which a plating layer such as nickel and gold is further provided on the exposed surface of the metallized layer. Oxidation of the wiring conductor 3 and the like is suppressed by the plating layer, and reliability is improved. In addition, the characteristics of connectivity (bonding property, etc.) of the bonding wire and the like, which will be described later, are improved.

As described above, in the semiconductor element storage package 10 of the embodiment, the wiring conductor 3 is located in the central portion in the width direction orthogonal to the length direction between the input unit 4 and the output unit 5 in the length direction. It has a non-forming portion 6 along the line. Since such a non-forming portion 6 is included, it is possible to provide the semiconductor element storage package 10 which is effective in reducing the electric resistance of the wiring conductor 3 and also effective in improving the long-term reliability. ..

That is, since the wiring conductor 3 has the non-formed portion 6, the thermal stress generated in the wiring conductor 3 between the layers of the insulating layer 1 can be effectively reduced. That is, the thermal stress generated between the wiring conductor 3 and the insulating substrate 2 is dispersed by the non-forming portion 6. Therefore, for example, it becomes easy to reduce the conduction resistance by making the thickness of the wiring conductor 3 larger than before, and to reduce the possibility of mechanical destruction of the wiring conductor 3 and the like due to thermal stress.

Further, in the semiconductor element accommodating package 10 of the embodiment, since the wiring conductor 3 has a non-forming portion 6 along the length direction thereof and is divided into a plurality of parts in the width direction, the wiring conductor 3 is divided one by one. The line width of the wiring conductor 3 is smaller than that when the non-forming portion 6 is not provided. Therefore, for example, when the wiring conductor 3 is formed by a method of applying a metal paste by a printing method such as screen printing and firing as described later, it is effective in reducing variations in the line width and thickness of the wiring conductor 3. be. By reducing this thickness variation, for example, the transmission characteristics of the electric signal in the wiring conductor 3 can be accurately analyzed, predicted, and designed by simulation. Therefore, the wiring board 10 can be easily improved in transmission characteristics.

Here, if it is attempted to form a wiring conductor having the same width as the total width of the wiring conductors 3 in the portion excluding the non-forming portion 6 and having no non-forming portion, the printing widths of the metal pastes are compared. It gets bigger. Therefore, the thickness variation of the metal paste due to the curvature of the metal paste due to the surface tension of the metal paste and the gravity, the viscosity of the metal paste, the spread of the metal paste due to the surface roughness of the green sheet, etc., is present at the location of the wiring conductor 3. Will be relatively large. As a result, there is a possibility that the thickness variation of the wiring conductor 3 in the width direction and the like becomes relatively large. On the other hand, in the wiring board 3 of the embodiment, it is easy to control the thickness and spread of the divided wiring conductor 3, and there is a possibility that the variation in the thickness and line width of the wiring conductor 3 in the width direction can be reduced. .. Therefore, it is easy to predict the transmission characteristics of the wiring conductor 3, and the wiring conductor 3 having a desired thickness and line width can be manufactured, and the semiconductor element storage package 10 is advantageous for improving the transmission characteristics. be able to.

The wiring conductor 3 having the non-formed portion 6 may be provided with, for example, a non-printed portion corresponding to the non-formed portion 6 on a screen printing plate surface for printing a metal paste serving as the wiring conductor 3. That is, the metal paste may be printed on the surface of the green sheet using a plate surface in which the mesh is closed in the same pattern as the non-forming portion 6.

As described above, the semiconductor element accommodating package 10 of the embodiment and the semiconductor element 21 mechanically connected to the semiconductor element accommodating package 10 and electrically connected to the wiring conductor 3 make the present invention. The semiconductor device 20 according to the embodiment of the invention is configured. Mechanical connection, that is, fixing of the semiconductor element 21 to the semiconductor element storage package 10 is performed, for example, by joining the semiconductor element 21 to the upper surface of the bottom portion 9b included in the sealing body 9 of the substrate 2A, or to the upper surface of the bottom portion 9b. This is done by joining the semiconductor element 21 to a wiring board (not shown) arranged on the installed Pelche element (not shown). The bonding of the semiconductor element 21 to the bottom portion 9b or the above-mentioned wiring board can be performed, for example, by bonding via a low melting point brazing material such as tin-silver solder or gold-tin brazing material. Further, the semiconductor element 21 may be bonded to the bottom portion 9b or the above-mentioned wiring board via a bonding material such as an adhesive containing a resin or glass containing a filler.

The electrical connection between the wiring substrate and the wiring conductor 3 electrically connected to the semiconductor element 21 or the semiconductor element 21 can be made, for example, via a bonding wire as described above. Further, the electrical connection between the semiconductor element 21 and the wiring conductor 3 is performed via a flexible substrate in which a conductor is provided on a resin sheet or another conductive connecting material such as an anisotropic conductive adhesive. May be good.

For example, as in the example shown in FIG. 3, in the semiconductor element storage package 10 and the semiconductor device 20 of the embodiment, a plurality of non-forming portions 6 are arranged side by side in the width direction of the wiring conductor 3 on one wiring conductor 3. ing. Further, the plurality of non-forming portions 6 are arranged side by side in parallel in the width direction of the wiring conductor 3. In such a case, the width of each divided wiring conductor 3 can be effectively suppressed to a small size. Therefore, the semiconductor element storage package 10 and the semiconductor, which effectively alleviate the concentration of stress in the wiring conductor 3 caused by the difference in thermal expansion coefficient between the insulating layer 1 and the wiring conductor 3 and are advantageous for improving reliability. It can be device 20.

Further, in this case, the accuracy of the thickness of each divided wiring conductor 3 can be effectively improved, and the variation in the thickness or line width of the wiring conductor 3 can be reduced. Therefore, the semiconductor element accommodating package 10 can be obtained, which is advantageous in further improving the transmission characteristics of the wiring conductor 3.

If the width of each of the divided wiring conductors 3 becomes too small, for example, the influence of the mesh during screen printing becomes large, and the line width of the wiring conductors 3 is likely to vary. Therefore, when a plurality of non-forming portions 6 are provided on the wiring conductor 3, the line width of each wiring conductor 3 divided across the non-forming portions is adjusted to be, for example, about 30 to 50 μm or more. do it.

5 (a) and 5 (b) are plan views showing an example of a wiring conductor in a semiconductor device storage package according to another embodiment of the present invention, respectively. 6 (a) is a plan view showing an example of a wiring conductor 3 in the semiconductor element accommodating package 10 and the semiconductor device 20 of another embodiment of the present invention, and FIG. 6 (b) is a plan view of FIG. 6 (a). It is a top view which shows a part enlarged. In FIGS. 5 and 6, the same parts as those in FIGS. 1 to 4 are designated by the same reference numerals.

In the example shown in FIG. 5A, the width of the non-forming portion 6 in the direction orthogonal to the length direction of the wiring conductor 3 is relatively large, and in the example shown in FIG. 5B, the length direction of the wiring conductor 3 The width of the non-forming portion 6 in the direction orthogonal to is relatively small. Further, in both FIGS. 5A and 5B, the line widths in the directions orthogonal to the length direction of the divided individual wiring conductors 3 are aligned to the same extent with each other, and the non-forming portions are formed. Larger (wider) than the width of 6. As a result, the wiring conductor 3 can be made into a semiconductor element accommodating package 10 which is advantageous in further improving the electrical transmission characteristics by reducing the electric resistance. Further, the wiring conductor 3 is connected to the input unit 4 and the output unit 5, and the line width of the wiring conductor 3 provided in the direction orthogonal to the length direction of the wiring conductor 3 is divided into individual wiring conductors 3. It is aligned to the same extent as the line width in the direction orthogonal to the length direction. Further, the widths of the individual non-forming portions 6 are also aligned to the same extent as each other. In this case, since the line width of the divided individual wiring conductors 3 and the width of the non-forming portion 6 are constant, the possibility that the current is concentrated on a part of the individual wiring conductors is reduced. Therefore, it is advantageous for improving the electrical characteristics. Further, the possibility that stress generated in the manufacturing process of the package 10 or the semiconductor device 20 is concentrated on a part of each wiring conductor 3 is reduced. Therefore, it is advantageous for improving the long-term reliability of the semiconductor element storage package 10 and the semiconductor device 20. Further, the semiconductor element accommodating package 10 and the semiconductor device 20 can be obtained because they are easy to design and are advantageous in terms of improving productivity.

When the width of the non-formed portion 6 is relatively large as in the example shown in FIG. 5 (a), it is easy to print the metal paste to be the wiring conductor 3 while providing the non-printed portion to be the non-formed portion. Is. Further, when the width of the non-forming portion 6 is relatively small as in the example shown in FIG. 5B, it is advantageous for reducing the electric resistance of the wiring conductor 3. Therefore, the semiconductor element accommodating package 10 and the semiconductor device 20 can be obtained, which is advantageous for improving the transmission characteristics.

The example shown in FIG. 6 can also be regarded as another modification different from the modification shown in FIG. 1. In the example shown in FIG. 6, an auxiliary wiring 8 for connecting adjacent wiring conductors 3 (divided by the non-forming portion) with the non-forming portion 3 interposed therebetween is provided. In FIG. 6A, the auxiliary wiring 8
The area where is provided is shown by the virtual line 8A.

In the example shown in FIG. 6, the thickness of the wiring conductor 3 at the connection portion S is different from that of the other portions. FIG. 6B shows a connecting portion S (S1) having a thickness larger than that of the other portion and a connecting portion S (S2) having a thickness smaller than that of the other portion of the wiring conductor 3.

That is, in the semiconductor element accommodating package 10 of the embodiment, the auxiliary wiring 8 extending in the width direction and connected to the wiring conductor 3 may be located in a part of the non-forming portion 6. In this case, it can be considered that the non-forming portion 6 is divided into a plurality of parts in the length direction by the auxiliary wiring 8. That is, the length of each non-forming portion 6 is relatively small (short). In such a case, a current may flow between the wiring conductors 3 adjacent to each other via the auxiliary wiring 8. As a result, the apparent line width of the wiring conductor 3 can be increased, and the electrical resistance can be effectively reduced.

Further, it is possible to further increase the bonding area of the conductor such as the wiring conductor 3 including the auxiliary wiring 8 with respect to the insulating substrate 2 while obtaining the effect of stress distribution by the non-forming portion 6. Further, since the dimension (that is, the length) of each wiring conductor 3 along the non-forming portion 6 in the length direction can be kept small, the variation of the metal paste serving as the wiring conductor 3 can be effectively reduced. Can be done. Therefore, the semiconductor element accommodating package 10 and the semiconductor device 20 can be obtained, which are advantageous in improving reliability, reducing conduction resistance, and improving transmission characteristics.

The example shown in FIG. 6 can also be regarded as an example in which the square-shaped distributed non-forming portion 6 is provided vertically and horizontally on the wiring conductor 3. As shown in this example, the non-forming portion 6 does not necessarily have to have a dimension in the length direction of the wiring conductor 3 larger than a dimension in the direction orthogonal to the dimension. That is, the non-forming portion 6 does not have to be elongated along the length direction of the wiring conductor 3. For example, in the case where the square-shaped distributed non-forming portions 6 are provided vertically and horizontally, the effect of reducing the electric resistance of the wiring conductor 3 by the auxiliary wiring 8 can be enhanced.

Further, the square-shaped distributed non-forming portions 6 are arranged at equal intervals in a direction inclined with respect to the length direction of the wiring conductor 3 in a plan view. Further, the square-shaped distributed non-forming portion 6 reduces the electrical resistance of the wiring conductor 3 while reducing the concentration of stress generated in the manufacturing process of the package 10 or the semiconductor device 20 on a part of the wiring conductor 3. Therefore, in a plan view, the wiring conductors 3 are arranged at equal intervals with an inclination of 45 ° with respect to the length direction.

Further, in the semiconductor element accommodating package 10 and the semiconductor device 20 of the above embodiment, the thickness of the wiring conductor 3 may be different from that of other portions in the connection portion S to which the auxiliary wiring 8 is connected. ..

When the thickness of the wiring conductor 3 in the connection portion S is different from the thickness of the wiring conductor 3 in other portions, the stress in the connection portion S is distributed in the thickness direction of the wiring conductor 3, and the wiring conductor 3 and the insulating substrate 2 are distributed. It is possible to improve the reliability of the connection with and to improve the mechanical strength of the connection portion S. That is, in the portion where the wiring conductor 3 and the auxiliary wiring 8 are connected to each other, stress tends to be concentrated between the wiring conductor 3 and the auxiliary wiring 8 in which the extending direction or the contracting direction of the wiring is different from each other. Further, the stress generated by the difference in the coefficient of thermal expansion between the insulating layer 1 and the wiring conductor 3 and the auxiliary wiring 8 tends to be concentrated on the auxiliary wiring 8 serving as the connection portion S. On the other hand, in the case of the connecting portion S having a thickness different from that of the other portion, the portion where stress is likely to be concentrated in the thickness direction (vertical direction) can be made different from the other portion, or the machine of the connecting portion S can be made different. Strength can be improved. Therefore, the possibility that stress is concentrated on a part of the wiring conductor 3 is effectively reduced, the possibility that cracks or cracks occur in the auxiliary wiring 8 is reduced, and the electrical connection failure of the auxiliary wiring 8 is caused. The possibility of occurrence can be reduced. Therefore, the semiconductor element accommodating package 10 and the semiconductor device 20 with improved reliability of joining the wiring conductor 3 and the insulating substrate 2 can also be used.

Further, when the thickness of the wiring conductor 3 is larger than other portions in the connection portion S to which the auxiliary wiring 8 is connected, the electrical resistance of the wiring conductor 3 is different in the connection portion where the current is relatively easily concentrated. It is reduced more than the part of. Therefore, the current (that is, the electric signal) is efficiently transmitted even in the connection portion S. As a result, the electrical characteristics of the semiconductor element storage package 10 and the semiconductor device 20 can be improved. Further, the wiring conductor 3 can improve the mechanical strength of the connecting portion S by making the thickness of the connecting portion S larger than that of the other portions. As a result, the stress generated due to the difference in the coefficient of thermal expansion between the insulating layer 1 and the wiring conductor 3 is concentrated on the auxiliary wiring 8 serving as the connection portion S, thereby reducing the possibility of cracks or cracks in the auxiliary wiring 8. can. Therefore, the wiring conductor 3 can reduce the possibility that an electrical connection failure occurs in the auxiliary wiring 8.

Further, when the thickness of the wiring conductor 3 is smaller than the other portions in the connection portion S to which the auxiliary wiring 8 is connected, when printing the metal paste that becomes the wiring conductor 3 or the auxiliary wiring 8 in the connection portion. The possibility of bleeding, spreading, etc. is reduced. Therefore, it is easy to control the line widths of the wiring conductor 3 and the auxiliary wiring 8 to predetermined values, and the stress generated due to the difference in thermal expansion coefficient between the insulating layer 1 and the wiring conductor 3 and the auxiliary wiring 8 is generated. It is possible to reduce the possibility of concentrating on the auxiliary wiring 8 that is the connection portion S. That is, when the reduction of electrical resistance is emphasized, it is better that the thickness of the wiring conductor 3 in the connection portion S is relatively large as described above, and when the accuracy and control of the line width of the wiring conductor 3 are emphasized, the connection portion is emphasized. It is preferable that the thickness of the wiring conductor 3 in S is relatively small.

Further, the connection portion S includes a connection portion with the auxiliary wiring 8 located on the outer peripheral portion of the wiring conductor 3 along each side of the insulating layer 1 between the input unit 4 and the output unit 5, and this connection is provided. Since the thickness of the wiring conductor 3 in the portion S is different from that of the other portions, the wiring conductor 3 can obtain the same effect as described above.

Even if the thickness of the wiring conductor 3 in the connection portion S is different from that of other portions, the influence on the electric resistance of the entire wiring conductor 3 is small because the section is shorter than the total length of the wiring conductor 3. Therefore, even in this configuration, the semiconductor element accommodating package 10 and the semiconductor device 20 can easily improve the transmission characteristics of the wiring conductor 3.

To make the thickness of the wiring conductor 3 in the connection portion S different from that of the other portions, for example, the viscosity, printing thickness, plate surface and green of at least one of the metal paste serving as the wiring conductor 3 and the metal paste serving as the auxiliary wiring 8 are obtained. Conditions such as the distance between the sheets and the surface roughness of the green sheet and the printing speed (moving speed of the squeegee) may be appropriately adjusted. By this adjustment, the metal paste tends to concentrate on the connecting portion S or easily escapes, and the printing thickness of the metal paste on the connecting portion S can be made different from that of other portions.

1 ・ ・ Insulation layer 2 ・ ・ Insulation substrate 2A ・ ・ Base 3 ・ ・ Wiring conductor 3A ・ ・ Other wiring conductor 3B ・ ・ Wiring conductor 4 for connection ・ ・ Input unit 4A ・ ・ Input terminal 5 ・ ・ Output unit 5A・ ・ Output terminal 6 ・ ・ Non-formed part 8 ・ ・ Auxiliary wiring S ・ ・ Connection part 9 ・ ・ Sealed body 9a ・ ・ Bottom part 9b ・ ・ Frame part 9c ・ ・ End part
10 ... Package for storing semiconductor elements
11 ... Through conductor
20 ... Electronic device

Claims (5)

An insulating substrate containing a plurality of insulating layers laminated to each other,
It is located between the layers of the insulating layer, and has a wiring conductor having an input section in a part in the length direction and an output section at a position away from the input section.
The first non-forming portion and the second non-forming portion in which the wiring conductor extends along the length direction and is arranged side by side in the width direction orthogonal to the length direction between the input portion and the output portion. It has a forming part and
The wiring conductor is divided in the width direction by the first non-forming portion and the second non-forming portion, and the first divided wiring conductor and the second divided wiring conductor are arranged in order in the width direction. And includes a third split wiring conductor
The second divided wiring conductor is adjacent to the first divided wiring conductor with the first non-formed portion interposed therebetween in the width direction, and the third divided wiring conductor sandwiches the second non-formed portion. Adjacent to
The first divided wiring conductor and the second divided wiring conductor are connected by a plurality of first auxiliary wirings extending in the width direction, and are connected to each other.
The second divided wiring conductor and the third divided wiring conductor are connected by a plurality of second auxiliary wirings extending in the width direction.
The plurality of first auxiliary wirings and the plurality of second auxiliary wirings are semiconductor element storage packages arranged at the same positions in the length direction. The plurality of first auxiliary wirings are arranged at a first distance between the input unit and the output unit in the length direction, and are also arranged.
The plurality of second auxiliary wirings are arranged at a second interval between the input unit and the output unit in the length direction.
The semiconductor device storage package according to claim 1, wherein the first interval and the second interval are equal to each other. Further provided with a sealing body bonded to the upper surface and the lower surface of the insulating substrate,
The sealed body has a frame portion to be joined to the upper surface thereof.
The semiconductor element accommodating package according to claim 1 or 2, wherein the first non-forming portion and the second non-forming portion are located outside the frame portion in a plan view. The insulating substrate has a rectangular first portion having a first side and a second side facing each other in a plan view, a second portion extending along the first side of the first portion, and the first portion. It is a U-shape having a third portion extending along the second side of the portion.
The semiconductor device storage package according to any one of claims 1 to 3, wherein the first non-forming portion and the second non-forming portion are located in the first portion. The semiconductor device storage package according to any one of claims 1 to 4.
A semiconductor device mounted on the semiconductor element storage package and comprising the wiring conductor and an electrically connected semiconductor element.

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